ECE251 Intro to Microprocessors Final Exam July 6 th, 2017

Transcription

1 ECE251 Intro to Microprocessors Final Exam July 6 th, 2017 Name: Solution Instructions: Two sides of single page handwritten study sheet OK. Arithmetic-only calculator OK. No books, other notes, etc. Do NOT communicate with any other student. Work all problems and show ALL intermediate work, NOT just answers. Use engineering notation as appropriate. Return exam AND all handouts. Do NOT write on handouts. 1. (30 points: A=10 points, B=8 points, C=12 points) BASICS A. The following TM4C instructions below are executed in order. What are the results? MOV R0,#0xA00C LDR R1,=0xFFEFE2F1 ORRS R2,R0,R1 R2: 0xFFEFE2FD N: 1 C: 0 V: 0 LSRS R3,R2,#3 R3: 0x1FFDFC5F N: 0 C: 1 V: 0 B. The SysTick Timer can generate periodic interrupts. Key SysTick registers include: ST_BASE, ST_CTRL, ST_RELOAD and ST_CURRENT (see p. 5 of exam). What register do you read to observe the value of SysTick? What value do you write to this register to clear it? ST_CURRENT Register. Any write to this register will clear it. If the system clock (not the precision clock) is running at MHz, which SysTick register would be set to what value to create an interrupt every microseconds? ST_RELOAD Register set to value C. Show your work on this question. Convert the following from the IEEE 754 standard to base 10: 0xf245bab E30 Convert the following decimal number to the IEEE 754 single precision standard: * _ 2 0x59e35df3 16

2 2. (30 points) Analog to Digital Converter The system below converts a receiver antenna voltage signal directly to a digital signal. The Transducer and Prescaler converts input values linearly into output values. This is NOT the TM4C ATD converter. It is a fast 10-bit converter. 200nsec. If the antenna signal may contain frequencies up to 2.5 MHz, what is the longest sampling period that may be used? mv. What is the resolution of this ATD converter measured at ATD input? 19.53mv. What is the resolution of this ATD converter measured at Antenna Signal? 50 MBit/sec What is the data rate of this ATD converter assuming the Nyquist Rate for the antenna signal above? (Nyquist Rate is 2*2.5MHz = 5MHz) 0x v. The ATD input is 3.1 v. What digital value is produced? 3.1/4= *2^10= = 0x319 The ATD input is 3.1 v. What antenna signal produced this voltage? Scale by 20 and shift by 10 ((3.1/4)*20-10) = to v. 0x0A5 is the digital signal output. What range of antenna signals represents this digital value? -(10-(hex2dec('0A5')/hex2dec('400'))*20) to -(10- (hex2dec('0a5')/hex2dec('400'))* ) v. 0x0A5 is the digital signal output. What antenna signal estimate best (smallest maximum error) represents this digital value? Use the V min-max equation to find V min-min at ATD then shift back to antenna. ((V RL +(V RH -V RL )*(V d +.5)/2 n )*(5) 10) = (5*(165.5)/2^11)*(5) 10

3 3. (21 points) UART Protocol and Interface A. (15 points) Lucky has asked you to decipher the UART logic signal below. She told you only that it is sent at 4.8 Kbaud and that it shows a Stop bit at the beginning. Specifically, she wants to know the following: 8 bit Is this transmission 7 bit, 8 bit or 9 bit (including possible parity) data? Byte Is each frame ASCII or BYTE information? How do you know? 0x43 0x53 0xD5 What is the data that has been transmitted? Use or 0x as appropriate µsec 6.25ms What is the bit cell time? How long does it take to transmit the signal from first start bit to last stop bit? B. (6 points) Lucky has found some TM4C UART configuration code but has no idea what it does. Can you help her out a bit here! See p. 5 of exam. ; CPU Bus clock frequency is MHz. UART0_BASE EQU 0x4000C000 ; Base Address for UART0 registers LDR R0, =UART0_BASE MOV R1, #0x41 STR R1, [R0, #0x24]! ; Store to IBRD MOV R1, #0x12 STR R1, [R0, #0x4] ; Store to FBRD 0x4000C028 In instruction STR R1, [R0, #0x4] what is the (starting) address of memory used? Kbaud What baud rate is the UART configured for? % Extra Credit: If baud rate goal were the nearest exact multiple of 100 baud, e.g baud, what percentage error is this configuration? ( true desired /desired )*100% = 100*(1/23901)

4 4. (19 points) SSI Interface: TM4C to Nokia5110 The signals below shows the SSI Clock and TX/Data/MOSI signals being sent from the TM4C to The Nokia5110 display just after its X and Y addresses were set to 0,0. This is one continuous signal i.e. read the signal as the starting with the top clk/data set from left to right then continue with the second clk/data set from left to right. What would the upper left-hand corner of the display look like? Please fill in the pixel locations below: 10µsec If the SSI Clock frequency is 500 KHz, how long is the second (widest) TX/Data/MOSI pulse above?

5 Page 5 I/O Register Information:

6 Page 6 ECE Final Exam Name: On my honor as a student, I pledge that I have not received or given any unauthorized assistance in this exam. Signature: ASCII TABLE Question #1 work area (if needed):