ECE251: Tuesday October 3 0

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(Maskable Interrupts/ SysTick Timer) this week. Significant prework! Due next week.

1 ECE251: Tuesday October 3 0 Timer Module Continued Review Pulse Input Characterization Output Pulses Pulse Count Capture Homework #6 due Thursday Lab 7 (Maskable Interrupts/ SysTick Timer) this week. Significant prework! Due next week. Lab 8 (Timer and Pulse Accumulator) starts next week for 2 weeks; due week after Thanksgiving. 1

2 Using Timer System to Measure Pulse Signals In the CFG register, set value to 0x4 for 16-bit mode In the MR register, set the TACMR bit for edge time mode, set TAMR bits to 0x3 for capture, and TACDIR to 0 to count down. In the CTL register, we set TAEVENT bits to 0x3 to capture both rising and falling edges for this example. In a lab project, you would choose the appropriate edge for collecting the next measurement. First a rising edge and then a falling edge to capture a pulse width Two sequential edges of same shape to capture a period Rising, then falling, then rising edge to capture pulse width and period Details of all this are shown on the following slides 2

3 Setting Up Timer System Timer Channel These are the key Timer registers we will be using ; Timer Gate Control and Timer Registers SYSCTL_RCGCTIMER EQU 0x400FE604 ; Timer Clock Gating TIMER0_CFG EQU 0x ; Configuration Register TIMER0_TAMR EQU 0x ; Mode Register TIMER0_CTL EQU 0x C ; Control Register TIMER0_RIS EQU 0x C ; Raw interrupt Status TIMER0_ICR EQU 0x ; Interrupt Clear Register TIMER0_TAILR EQU 0x ; Interval Load Register TIMER0_TAMATCHR EQU 0x ; Match Register TIMER0_TAPR EQU 0x ; Prescaling Divider TIMER0_TAR EQU 0x ; Counter Register 3

4 Setting Up Timer System GPIO Registers These are the key GPIO registers. In this example we re using Port B ;GPIO Gate Control and GPIO Registers SYSCTL_RCGCGPIO EQU 0x400FE608 ;Port B base 0x GPIO_PORTB_DIR EQU 0x ; Port Direction GPIO_PORTB_AFSEL EQU 0x ; Alt Function enable GPIO_PORTB_DEN EQU 0x C ; Digital Enable GPIO_PORTB_AMSEL EQU 0x ; Analog enable GPIO_PORTB_PCTL EQU 0x C ; Alternate Functions 4

5 Setting Up Timer System Set Up Port B Set up Port B for signal input using GPIO Registers ; Setup Port B for signal input ; set direction of PB6 LDR R1, =GPIO_PORTB_DIR LDR R0, [R1] BIC R0, R0, #2_ ; clear bit 6 for input STR R0, [R1] ; enable alternate function LDR R1, =GPIO_PORTB_AFSEL LDR R0, [R1] ORR R0, R0, # 2_ ; set bit6 for alternate fuction on PB6 STR R0, [R1] ; set alternate function to T0CCP0 (7) LDR R1, =GPIO_PORTB_PCTL LDR R0, [R1] ORR R0, R0, #0x ; set bits 27:24 of PCTL to 7 STR R0, [R1] ; to enable T0CCP0 on PB6 ; disable analog LDR R1, =GPIO_PORTB_AMSEL MOV R0, #0 ; clear AMSEL to diable analog STR R0, [R1] 5

6 Set up Timer 0 Start Timer 0 Clock Disable Timer 0 while it is being set up Set to 16 bit mode Capture, edge time ; Start Timer clock LDR R1, =SYSCTL_RCGCTIMER LDR R2, [R1] ; Start timer 0 ORR R2, R2, #0x01 ; Set Timer bit position 0 to 1 STR R2, [R1] ; Without changing any others NOP NOP NOP ; allow clock to settle ; disable timer during setup LDR R1, =TIMER0_CTL LDR R2, [R1] BIC R2, R2, #0x01 ; clear bit 0 to disable Timer 0 STR R2, [R1] ; set to 16bit Timer Mode LDR R1, =TIMER0_CFG MOV R2, #2_100 ; set bits 2:0 to 100 for 16bit timer STR R2, [R1] ; set for edge time and capture mode LDR R1, =TIMER0_TAMR MOV R2, #2_111 ; set bit2 to 1 for Edge Time Mode, STR R2, [R1] ; set bits 1:0 to 11 for Capture Mode ;; set edge detection to both ;LDR R1, =TIMER0_CTL ;LDR R2, [R1] ;ORR R2, R2, #2_1100 ; set bits 3:2 (TAEVENT) to 11 ;STR R2, [R1] 6

7 TIMER0_CFG aka GPTMCFG 16-bit timer for this example 7

8 TIMER0_CTL aka GPTMCTL Base Address + Offset = Register Address Or 0x x0C = 0x C is TIMER0_CTL address Using Indexed addressing is an effective way to do this. TASTALL: 0=timer continues during debugging 1=timer freezes during debugging TAEVENT: 0=Positive Edge, 1=Negative Edge, 3=Both Edges TAEN: 0=Timer Disabled, 1=Timer Enabled Ignore the other bit positions 8

9 TIMER0_TAMR aka GPTMTAMR TACDIR: 0=Timer counts down, 1=Timer counts up TACMR: 0=Edge-count mode, 1=Edge time mode TAMR: 1=One-shot mode, 2=Periodic Timer mode 3=Capture mode Edge time and Capture modes Up vs. Down 9

10 Final Activities to Set up Timer 0 Set Start Value of Timer ; set start value LDR R1, =TIMER0_TAILR MOV R0, #0xFFFFFFFF STR R0, [R1] ; counter counts down, ; so start counter at max value Enable Timer 0 Now pulse edge times are captured as counts of Timer 0 clock ; Enable timer LDR R1, =TIMER0_CTL ; LDR R2, [R1] ; ORR R2, R2, #2_11 ; set bit0 to enable STR R2, [R1] ; anf bit1 to stall in debug ; Await edge capture event LDR R1, =TIMER0_RIS loop LDR R2, [R1] ANDS R2 #04 ; isolate CAERIS bit BEQ loop ; if no capture, then loop ; Need to clear CAERIS bit of TIMER0_RIS. Exercise for student. LDR R1, =TIMER0_TAR ; address of timer register LDR R0, [R1] ; Get timer register value ; Now use this data, with other measured data to compute ; period, pulse width, duty cycle, frequency,... 10

11 TIMER0_TAILR aka GPTMTAILR Set to 0 for count up and 0xFFFFFFFF for count down 11

12 TIMER0_RIS aka GPTMRIS CAERIS: 0=Capture mode event has not occurred. 1=Capture mode event has occurred. This bit is cleared by writing a 1 to the CAECINT bit in the TIMER0_ICR register (shown later). 12

13 TIMER0_TAR aka GPTMTAR Read this register (at 0x ) to determine when last signal edge occurred. 13

14 TIMER0_ICR aka GPTMICR Write a 1 to the CAECINT bit to clear the flag in the GPTMRIS register 14

15 WHEW! 15

16 Output Pulses: The Big Idea How do you make the TM4C create pulses or pulse trains? First, a pulse train is simply a single pulse, repeated over and over You can create a pulse by changing an output pin voltage at a specific (relative) time, then restoring the output voltage to the original value at a second specific relative time. And these times can be known time delays from a previous output event There are two ways to create these pulse trains: Use the Periodic Timer function to set the time duration of a count to allow creation of the high signal and then change the time duration to allow creation of the low signal. Repeating these steps creates a periodic signal. Preferred: Use the Pulse Width Modulation (PWM) Timer function to count down from a value which gives the period of the signal. The signal begins with a high level. At a user-defined count in this count down, the hardware detects a match and immediately changes the output to a low value. Repeating these steps creates a periodic signal. 16

17 PWM Example Diagram What is frequency and duty cycle of this signal for 16MHz Timer Channel Clock? 17

18 Pulse Example Math 1. 0xC350 = C*(16) 3 + 3*(16) 2 + 5*(16) 1 + 0*(16) 0 = 12* * *16+02 = = 50, Similarly, 0x411A = 16, = 16, Clock Period = 1/(16MHz) = 62.5 nsec Therefore Signal Period = 50,000 * 62.5 nsec = msec Signal frequency = 1/(3.125 msec) = 320 Hz Duty Cycle = 16,666/50,000 = 33.3 % for a negative assertion pulse Note: Calculators will be allowed for quiz and exam problems similar to this. So bring a calculator to class and the final. 18

19 Create Pulses with Periodic Timer: I 1. Ensure the timer is disabled (the TnEN bit of TIMER0_CTL is cleared see earlier slide) before making any changes. 2. Write the Configuration register (TIMER0_CFG) with a value of 0x04 for 16-bit mode. 3. In the Timer Mode register (TIMER0_MR), set the TAAMS bit to 0x0, the TACMR bit to 0x0, and the TAMR field to 0x2 for capture/compare, periodic, count down 4. Configure the output state of the PWM signal (i.e. whether it is inverted) in the TAPWML field of the Control (TIMER0_CTL) register. 5. If a prescaler is to be used, write the prescale value to the Timer A Prescale Register (TIMER0_TAPR). 6. Configure the interrupt condition by setting the TAPWMIE bit in the TIMER0_TAMR register. 7. Load the timer start value into the Timer A Interval Load (TIMER0_TAILR) register. 8. Set the TnEN bit in the TIMER0 Control register to enable the timer and set interrupt bit on timeout event. See Programs in Lab #7 (and online) to: generate a 10-second delay using Periodic Mode (Fig. 7.12) generate a pulse train (Fig. 7.13) 19

20 Creating Pulses with Periodic Timer: II 1. In a tight loop, check Interrupt flag TAT0RIS of TIMER0_RIS register for interrupt flag being set. 2. When set, clear the flag by writing a 1 to it. 3. Take appropriate action with GPIO pin (set high or low, depending on which phase of the signal is next. 4. Repeat entire process with appropriate new timer start value (beginning with step 7 of previous slide) 5. This is NOT an interrupt process, but a polling process with the issues of polling. 20

21 Pulse Width Modulation Pulse Width Modulation (PWM) is a method for encoding information into a pulsing signal Commonly used in power circuits, such as motors Varies power to a system by switching (pulsing) supply loads on and off at a fast rate. The higher the duty cycle of these pulses, the higher the power supplied to the load. PWM Switching frequency must be much higher than the load frequency response, giving a smooth output power. BIG advantage of PWM: Power loss of switching electronics is very low: Either no voltage drop in control circuit (switch on) or no current through control circuit (switch off). Can use same circuits to provide fixed pulse train of any desired frequency and duty cycle. 21

22 Setting Up PWM 1. Ensure the timer is disabled (the TnEN bit is cleared). 2. Write the Configuration register (TIMER0_CFG) with a value of 0x04 for 16-bits. 3. In the Timer Mode register (TIMER0_MR), set the TAAMS bit to 0x1, the TACMR bit to 0x0, and the TAMR field to 0x2 for PWM periodic, count down 4. Configure the output state of the PWM signal, if it is inverted, in the TAPWML field of the Control (TIMER0_CTL) register. 5. If a prescaler is to be used, write the prescale value to the Timer A Prescale Register (TIMER0_TAPR). 6. If PWM interrupts are used, configure the interrupt condition in the TAEVENT field in the TIMER0_CTL register and enable the interrupts by setting the TnPWMIE bit in the TIMER0_TAMR register. 7. Load the timer start value into the Timer Interval Load (TIMER0_TAILR) register. 8. Load the Timer Match (TIMER0_TAMATCHR) register with the match value. 9. Set the TnEN bit in the Control register to enable the timer and begin generation of the output PWM signal. The PWM signal can be adjusted at any time by writing to the TSILR and/or TAMATCHR registers, taking effect the next cycle after the write. That s the M (modulation) in PWM. 22

23 Pulse Accumulation or Edge Count Goal: Measure the number of events that occur over a fixed or variable time interval. Often gives important information in control systems Can give elapsed time information if the pulses are from a fixed frequency clock Method: Use the Input Edge-Count Mode of the TM4C123G Processor described in the Microcontroller Data Sheet Not part of Lab 8 Not a key question on final exam But an important component of feedback control systems 23

24 Edge Count Example Diagram 24

25 Edge Count Setup A timer is configured to Input Edge-Count mode by the following sequence: 1. Ensure the timer is disabled (the TnEN bit is cleared). 2. Write to TIMER0_CFG with a value of 0x04 for 16-bit mode. 3. In the Timer Mode register (TIMER0_TAMR), set the TACMR bit to 0x0, the TAMR field to 0x3, and TACDIR to 0x0 for edge count, capture mode, and count up. 4. Configure the type of event(s) that the timer captures by writing the TAEVENT field of the Control (TIMER0_CTL) register for edge type(s). 5. In up-count mode, the timer counts from 0x0 to the value in the GPTMTnMATCHR and GPTMTnPMR registers. The value of the GPTMTnPR and GPTMTnILR must be greater than the value of GPTMTnPMR and GPTMTnMATCHR. 6. If interrupts are required, set the CnMIM bit in the GPTM Interrupt Mask (GPTMIMR) register. 7. Set the TnEN bit in the GPTMCTL register to enable the timer and begin waiting for edge events. 25

26 Edge Count Setup 8. Poll the CAMRIS bit in the TIMER0_RIS register. The status flag is cleared by writing a 1 to the CAMCINT bit of the Interrupt Clear (TIMER0_ICR) register. The number in the Timer Register, TIMER0_TAR, will be the number of events captured since the count-up began. 26

27 Interrupts with Timer Module Using interrupts with the Timer Module is straightforward Creating an interrupt when an Input Capture event (input signal edge) occurs Creating an interrupt when an Output event occurs (pulse needs to change values) Creating an interrupt on any PWM pulse transition to allow changing the signal frequency and/or duty cycle Creating an interrupt when the Edge Count reaches a specified value Examples in Lab #8 show how this is done. Details are thoroughly explained in the TM4C Data Sheet for each of the functional areas above 27

28 Next Lecture Review Timer Module as needed Fixed Point Data Representation and Math Floating Point Data Representation and Math Read Sections in text and skim rest of chapter Look at assembler.lst file info as time permits 28

EE251: Thursday October 25

EE251: Thursday October 25 Review SysTick (if needed) General-Purpose Timers A Major Topic in ECE251 An entire section (11) of the TM4C Data Sheet Basis for Lab #8, starting week after next Homework #5