EE251: Thursday October 18

Transcription

1 EE251: Thursday October 18 Analog to Digital Conversion Continued Successive Approximation Method Continued Computations TM4C A/D Capability and Programming Homework #4 due today 4 p.m. Lab #6 (A/D Converter) one week lab next week Partner with another in this and future labs Don t Fall Behind on Labs! Lecture #18 1

2 Successive Approximation Example Choose a voltage between 0 and 4 volts: 2.1 Voltage A/D Output = 2_ = 0x21 = 33 Vmin-max = 4*(33+½)/0x40 = volts Approximation Number Lecture #18 2

3 Successive Approximation Example Approximations at Each Step VRH = 4.0 VRL=0.0 Vmeas = 2.1 Approx # Vlow Vhigh Vmid Vmeas-Vmid Next Bit Bit Estimate = = 0x86 = 134 Vmin-max = 4*134.5/256 = Error = Vmin-max - Vmeas => 0.074% Lecture #18 3

4 Live Successive Approximation Example Choose a voltage between 0 and 4 volts: Voltage Approximation Number Lecture #18 4

5 A/D Conversion Process Example 12-bit A/D Converter 1 to 5 volt A/D Converter Temperature T Transducer voltage voltage Signal A/D Conditioner Converter Digital Value 0 to 80 deg. F -0.5 to +1.0 v. 1 to 5 v. 0x000 to 0xFFF Choose a temperature T: What is digital value out? Try it backwards: From digital value to voltages. Lecture #18 5

6 TM4C A/D Converter Two A/D Converter Modules, each having 12 Analog Input Channels 12-bit precision A/D Single-ended and differential input configurations Up to 1 million samples per second Flexible trigger control: software, Timers, GPIO, etc. Hardware averaging of up to 64 samples Separate power and ground circuitry to converter itself, not used by its registers. (Why do that?) Internal temperature sensor And much more than you ll probably ever want to know! These are Really Good A/D Converter Systems! Lecture #18 6

7 TM4C A/D Block Diagram Lecture #18 7

8 A/D Input Uses these GPIO Pins (Both Converter Modules Share the Same Pins) GPIO PIN A/D In PB4 10 PB5 11 PD0 7 PD1 6 PD2 5 PD3 4 PE0 3 PE1 2 PE2 1 PE3 0 PE4 9 PE5 8 Twelve different pins can be used to do 12 independent analog conversions. Lecture #18 8

9 Some Key TM4C A/D Registers (ADC0) Address Name $400F.E638 ADC1 ADC0 SYSCTL_RCGCADC_R $ SS3 SS2 SS1 SS0 ADC0_SSPRI_R $ EM3 EM2 EM1 EM0 ADC0_EMUX_R $ ASEN3 ASEN2 ASEN1 ASEN0 ADC0_ACTSS_R $ A0 MUX0 ADC0_SSMUX3_R $ A4 TS0 IE0 END0 D0 ADC0_SSCTL3_R $ SS3 SS2 SS1 SS0 ADC0_PSSI_R $ INR3 INR2 INR1 INR0 ADC0_RIS_R $ MASK3 MASK2 MASK1 MASK0 ADC0_IM_R $4003.8FC4 Speed ADC0_PC_R $ A8 DATA ADC0_SSFIFO3_R Register Memory Address Important Bits Register Name Lecture #18 9

10 TM4C A/D Configuration TM4C ADC Operation select rate Value 0x7 0x5 0x3 0x1 Description 1M samples/second 500K samples/second 250K samples/second 125K samples/second Speed bits in ADC0_PC_R select sequencer (activate at end) Sequencer # of Samples Depth of FIFO SS3 1 1 SS2 4 4 SS1 4 4 SS0 8 8 Activate with ADC_ACTSS select trigger EM3, EM2, EM1, and EM0 bits in ADC_EMUX_R Lecture #18 10

11 TM4C A/D Configuration TM4C ADC Operation continued select channel: bits 3-0 in ADC0_SSMUX3 = 0 This field specifies which analog input (in this case AIN0) is sampled select sample mode: bits 3-0 in ADC0_SSCTL3 = 6 TS0=0 (temperature sensor not read) IE0=1 (interrupt sent to controller) END0=1 (end of sequence) D0=0 (not differential) Lecture #18 11

12 TM4C A/D Initialization Initialization PLL (Phase Locked Loop) must be enabled for A/D Operation. Enable ADC clock: set bit 0 to 1 in SYSCTL_RCGCADC_R Set 125kHz ADC conversion speed: write 0x01 to ADC0_PC_R Set sequencer priority: 0,1,2,3 in ADC0_SSPRI_R Disable selected sequence 3: zero bit 3 of ADC0_ACTSS_R Set software start trigger event: zero bits of ADC0_EMUX_R Set input source (0-11): write channel number in bits 3-0 of ADC0_SSMUX3_R Set sample control bits: write 0110 in bits 3-0 ADC0_SSCTL3_R to disable temp measurement, notify on sample complete, indicate single sample in sequence, and denote single-ended signal mode Disable interrupts: zero bit 3 of ADC0_IM_R Enable selected sequencer 3: set bit 3 of ADC0_ACTSS_R Lecture #18 12

13 A/D on TM4C (see file ATD.s) ; Setup and run ATD sampling on ADC0 (AIN0 = PE3) Stores results in R5 ; ADC Registers RCGCADC EQU 0x400FE638; ADC clock register ;ADC0 base address EQU 0x ADC0_ACTSS EQU 0x ; Sample sequencer (ADC0 base address) ADC0_RIS EQU 0x ; Interrupt status ADC0_IM EQU 0x ; Interrupt select ADC0_EMUX EQU 0x ; Trigger select ADC0_PSSI EQU 0x ; Initiate sample ADC0_SSMUX3 EQU 0x400380A0; Input channel select ADC0_SSCTL3 EQU 0x400380A4; Sample sequence control ADC0_SSFIFO3 EQU 0x400380A8; Channel 3 results ADC0_PC EQU 0x40038FC4; Sample rate ; GPIO Registers RCGCGPIO ;PORT E base address PORTE_DEN PORTE_PCTL PORTE_AFSEL PORTE_AMSEL EQU 0x400FE608; GPIO clock register EQU 0x EQU 0x C; Digital Enable EQU 0x C; Alternate function select EQU 0x ; Enable Alt functions EQU 0x ; Enable analog Lecture #18 13

14 A/D on TM4C ; Start clocks for features to be used LDR R1, =RCGCADC ; Turn on ADC clock LDR R0, [R1] ; set bit 0 to enable ADC0 clock STR R0, [R1] NOPs ; Let clock stabilize LDR R1, =RCGCGPIO ; Turn on GPIO clock LDR R0, [R1] ORR R0, R0, #0x10 ; set bit 4 to enable port E clock STR R0, [R1] NOPs ; Let clock stabilize Lecture #18 14

15 A/D on TM4C ; Setup GPIO to make PE3 input for ADC0 ; Enable alternate functions LDR R1, =PORTE_AFSEL LDR R0, [R1] ; set bit 3 to enable alt functions on PE3 STR R0, [R1] ; PCTL does not have to be configured since ADC0 is automatically selected when port pin is set to analog. ; Disable digital on PE3 LDR R1, =PORTE_DEN LDR R0, [R1] STR R0, [R1] ; clear bit 3 to disable analog on PE3 ; Eanable analog on PE3 LDR R1, =PORTE_AMSEL LDR R0, [R1] STR R0, [R1] ; set bit 3 to enable analog on PE3 Lecture #18 15

16 Setup A/D on TM4C ; Disable sequencer while ADC setup LDR R1, =ADC0_ACTSS LDR R0, [R1] ; clear bit 3 to disable seq'r 3 STR R0, [R1] ; Select trigger source LDR R1, =ADC0_EMUX LDR R0, [R1] ; clear bits 15:12 to select SOFTWARE STR R0, [R1] ; trigger ; Select input channel LDR R1, =ADC0_SSMUX3 LDR R0, [R1] BIC R0, R0, #0x000F ; clear bits 3:0 to select AIN0 Lecture #18 16

17 Finish Setup, Enable Sequencer ; Config sample sequence LDR R1, =ADC0_SSCTL3 LDR R0, [R1] STR R0, [R1] ; set bits 2:1 (IE0, END0) ; Set sample rate LDR R1, =ADC0_PC LDR R0, [R1] STR R0, [R1] ; set bits 3:0 to 1 for 125k sps ; Done with setup, enable sequencer LDR R1, =ADC0_ACTSS LDR R0, [R1] ; set bit 3 to enable seq'r 3 STR R0, [R1] ; sampling enabled but not initiated yet Lecture #18 17

18 Sampling Subroutine ATD_Sample PUSH {R0-R4} ; start sampling routine LDR R3, =ADC0_RIS ; interrupt address LDR R4, =ADC0_SSFIFO3 ; result address LDR R2, =ADC0_PSSI ; sample sequence initiate address ; initiate sampling by enabling sequencer 3 in ADC0_PSSI ; wait 3 instructions ; check for sample complete (bit 3 of ADC0_RIS set) ; when complete, read results in ADC0_SSFIFO3 register ; reset the sample complete bit by setting bit IN3 of ADC0_ISC ; restore registers R0-R4 and return to caller Lecture #18 18

19 A/D Code Summary The previous code is from our lab code: ATDonline.s Modified slightly for lecture purposes Leaves a little (but not a lot) for you to do Has been tested! The basis for your Lab #6 work, but you ll need to do more: turn the binary data into several ASCII digits representing the voltage, and then displaying these ASCII digits on Termite. Look through this code! Be sure you understand it. For example, Practical #2 could ask you to do a slightly changed version of something from this lab Note: There are several very complex capabilities in the TM4C A/D System. You need to understand only those that have been a part of this lecture and of Lab #6. Lecture #18 20

20 A/D Converter Formulas for any Successive Approximation Converter Let V d be binary integer in data_register (12 bits) Let n be number of bits of conversion (12 in our case) Let V analog be the analog voltage corresponding to V d then V d = truncate(2 n (V analog -V RL )/(V RH -V RL )) with V d in range of [0 to 2 n -1] and V analog-low = V RL + (V RH -V RL ) V d /2 n V analog-high = V RL + (V RH -V RL ) (V d +1) /2 n Minimize max error: V min-max = V RL + (V RH -V RL ) (V d +½) /2 n For the TM4C, V RH = 3.3 v. and V RL = 0 v. Lecture #18 21

21 A/D Result Example 12-bit A/D converter. V RL = 0 v. and V RH = 3.3 v. We have requested a conversion on AIN0, and find the following register value: 0xC94 What voltage does this represent? Solution: V analog-low = (3.3) 0xC94/2 12 v. V analog-hi = /4096 = v. = /4096 = v. V min-max = /4096 = v. V RANGE = ( to ) v. Note: V RES-12 bit = 3.3/4096 = v. = 806 µv. Lecture #18 22

22 A/D Result Example Reversed Given the same conversion system of the previous slide, what if the analog voltage were v.? What digital measurement does this represent? Solution: V d = truncate(2 n (V analog -V RL )/(V RH -V RL )) = truncate(2 n (1.9550)/(3.3)) = truncate(4096 (1.955)/(3.3)) = 2426 V d = 0x97A What lower and upper voltage bounds does this conversion fall into? What is the best (smallest max error) estimate of V analog from this measurement? Lecture #18 23

23 Calculations Needed for Lab The A/D Converter gives a 12 bit result Vd, 0x000 to 0xFFF, corresponding to 0 v. to 3.3- v. (0x1000 would correspond to exactly 3.3 v.) To get the numerical value for the voltage Vn corresponding to the digital reading you could use: Vn/3.3 = Vd/4096 or Vn = Vd (3.3/4096) But this would give us only the integer component part of the answer. Is there any simple way to get the answer to include p digits of precision? What is the appropriate value of p for our D/A Converter? Think about it. Choosing p is easy; there s a simple method to get Vn; it s YOUR job to find it. Lecture #18 24

24 Last Steps with Data Suppose you had a solution that had the integer volts component: X, the tenth volt component: Y, the hundreth volt component stored as the integer 100X+10Y+Z. E.g volts stored as 237. You would then need to build an ASCII string with the X digit followed by a decimal point followed by the Y digit followed by the Z digit. So you simply need to extract X, Y and Z (or the appropriate number digits, p, requested in the lab and then send their ASCII representation to a string in the correct positions. Lecture #18 25

25 Summary Successive Approximation: Good compromise for A/D Conversion speed and accuracy Method for A/D conversion and with TM4C and sending to a string has been explained and will be used in Lab #6 The TM4C capability is extensive and exhaustive (and can be exhausting if you use all of it) Next Lecture: SysTick Real Time Clock- Section 11.4 in text (same as our SysTick subsystem) Lecture #18 27