EE 330 Final Design Projects Fall 2016

Transcription

1 EE 330 Final Design Projects Fall 2016 Students may work individually or in groups of 2 on the final design project. Partners need not be in the same laboratory section. A WEB site from which projects can be selected is found at You can look at the WEB site at any time but the project selection will not be enabled until 8:00 a.m. on Sunday Nov.6. On the WEB site you will have the option of rank ordering 3 projects. Assignment priority on projects will be based upon the order in which the project requests are received after the entry option on the WEB site is activated. Please make only one request per group. At most 3 groups will be assigned per project. We will try to notify you about final project selections by 5:00 p.m. on Sunday Nov. 6. Please start early on your project, and recognize that some projects may require a bit of research and on-your-own learning. If you get stuck on how to accomplish a task, please consult with either one of the TAs or with the course instructor for guidance on how to resolve issues that may arise. READ each project carefully and thoroughly! You cannot switch projects once you have been assigned to the project. Project List Project 1 Light Intensity Detector (IC or Hardware) Project 2 Class D Amplifier Project 3 Reduced Function Calculator Project 4 Digital Stopwatch/Timer Project 5 Laser Controlled Race Car Project 6 Digital Potentiometer/Amplifier/DAC Project 7 Transceiver Block Project 8 Laser Reaction Game [1] Project 9 Analog Hardware Trojan Project 10 Water Fountain Controller Project 11 Self Defined - Xilu - Andrew - Andrew - Robert - Pallavi - Andrew - Robert -Pallavi - Robert - Xilu -Pallavi

2 Project 1 Light Intensity Detector (IC Option) This project offers two options. One option is to do the design in a 0.5u CMOS process. The other option is to do this project with commercial components and demonstrate performance in the laboratory. You only need to do one of the two options for this project. Option 1 IC Design Using a commercial photo-detector, such as a photoresistor or photodiode, design an integrated circuit that will measure incident light intensity. The circuit should be designed in a 0.5u CMOS process and should be complete through post simulation. The incident light intensity should be displayed on a commercial 7-segment display that has a minimum of 3 digits. You must specify the exact display you will be using for your design. You may use any photo-detector you choose for the design but you must specify which commercial photo-detector you will be using. Your circuit should drive the display directly without the need for any additional components. The circuit should be capable of displaying the lumen intensity in either lux and foot-candle units. Switching between them should be done with a pushbutton interface. You can include any number of switches for programming the device. The device should operate with inputs ranging from 1 lux to 100,000 lux. The accuracy should be within 10% of the displayed value throughout the entire input range. The circuit should be designed so that all your need to operate the device is the circuit you design, a single dc power supply, the 7-segment display, the push-button select switch, any number of programming switches, and a specified commercial photodetector. Option 2 Hardware Design Option Specifications are the same at for Option 1 except it is to be built with commercial off the shelf (COTs) hardware. You may used either a commercial ADC or build your own ADC. No microcontrollers can be used in the design. Performance should be verified experimentally. A commercial light intensity meter will be available to calibrate and to experimentally verify performance.

3 Project 2 Class D Amplifier In today s technologies engineers continuously look into different ways to efficiently amplify signals. Class A, Class B, and Class AB amplifiers are traditional amplifiers but have two major drawbacks; the efficiency of these amplifiers is at most 50%s and consequently the power consumption is high and the size and weight are large. The architecture of a Class D amplifier has the theoretical potential to have 100% efficiency over a wide range of output levels and the physical size can be very small. These are now often used in the audio industry to be able to drive bigger speakers from a small signal with optimal efficiency. Many companies in the industry have Class D chips on the market. The goal on this project is to design a Class D amplifier in a 0.5u CMOS process. The design should be complete through post simulation. Details follow: The amplifier should drive a single 8Ω speaker and provide output power up to 500mW. It should be powered by a single 5V dc power supply and should operate with inputs from 100Hz to 5KHz. The gain can be controlled with either an external potentiometer or an external dc control voltage. It should have a Mute option. When the Mute signal is high, the output should be disabled. The efficiency for outputs from 10mW to 500mW should be at least 80%. The following pins should be provided. Ground, VDD, Mute,Volume (may use 1 or 2 pins),and Output (may use 1 or 2 pins). The speaker can be either directly coupled or capacitor coupled. If capacitor coupled, the coupling capacitor can be external. A complete testbench in virtuoso show be included. Project 3 Reduced-Function Calculator The practical uses of a calculator from engineering to financial accounting are extensive. The design of a scientific calculator is beyond the scope of this course. In this project the objective will be to design a reduced-function calculator in a 0.5u CMOS process. The calculator should perform two elementary mathematical integer operations, addition and subtraction. The design should be compatible with a specific commercial keypad and a specific commercial 7-segment display that has a minimum of 3 digits. You must specify the keypad and the display and identify a source where these devices can be purchased. The design should be complete through post layout simulation and should include a testbench to verify circuit performance. Project 4 Digital stopwatch/timer In this project, you will be asked to design a digital stopwatch/timer. The circuit should be designed in a 0.5u CMOS process and should be complete through post layout simulation. The time should be displayed on a 7-segment display. You must specify the exact display that you will be using for your design. If the circuit is fabricated, it should drive the display directly without the need for any additional components. You can include any number of push button switches for programming the device. The time-base accuracy you have on this project need

4 not be real accurate, +/-30%, is acceptable (this circumvents the need for a crystal oscillator). The timer should also drive an acoustic output device, a buzzer or alarm, when used in the timer mode. Specify exactly what buzzer or alarm device is to be used and include any necessary interface circuitry to drive the acoustic output device. The circuit should be designed so that all that is needed to operate the device is the circuit you design, a single dc power supply, the 7-segment array, and the push-button switches. Project 5 Laser controlled race car In this project you are to design a laser controlled race car. A radio-controlled car that can be modified by removing the rf controller and adding the laser control will be provided. Other components needed for the design can be obtained from the part shop. Though two persons may work on a project, the car should be operated by 1 person using a single laser pointer during testing. The car is to be designed with 5 separate receivers; Receiver 1: Receiver 2: Receiver 3: Receiver 4: Receiver 5: Causes car to go forward Causes car to go backward Causes car to turn left Causes car to turn right Causes car to recenter the wheels Operation: The user will shine the laser from up to 3 stories away at any given receiver to operate the vehicle. To go forward or backward, the user must hold the laser on the receiver. If the laser is removed, the car should stop immediately. To turn, the user will shine the laser at the left/right/center receivers (equivalent to turning the wheel of your car), the wheels will lock in any 1 of 3 directions; all the way left, all the way right, and center. From there the user can then shine the laser on forward or backward and effectively the car will turn. The car design is entirely up to you and remember it needs to be mobile (it s a car), you may need batteries. All groups will receive the same starting equipment. The area of all designed laser receivers (photodector, photoresistor, photodiode, etc) will be limited to less than ½in x ½in. The final demo for this project will include a small obstacle course and a race for those groups that selected this project. Project 6 Digital Potentiometer/Amplifier/DAC This project is for the design of a digital potentiometer/amplifier/dac integrated circuit. The design should be in a 0.5u CMOS process and should include layout and post-layout simulation results. This multi-purpose digitally controlled analog building block structure can serve as a digital potentiometer, an inverting or noninverting amplifier, or as a DAC depending upon the state control inputs. A method of designing the operational amplifier will be provided to you

5 by your TA. Assume VDD=2.5V and VSS=-2.5V. The state control signals AO and A1 will identify one of four states of operation of this device. The operation control signals CO, C1, C2 and C3 are used to control the characteristics of the device in each of the four states. When AO and A1 are high, the circuit is to perform independently as a digital potentiometer and an operational amplifier. The digital potentiometer should have 16 taps, each with a nominal impedance of 5K. When A0 is high and A1 is low, the circuit is to perform as a 4-bit DAC where the op amp is connected in a unity gain configuration to a tap on the potentiometer and the DAC output is determined by the control settings on the potentiometer. The DAC input, often termed VREF should be connected to one end of the resistor string and the other end should be grounded. When A0 is low and A1 is high, the circuit is to perform as a programmable inverting finite gain amplifier. One end of the resistor string should go to the op amp output, the wiper to the - input and the other end of the resistor string to the input. Finally, when A0 is low and A1 is low, the circuit is to perform as a programmable noninverting finite gain amplifier. The digital potentiometer is similar in principle to the Maxim DS 1666 but with a reduced number of taps, with parallel rather than serial control of the tap position, and with a linear taper rather than an audio taper. Project 7 Transceiver Block This project is for the design of a transceiver integrated circuit. The design should be in a 0.5u CMOS process and include layout and post-layout simulation results. Serial channels are widely used for communicating between computers that may be a few feet apart of on the other side of the world. Invariably the data that is to be transmitted is parallel data so a parallel to serial conversion is needed to get the data ready for transmission and a serial to parallel conversion is needed to convert the data from serial data to parallel data at the receiver. Invariably the data is transmitted from a synchronous system on transitions of a clock and invariably the data at the received is synchronized relative to a clock at the receiver. Unfortunately the two clock frequencies may not be exactly the same and unfortunately it is generally considered impractical to transmit the clock signal to the output so the clock must be recovered from the serial data stream itself. This is often done with a phase-locked loop (PLL) at the receiver which contains an internal voltage controlled oscillator (VCO) that must be locked to the input data sequence. The recovered clock is simply the output of the VCO in the PLL. The PLL must obtain regular measurements of the phase difference between the VCO output and the data input to maintain lock. It is common in many applications to have periods of time where no data is available and during these intervals, long strings long serial strings of 0 s or 1 s must be transmitted. Unfortunately, it is difficult (actually impossible) for the PLL to maintain lock in the absence of transitions on the incoming data stream. To circumvent this problem, the parallel data is often coded prior to serial transmission to guarantee that there will be ample transitions in the transmitted data to recover the clock. Of course, the received data must be decoded at the output to recover the intended data sequence. 8B: 10B and 4B:5B coders are often used for this purpose. In an nb: (n+1)b coder, an n-bit word is converter to an n+1 bit word with a fixed mapping that will guarantee that the maximum number of consecutive 0 s and 1 s in the transmitted data stream is small (like 3 or 4) irrespective of the nature of the input data.

6 In many communication channels, data itself is arranged in packets in which a fixed number of bytes are put together sequentially to form a packet. A header is generally placed at the front of each packet. This header serves two purposes. One is to give information about where the packet is to go or where it comes from. The second is to allow for synchronization of the packet so that the bytes within the packet can be appropriately framed. The design of transceivers which perform these functions is widely undertaken in industry but it is beyond the scope of this course. This project will focus on a part of a transceiver block associated with the encoder and decoder. The PLL that is usually used for clock and data recovery is not a part of this project. Details follow. a) Devise a 4B-5B coding scheme that will guarantee at most 3 consecutive 0 s or 1 s for any input data sequence. b) Design a circuit that will take an 8-bit wide parallel data sequence at 10K bytes/sec and serialize it using the 4B-5B coding scheme you devised in part a). You may assume that a 10KHz clock is present that is synchronous with the input data. c) Design a receiver that will take the serial data string, decode it, and recreate an 8-bit wide data sequence at the output. d) Design a comma detect circuit that will allow for proper framing of the received data. The comma should be a 10-bit code that cannot represent any data sequence. The comma would be inserted in place of a byte in the transmitted data stream for synchronization and the receiver should frame the received data relative to the detected comma whenever a comma is detected. After the comma is detected, the received should be in synch with the input data sequence. Project 8 Laser Reaction Game Design a laser, build, and demonstrate a laser beam reaction game to see how fast players can react to a sequence of visual cues. In this project, you will create a rectangular 3 x 3 grid of Lamp:photo detector pairs spaced on a wall at a distance of 24 inches from each other. The middle detector pair will have a second lamp of a different color. The player will stand or sit at a distance of 8 feet or more from the wall. A laser pointer will be used to play the game. Whenever game is complete or whenever it is time to start a new game, the middle lamp that is a different color will be lit. The player will start the game by shining the laser at any of the 9 photo detectors. A random sequence of lamps will then be lit and the reaction time to shoot the light sensor adjacent to the lamp that is lit will be measured. After the target is hit, the lamp will go off. This will be repeated 8 times. After the 8 th lamp goes off, the game is over and the total reaction time is to be displayed on a 7 segment display in seconds. Once the reaction time is displayed, the game should be restarted. The reaction time of the previous player should remain on the display until the following player completes playing the game. If the components you need are not available in the electronics parts shop, you will need to order the early enough to complete the design. Project 9 Analog Hardware Trojan Most of the work on security focuses on software security and the detection and elimination of software Trojans. However, the semiconductor industry realizes that system

7 security can also be compromised by the malicious insertion of hardware Trojans. In the hardware security area, most emphasis is on the concerns about possible Trojans in the digital hardware. But there is also a vulnerability for the presence of Trojans in the analog hardware. This project will focus on the design of a circuit that harbors an analog hardware Trojan. Specifically, it will focus on the design of an injection-locked ring oscillator that carries the Trojan in a secondary mode of operation that is difficult to detect. Specifically, the circuit will be designed to operate at one frequency but will sustain oscillation at a different frequency if appropriately triggered. Those that choose to work on this project will be paired with one of the graduate students working on analog hardware Trojans in our department. A 1-hour discussion with the instructor of the course should be adequate to gain a sufficient understanding of this project not only be able to work with the injection-locked ring oscillator but also to appreciate the vulnerability that exists to these Trojans. Through the description here is limited, it is anticipate that the time and complexity of this project should be about average or below average compared to the other projects listed. Project 10 Water Fountain Controller This project is for the design of a high capacity water fountain controller. The design should be in a 0.5u CMOS process and include layout and post-layout simulation results. The circuit should operate with a dc supply voltage of VDD=5V. In a high-traffic area there is a water fountain that is able to provide both hot water and cold water. The water fountain has two tanks, one for hot water and the other for cold water. The water fountain has a mechanism to heat up or cool down the water. The temperature of the hot water is ideally 160F and the temperature of the cold water is ideally 40F. However, during periods of high use, water entering the tanks will change the temperature of the water. During normal operation under low-use conditions the standard heater for the hot water tank will turn on any time the temperature of the water near the outlet drops to 155F and then turn off when the temperature reaches 160F. Correspondingly, any time the temperature of the water near the outlet of the cold water tank rises above 45F the standard cooler will turn on and it will turn off when the temperature is reduced to 40F. During high use periods, high capacity coolers and heaters will be use. Any time the hot water temperature drops below 155F the high capacity heater will come on and will turn off when the temperature reaches 160F. Correspondingly any time the cold water temperature exceeds 45 degrees, the high capacity cooler will come on and will turn off when the temperature drops to 40F. Assume the tanks have circulating pumps to keep the temperature in the tanks reasonably uniform.

8 Each tank has four water level sensors that indicate when the water level is above 95%, above 80%, below 30% or below 20%. Whenever the water level drops below 80% a signal is sent to a valve that turns on the water supply to the tank. Any time the water level reaches 95%, the water entry valve is turned off. The 20% water level sensor is used for safety control. Any time the water level drops below 20% in the hot water tank, all heaters will be turned off and any time the water level drops below 20% in the cold water tank all coolers will be turned off. When below 20% the water output valves will be turned off as well. The heaters or coolers will come on again only after the water level gets up to 30%. During high use, replacement water entering either tank may be coming in so fast that the hot water temperature or the cold water temperature can not be maintained at the target levels. As long as the temperature in the hot water tank is above 150F, hot water will be available to the consumer an any time the temperature in the cold water tank is below 50F, cold water will be available to the consumer. But if the hot water temperature drops below 150F a red indicator light will come on and the hot water output valve will be disabled an any time the cold water temperature raises above 50F a second red indicator light will come on and the cold water output valve will be disabled. When the water fountain is operating normally, a green light by the hot water outlet valve will be on indicating the hot water is available and the hot water outlet valve will be active. Likewise a green light by the cold water outlet valve will be on indicating the cold water is available and the cold water outlet valve will be active. This project involves the design of a controller for this water fountain. Assume the water level sensors have a standard Boolean output that changes states when the set water level is reached. Assume the temperature sensors have an analog output with the high temperature sensor having an output 5 T 165 T 140 VHIGH T 140 T T 140 and the low temperature sensor having an output 5 T 55 T 30 VLOW T 30 T T 30 where T is in degrees F. Thus each tank has 8 boolean outputs summarized as For hot water tank:

9 B0: Level above 95% B1: Level above 80% B2: Level above 30% B3: Level above 20% For cold water tank: B4: Level above 95% B5: Level above 80% B6: Level above 30% B7: Level above 20% The controller is to have 12 Boolean outputs. Each should provide 0V and 5V as standard high and low logic levels and should be able to sink or source a load current of at least 25 ma with a change in the high or low logic level of at most 1V. B9: Turn on water to hot water tank B10: Turn on water to cold water tank B11: Disable outlet valve on hot water tank B12: Disable outlet valve on cold water tank B13: Turn on green LED for water ready in hot water tank B14: Turn on red LED for water not available in hot water tank B15: Turn on green LED for water ready in cold water tank B16: Turn on red LED for water not available in cold water tank B17: Turn on standard heater in hot water tank B18: Turn on high capacity heater in hot water tank B19: Turn on standard cooler in cold water tank B20: Turn on high capacity cooler in cold water tank

10 Project 11 Self-Defined This project will be personalized to the individual interests of the student. All proposals for the self-defined projects should be approved by the course instructor. Selfdefined projects can be either for an integrated circuit design or for a hardware implementation.