ULTRASONIC TRANSMITTER & RECEIVER

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1 ELECTRONIC WORKSHOP II Mini-Project Report on ULTRASONIC TRANSMITTER & RECEIVER Submitted by Basil George Nikhil Soni

2 AIM: To build an ultrasonic transceiver to send and receive data packets. Introduction to Design: In this project we send data packets consisting of 3 data bits and 1 start bit. The START bit is for the synchronization of clocks of the transmitter and receiver. Each data bit is sent for a pre-defined time period, thus eliminating the need for sending a STOP bit. Clearly the main parts of this transceiver are: 1) Transmitter 2) Receiver Transmitter: When a 1 has to be sent, a burst of 40 khz is sent to the Ultrasonic transmitter. Ground voltage is sent when a 0 has to be sent. We will first take the input from the user that is 3 bits, and load them into a shift register using its parallel load feature. The input bits are preceded by a start bit and logic 1 of start bit denoting that coming bits are input. So we would be sending total 4 bits: 1 start bit and 3 input bits which are parallelly loaded into shift register. These bits are sent one by one by shifting them using serial shift feature of the shift register to the reset pin of the astable. According to the logic of these bits, 555 timers would be enabled if logic 1 and disabled if logic 0 and producing a 40 KHz square wave burst which is fed as input to sonar transmitter. So

3 when the bit is logic 1 the 555 timer is enabled and the 40 KHz square wave burst is transmitted. And when the bit is 0 0V is transmitted. The shift register used is 74LS95 which has both serial and parallel load feature and separate clock inputs for both serial and parallel load. We first discuss about the clock that will trigger this shift register. CLOCK To make a clock we are using 555 timer IC to produce a square wave (pulse). The square wave consists of 4 pulses as required in the logic. The basic idea behind this is we are using two 555 IC s, one producing a monostable wave and the other one an astable wave. The circuit works as follows: The monostable circuit produces a monostable pulse controlled by a push button of time period let say T. This monostable pulse is sent to the reset input of the second 555 working in astable mode. So when the monostable is high the astable circuit starts working and the time period of the astable circuit is T/4 so it generates 4 pulses.

4 The NOT of the monostable pulse is given into the mode pin of the shift register. So when the monostable is 1 the shift register is in serial mode and when the monostable is 0 the shift register remains in the parallel load mode. The 4 clock pulses of the second 555 are given to the serial clock of the shift register. So with these 4 clocks the shift register will shift out the 4 bits at every negative edge of the clock. The NOT of astable is given to the parallel clock of the shift register, the input at this parallel clock pin which initially was 1 changes to zero hence giving a negative edge, due to this the inputs are loaded into the shift register and as soon as we press the switch and they get shifted also at the same clock. SHIFT REGISTER We are using 74LS95 IC for making shift register. It is a negative edge triggered IC and has different clocks for parallel load and shift functionality. The switch is directly connected to load clock which loads the bits given as input simultaneously on releasing the switch. Bouncing effects would not matter as same data bits would be loaded more than once. The shift register clock is connected to the 4 pulses coming out of the astable as discussed earlier. The output of the monostable is

5 inverted using 74LS04 and then used as a mode bit input to the IC. The output of this Shift Register is given to the reset pin of astable circuit which is generating 40 khz square wave. In 4 clock pulses the 4 values which were parallel loaded are shifted in the register. If Mode Bit == 1, then parallel loading. If Mode Bit ==0, then serial shifting. RECEIVER: Now we have transmitted the 3 data bits and 1 start bit by the transmitter. So now we have to successfully receive the transmitter information and display it on LEDs. So the SONAR receiver will receive the Ultrasonic sound transmitter by the SONAR transmitter using 40 KHz square wave. The SONAR sensor gives a sine wave as output when it receives ultrasonic sound at 40 KHz. So we have to change (rectify) this received sine wave into 1 and when there is no sine wave we have to change it into zero. As the sine wave that we receive has white Gaussian noise and may have some DC offset. So first we pass this received signal through a high pass filter. So we get only the high frequency components viz. 40 KHz sine wave. As the amplitude of the received sine wave is very small so we will amplify it by a factor of 10 using a non-inverting amplifier. After that we rectify this voltage and pass through a capacitor so that we get a DC value. We then compare this DC voltage by some threshold value using a comparator. And so when the received DC voltage is above the threshold the comparator gives 1 output signifying that 1 is received otherwise it gives 0 as output signifying that 0 is received.

6 We will send the comparator output to the shift register and the clock triggering subsystems that will store these received bits in the shift register and then we will display the received bits using LEDs. Incoming bits SONAR Receiver High Pass Filter (cutoff at 1kHz) Rectifier (Half Wave) LM324 Comparator 74LS95 Shift Register Serial Input Serial Clock Astable (555) Monostable (555) Output to LEDs Mode Bit (always 0) HIGH PASS FILTER A high pass filter is used at the output of the receiver so as to get rid of the DC offset and the low frequency components received which is believed to be noise due to A.C voltage used by the regulator to give D.C. AMPLIFIER The output of the receiver module of sonar after being passed through a high pass filter is amplified using LM741 opamp IC in non inverting configuration. The net gain is given by 1+R2/R1. Here we are using an amplification factor of 20, which quadruples our output of receiver

7 which is around.1v in amplitude to around 2V when transmitter and receiver are kept close to each other. RECTIFIER We are using a half wave rectifier for rectifying the signal. For decoding of the signal full sign wave must be converted to constant voltage. With half wave rectifier and a capacitor of capacitance 10micro farad we are able to convert sign wave to a constant DC voltage (about 0.5V to 1.5V). COMPARATOR The DC voltage that we get, we give it into the positive terminal of one of the comparators of LM324 IC. On the negative terminal we give a threshold voltage of 0.4V. So whenever the input DC voltage is above 0.4V the output of the comparator is 1 signifying that 1 is received otherwise the comparator gives 0 output signifying that 0 is received. CLOCK We are using configuration of clock as in transmitter. But here the trigger of the monostable 555 will come from the NAND of the comparator output with the other input of the NAND gate as always 1, so that a NOT logic is created. So when the receiver does not receive anything the output of the comparator is 0 and it s NOT will remain 1. But as soon as the receiver receives the start bit 1. The NOT of the comparator output goes to 0 thereby triggering the monostbale. And the output of the astable will give 4 clock pulses of the same time period as in transmitter. These 4 pulses are given the serial load clock of the shift register. So at every negative edge of this clock the shift register shifts in the received bit from the comparator.

8 Result: We were able to successfully send data packets and decode them at the receiver. Challenges Faced: 1) Synchronization of clocks of transmitter and receiver 2) Noise at the ultrasonic receiver

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