Analog Output. Vin. + C5 100u/16V. 100n VSS 1N4148 GP0. R1 10k GP1 GP2/T0CKI MICRO VSS

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1 Features General Description ÿ Direct connection to PIR sensor elements ÿ Temperature measurement ÿ Differential PIR Input ÿ Digital Signal Processing (DSP) ÿ Single wire serial interface () ÿ Operating voltage down to.7v ÿ Low current consumption ÿ High dynamic range ÿ High supply rejection Applications ÿ ÿ ÿ Integration with PIR sensor elements (hybrid modules) High end PIR systems Building Management Traditional analog PIR detector The E93.06 integrated circuit is designed for interfacing Passive Infra Red (PIR) sensors with micro-controllers or processors. A single wire Data Out, Clock In () interface is provided for interfacing with a micro-controller. Multiple devices can easily be operated at the same time. One PIR sensors ceramic elements connect directly to the PIR inputs. The PIR signal is converted to a 4 bit digital value. The E93.06 contains an on chip temperature measurement circuit with a resolution of better than 0.05K. The PIR sensor voltages and the temperature value are supplied to an external microcontroller through the interface. Digital Sensor Assembly with E93.06 The E93.06 PIR Signal processor replaces the JFET and optional discrete components. New digital PIR detector Traditional Analog Output PIR Analog to Digital Temperature Analog to Digital E93.06A Serial Interface Digital Output 3 C3 00n U3 78L05 Vout GND Vin C4 00n + C5 00u/6V D SN4007 J Voltage J U DIGITAL C 470n C 00n 3 4 U GP5/OSC/CLKIN GP4/OSC GP3/MCLR/VPP MICRO GP0 GP GP/T0CKI R 0k N448 D Q BC37 RE RELAY-SPST Alarm Loop Typical application circuit for alarm motion sensor /7

2 Absolute Maximum Ratings Parameter Symbol Min Max Unit Remarks Supply Voltage V DD V Current into any pin ma One pin at a time Storage Temperature T st C Stresses beyond those listed above may cause permanent damage to the device. Exposure to absolute maximum ratings may affect the device reliability. ESD protection: all pins will be able to withstand a discharge of a 00pF capacitor charged to.6kv through a 500Ω series resistor. Test method: MIL-STD-883D method 305. Operating Conditions (T=5 C, unless stated otherwise) Operating temperature range: -5 to +70 C Parameter Symbol Min Typ Max Unit Remarks Supply Supply voltage V DD V Supply current I DD 0 5 µa V DD =3.3V Digital interface Input low voltage V IL 0 %V DD Input high voltage V IH 80 %V DD Pull down current 00 µa IN/Out to V DD Pull up current 30 µa IN/Out to V SS Input capacitance 5 pf interface setup time t s /F CLK µc defines TREP Data clock low time t L 0. µs avoid update low time t L + t bit /F CLK to avoid update Data clock high time t H 0. µs Data bit settling time t bit µs C LOAD = 0pF low time to ensure update t W 64 /F CLK Analog Inputs PIR+, PIR-, Analog to Digital Converter Input leakage - fa V IN = -0mV.. +0mV Input Impedance R IN 30 GΩ Referred to V SS PIRIN input voltage range mv Differential mv Common Mode ADC Resolution 4 Bits Max Count = ^4- ADC Sensitivity µv/coun t ADC Temperature Coefficient ppm/k RMS output noise referred to input.5 0.5Hz.5 Hz 0.5 Hz 0.4 5Hz ADC Offset counts Digital Filter Type & Cut off Freq. F 0 F CLK *.4 / 048 / PI Hz nd Order BW LPF Digital Filter Sampling Freq. F S /3 F CLK Interrupt cycle T I 5 / F CLK /7

3 Temperature Measurement Gain 80 Counts/K -0ºC to +90ºC Measurement Range ºC Linearity -5 5 % -0ºC to +90ºC Count Value at Ambient ºC Oscillator Oscillator Frequency F OSC khz clock frequency F CLK F OSC / Temperature Dependency -000 F OSC / 000 ppm/k -0ºC to +80ºC Table : Operation conditions Detailed Description PIRIN0 NPIRIN0 ADC 0 PIR Decimator ( nd Order BW LP Filter) Serial Interface ADC Temp. C Decimator Voltage Reference Oscillator Fig : Block diagram of E93.06 Oscillator The IC contains an on chip low power oscillator, with a frequency of 64 khz. All time related signals and the cutoff frequencies of the digital filters are related to the oscillator's frequency. PIR inputs and A/D conversion The analog to digital converter generates a digital signal from the voltage level measured between the PIRIN and NPIRIN terminals. Temperature Measurement The on chip temperature is measured by converting the temperature dependent voltage of the reference to a digital value with a resolution of better than 0.K. Decimation Digital Filters The output signal from the PIR ADC is processed through a second order Butterworth low pass filter with a sampling rate of khz. The output signal from the Temperature ADC is converted to a 4 bit value by down sampling to Fclk/5. 3/7

4 Parallel to Serial Data Latch New data is transferred from the decimators to the serial interface every 3 system clocks, if the output is not active (being read). If the micro controller reads the register faster than the update rate of the filter, the data read is 0. The E93.06 generates an interrupt every 5 system clock cycles, if the microcontroller reads all 8 bits within 3 system clock cycles. The interrupt is indicated by the E93.06 by pulling high. The microcontroller must wait for us. It then generates a low to high transition on the line, before it samples the data bit. The first bit read is the MSB. This process is repeated until all 8 bits have been read. After the last bit is read, the microcontroller must force low level and subsequently release. If reading is interrupted for more than system clock with the interface at low level, the output data latch is updated with new values. Reading can be interrupted, while the interface is forced high. The output latch is not updated in this condition. The E93.06 accepts readout with µc defined timing. The interrupt signal can be ignored and reading frequency can be up to FCLK/64. In this mode, the µc has to force to a high level for the duration of 3 device clock cycles (3/FCLK) and subsequently read out the data bits as described in the timing diagram below. Interface MSB LSB t S t L t H t bit t W Data Bit T REP MOS device drive Data ready on MOS device Micro controller drive Micro controller sample bit Fig 3: Timing diagram for the interface 8 x Data Bit 3 0 CHANNEL0 3 0 TEMPERATURE T REP Fig 4: Data words available on interface 4/7

5 ADC Input Stage PIRIN Rp IP Sp ADC NPIRIN Rn Sn Out of Range Fig 5: Input structure of the ADC Out of Range Detection The dynamic range of the ADC Input stage is approximately +/- 50mV. To avoid saturation, the E93.06 contains out of range detection logic, which detects values above 587 (97% of range) and below 5 (3% of range). If the values are outside this range, the switches Sp and Sn are closed for the duration of 5 system clocks. This ensures fast settling after disturbances. The input impedance of the actual ADC (IP / IN) is practically infinite. 5/7

6 E93.06 SINGLE CHANNEL PIR SIGNAL PROCESSOR Pad Names Pad Name NPIRIN PIRIN Pin No. External External TO5-3 3 Description Negative supply voltage Negative PIR sensor input Positive PIR sensor input Positive Supply voltage TCLK TEST External Test clock, Leave Open Data Out Clock In, Soft driver, MCU interface Test mode select, Leave Open Table 3: Device Pin Out Pad Positions TEST TCLK PIRIN0 Pad Name PIRIN NPIRIN TEST TCLK X Y Database Table 4: Pad positions NPIRIN0 Fig 6: Die with pad names top view Contact Information Microsystems On Silicon (Pty) Ltd. Pretoria, South Africa Tel: +7 () Fax: +7 () sales@mos.co.za Visit our website for the latest information Elmos Semiconductor AG Data Sheet 6/7 QM-No.: 5DS0089E.0

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