FD MOS SOI CIRCUIT TO IMPROVE THE THRESHOLD OF DETECTION OF A CO-INTEGRATED AMORPHOUS PHOTODIODE.

Transcription

1 F MOS SOI CIRCUIT TO IMPROVE THE THRESHO OF ETECTION OF A CO-INTEGRATE AMORPHOUS PHOTOIOE. M. Estrada 1, A. Afzalian 2,. Flandre 2, A. Cerdeira 1, H. Baez 1, A. de ucca 3. 1 Sección de Electrónica del Estado Sólido (SEES), CINVESTAV, Av. IPN No. 2508, Apto. Postal , F, México; mestrada@mail.cinvestav.mx 2 aboratoire de Microélectronique, Place du evant 3, B-1348 ouvain-la-neuve, Belgium; flandre@dice.ucl.ac.be 3 Sección de Computación, CINVESTAV, dlpa@delta.cs.cinvestav.mx ABSTRACT Integration of amorphous diodes with a fully depleted silicon on isolator (F SOI) MOSFET circuit is first presented in this paper. In addition we present a very simple circuit fabricated in SOI, which when integrated with an amorphous silicon photodiode significantly improves the detection of current variation through the diode, when it is illuminated. The circuit takes advantage of the better subthreshold characteristic of F SOI MOSFET with respect to bulk devices. The use of one additional reference source voltage to adjust the operating point of the photodiode, allows to obtain a very significant increase in the ratio of the detected current when the diode is under illumination with respect to when it is not. This ratio is much higher than what can be obtained using a simple diode. Circuit solutions used to amplify the current when the diode is illuminated are usually more complicated and involve a capacitor or more transistors than the circuit we present. All the other properties of the photodetector, as its spectral characteristic and linear dependence of detection with light intensity are maintained. The circuit can also be used in conjunction with other circuits for further amplification and/or processing. I. INTROUCTION Amorphous silicon (a-si:h) photodetectors are widely used in low cost electronics. They are used as simple photodetectors, or integrated in a matrix of pixels. In the last years, much effort has been dedicated to the integration of these devices with MOSFET bulk MOSFET ASICs, the so called Thin Film on ASIC technology (TFA), which seems interesting for new applications, and provides separate design and optimization of the two components [1]. This TFA is done depositing the a- Si:H devices on top of a previously fabricated MOS ASIC. In this work, we present for the first time a- Si:H photodetectors fabricated on top of a F SOI MOSFET ASIC. In addition, we report the advantages of using a very simple circuit consisting of only two F SOI MOSFET transistors to bias and sense the changes of current through the photodiode and at the same time provide a very significant detected ratio of illuminated to dark current. An additional voltage source is used to adjust the operating point of the photodiode so it works in the region where the effect is observed. The ratio we obtained is several orders higher than what can be obtained using only the photodiode. At the output of the current mirror circuit, other circuits can be added to further process the output signal. 2. EXPERIMENTA PART AN ISCUSSION The SOI-IC was fabricated using the process indicated in [2]. The a-si:h diode was fabricated on top of the SOI-IC using a fabrication process indicated in [3]. After the SOI IC was finished, it was passivated and a photolithography was made on the passivation film was made to open the contacts used to connect the diodes to be fabricated with the already finished IC. The circuit schematic is shown in Fig. 1, which has the form of a very simple current mirror circuit. In the chip, 9 pixels were integrated, each on top of a current mirror circuit. The chip also contains independent diodes to characterize the fabrication process and the device behavior. The behavior of current I vs applied voltage V for each independent diode was characterized with and without light. Spectral curves were also obtained. Pixels were characterized, measuring the output current from the current mirror circuit ( ) as a

2 function of V for VSS=0 V and as a function of VSS for a given V. The current passing through the diode integrated to the current mirror circuit was also obtained, measuring the current at V and VSS sources. Fig. 2 shows the behavior of the current at the output of the circuit integrated with the diode,, versus V, when the diode is illuminated and when it is not. Fig. 1 Current mirror circuit integrated with the photodiode. Iout [A] Sample B20 pixel P V [V] Fig. 2 Output current of the current mirror circuit integrated to one pixel vs V, for VSS=0., corresponds to the output current when the diode is under illumination; when it is not. Fig. 3 shows the ratio of the output current when the diode is under illumination to when it is not, ( / ) vs. V for the same pixel in Fig. 2. As can be seen a very high ratio, in the order of 10 6 is obtained. This ratio can not be obtained if measuring only the currents that pass through the diode even for crystalline ones. Amorphous diodes have in addition the drawback that their reverse current has an exponential dependence with voltage. When the applied voltage across the diode is above 4x10 4 V/cm, a second field effect mechanism makes current to increase even more rapidly with voltage, Fig. 4, [4]. However, in order to assume a full collection of carriers generated in the intrinsic region of the PIN diode used as photodetector, the condition of? n? n F>X ilayer must be fulfilled.? is the mobility of electrons,? n is the lifetime for electrons and F is the electric field across the intrinsic layer. X ilayer is the width of the intrinsic layer., which in our case is 0.7?m Since mobility in amorphous intrinsic layers is in the order of 1 cm 2 /Vs and the lifetime is smaller than s, the electric field F across the layer must be high enough to fulfill the above mentioned condition. As a consequence the dark current is usually higher than for a crystalline diode at the operation bias required for an effective collection of carriers. For this reason it is not easy to obtain a ratio of illuminated to dark current for these diodes much higher than 100. The effect observed in Fig 2 can be explained as follows. When VSS=0, as V is increased, the voltage in node 32 also increases. When V is below a given value, which in this case is around 0.6 V in dark, the voltage at node 32 in Fig. 1 is such that the gate voltage on transistors M3A and M4A drive them in very weak inversion and currents are very low. Furthermore, in the region of weak inversion, F SOI MOS transistors can have a very small current, much less than bulk MOSFETSs [2]. In our case, the current is below 0.5 pa, which is the lower level of sensibility of the measuring equipment we used. The output current for low V is also of the same order, for same reasons. When the diode is not illuminated, for V>>0.6 V both F SOI MOSFETs progressively turn on and at the output of the current mirror circuit will be proportional to the current passing through the diode. The ratio of (W/) 2 for TMOS M4A with respect to (W/) 1 for TMOS M3A will determine the value of the output current. In our circuit for the pixel shown in Fig, 2, at V=1V, the output current is 4.4x10-8 A, while through the diode is passing 2.9x10-9 A. However, when the diode is illuminated the photovoltaic effect originates a photo-electromotive force (emf) usually in the order of tenth of volts at the diode. This photovoltaic effect increases the voltage drop across the diode, so M3A and M4A will start to turn on at values of V smaller than when the diode is not illuminated. If we analyze the region where the values of V are such that both SOI MOSFET start to turn on when

3 the diode is under illumination, but are still not conducting if the diode is not illuminated, an extremely high ratio of / is observed. In the circuit we measured, this ratio was higher than 10 6 for a light intensity of 0.5 mw/cm 2 (Fig. 3). This ratio can not be obtained by a single diode without additional electronics. It can be used for many practical applications, and it is very simple to implement with the use of this current mirror circuit shown in Fig. 1. Since V for the SOI IC is usually fixed by technology, the additional source VSS is used to select the operating point of the diode in order to the observe enhanced ratio effect. / 1.0x x x x x10 5 Pixel 8 Sample B V [V] Fig. 3 Ratio of the output current when the diode is under illumination to when is not illuminated vs V for one pixel. J [A/cm 2 ] B20 diodes V [V] Fig. 4 ark current density behavior vs V for different diodes showing the change of conduction mechanism begins to occur [4]. Fig. 5 shows the output current vs. VSS for values of V equal to 1, 2 and 3 V. ower curves correspond to the output current observed when the diode is not illuminated, while upper curves correspond to the output current when the diode is under illumination. Fig. 6 shows the ratio of the output current under illumination to output current without illumination vs VSS for the 3 values of V in Fig. 5. It is seen that as V increases, the maximum amplification slightly decreases, but it is still sufficiently high. As can be seen, in all cases a maximum ratio in the order of 10 6 is observed at V-VSS in the order of 0.5 V. A very approximate simulation using SPICE level 1 MOS model was done to verify that this behavior can be reproduced. The diode was considered to be crystalline for simplicity of simulation. Fig 7 shows the two circuits used to model the reverse current through an illuminated (4) and a nonilluminated (2) diode. The reverse current through diode 4 was considered to be 100 times the current though 2. We gave V4 a value of 0.3 V, which is a typical [A] V=1 V V=2 V V=3 V Fig. 5 Output current vs VSS for V=1, 2 and 3 V for pixels 8 and 9 of sample B20. curves correspond to illuminated diode; curves to nonilluminated value for the photo-emf, while V3 was taken as 0V. Results of the simulation also show that when VSS>>V-VT, the ratio of the output current when the diode is under illumination to the output current when the diode is not illuminated is the same as the ratio of the reverse current under illumination to dark current through the photodetector. VT is the threshold voltage of the MOSFET, In the region between VSS=V-VT and V-VT+V4 ( V in our case) this ratio is significantly increased. The simplicity of the model used is the cause of the much

4 abrupt transitions observed in the upper curve of Fig. 8 with respect to experiment (Fig 5). The same occurs when comparing lower curve in Fig. 8 and Fig. 6. To work in the region where the enhanced detection effect is observed, the value of VSS has to be selected so that V-VSS is in the order of the VT of the F SOI MOSFET, in our case around 0.7 V. V=1 V V=2 V V=3 V 10 6 the diode in this region for several light intensities. Results are shown in Table I. As can be seen, changes in light intensity had no effect on the values of VSS required to obtain the high / ratio for a given circuit, at least for light intensities in the order of mw/cm 2 relative intensity of 1 corresponds to 5mW/cm 2. In addition it was verified that when VSS is chosen so that V-VSS= VT increases with light intensity in the same proportion that it increases when V-VSS>>VT. / P8 P9 Fig.6 Ratio of the output current when the diode is under illumination to the output current when the diode is not illuminated vs VSS for V=1, 2 and 3V. Since the photovoltaic effect is a function of the light intensity, we also characterized the behavior of Fig. 7. Spice circuits used to simulate the behavior of the current mirror circuit integrated with the amorphous photodiode eft: non-illuminated, right: illuminated. Table I Relative light power VSS1 [V] Max ratio intensity (value of VSS for max. ratio at V=3 V) x x x x10 6

5 100uA I(R4) 10nA I(R3) 1.0 pa I(R4)/I(R3) Fig. 8 Simulated output current at the mirror circuit for V=3 V. Upper figure: diode under illumination I(R4), and without illumination I(R3); ower figure shows the ratio I(R4)/I(R3). 3. CONCUSIONS Amorphous diodes were first successfully integrated on top of a F SOI IC. Amorphous photodiodes have the problem that their dark current increases exponentially with voltage. In addition, when the voltage applied across the intrinsic-region provides a medium field greater than 4x10 4 V/cm the dark current can become quite large reducing the ratio of the current through the diode when it is illuminated to the dark current for a given light intensity /. This can significantly reduce the threshold of detection. In this work we also show that integrating the photodiode with a simple circuit as the one presented in Fig. 1, the value of VSS can be selected to provide a very high ratio of /, which can not be obtained directly in the simple photodiode. The output current of the circuit can be further processed depending on the application. Other properties of the photodiode, as providing a linear dependence of the current through it with light intensity or spectral response are not affected, and are reflected at the output current of the circuit,. Gallegos for diode fabrication and the clean room staff of the Microelectronics ab of UC for SOI IC fabrication 4. REFERENCES [1] S. Barthien, et al, 25 European Solid-State Circuit Conference 99, Germany, [2]. Flandre et al, Fully-depleted SOI CMOS technology for heterogeneous micropower, high-temperature or RF microsystems, Solid-State Electronics, 45 (2001) [3] M. Estrada, A. Cerdeira, I. Pereyra and S. Soto, High deposition rate a-si:h layers from pure SiH 4 and from a 10% dilution of SiH 4 in H 2 Thin Solid Films 373 (2000) 176. [4] Antonio Cerdeira, Magali Estrada, Modeling of reverse current behavior in amorphous thin and thick p-i-n diodes, IEEE Trans. on E, 41, 11, (2000) ACKNOWEGEMENTS: This work was supported by CONACYT project A. We also thank Enriqueta Aguilar and Olga