SOT-363 Plastic-Encapsulate MOSFETS
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1 JIANGSU CHANGJIANG ELECTRONICS TECHNOLOGY CO., LTD SOT-363 Plastic-Encapsulate MOSFETS CJ3439KDW N channel+p Channel MOSFET V (BR)DSS R DS(on) MAX 380mΩ@ 4.5V 20 V 450mΩ@2.5V 0.75A 800mΩ@1.8V 520mΩ@-4.5V -20V 700mΩ@-2.5V -0.66A 950mΩ(TYP)@-1.8V SOT-363 FEATURE Surface Mount Package Low R DS (on) Operated at Low Logic Level Gate Drive ESD Protected Gate Including a N-ch CJ3134K and a P-ch CJ3139K (independently) In a Package APPLICATION Load/ Power Switching Interfacing Switching Battery Management for Ultra Small Portable Electronics Logic Level Shift MARKING Equivalent Circuit D1 G2 S S1 2 G1 3 D2 ABSOLUTE MAXIMUM RATINGS ( unless otherwise noted) Parameter Symbol Value Unit N-MOSFET Drain-Source Voltage V DS 20 V Typical Gate-Source Voltage ±12 V Continuous Drain Current (note 1) 0.75 A Drain Current (tp=10us) M 1.8 A P-MOSFET Drain-Source Voltage V DS -20 V Typical Gate-Source Voltage ±12 V Continuous Drain Current (note 1) A Drain Current (tp=10us) M -1.2 A Temperature and Thermal Resistance Thermal Resistance from Junction to Ambient (note 1) R θja 833 /W Junction Temperature T J 150 Storage Temperature T STG -55~+150 Lead Temperature for Soldering Purposes(1/8 from case for 10 s) T L D,Mar,2016
2 MOSFET ELECTRICAL CHARACTERISTICS N-ch MOSFET ELECTRICAL CHARACTERISTICS( unless otherwise noted) Parameter Symbol Test Condition Min Typ Max Unit STATIC CHARACTERISTICS Drain-source breakdown voltage V(BR)DSS VGS = 0V, ID =250µA 20 V Zero gate voltage drain current IDSS VDS =20V,VGS = 0V 1 µa Gate-body leakage current IGSS VGS =±10V, VDS = 0V ±20 ua Gate threshold voltage (note 2) VGS(th) VDS =, ID =250µA V Drain-source on-resistance(note 2) RDS(on) VGS =4.5V, ID =0.65A 380 mω VGS =2.5V, ID =0.55A 450 mω VGS =1.8V, ID =0.45A 800 mω Forward tranconductance(note 2) gfs VDS =10V, ID =0.8A 1.6 S Diode forward voltage I S =0.15A, VGS = 0V 1.2 V DYNAMIC CHARACTERISTICS (note 4) Input Capacitance C iss pf Output Capacitance C oss VDS =16V,VGS =0V,f =1MHz pf Reverse Trafer Capacitance C rss 9 15 pf SWITCHING CHARACTERISTICS (note 3,4) Turn-on delay time td(on) 6.7 Turn-on rise time Turn-off delay time tr td(off) =4.5V,V DS =10V, =ma,r GEN =10Ω Turn-off fall time tf 7.4 P-ch MOSFET ELECTRICAL CHARACTERISTICS( unless otherwise noted) Parameter Symbol Test Condition Min Typ Max Unit STATIC CHARACTERISTICS Drain-source breakdown voltage V(BR)DSS VGS = 0V, ID =-250µA -20 V Zero gate voltage drain current IDSS VDS =-20V,VGS = 0V -1 µa Gate-body leakage current IGSS VGS =±10V, VDS = 0V ±20 ua Gate threshold voltage (note 2) VGS(th) VDS =, ID =-250µA V Drain-source on-resistance(note 2) RDS(on) VGS =-4.5V, ID =-1A 520 mω VGS =-2.5V, ID =-0.8A 700 mω VGS =-1.8V, ID =-0.5A 950 mω Forward tranconductance(note 2) gfs VDS =-10V, ID =-0.54A 1.2 S Diode forward voltage I S =-0.5A, VGS = 0V -1.2 V DYNAMIC CHARACTERISTICS (note 4) Input Capacitance C iss pf Output Capacitance C oss VDS =-16V,VGS =0V,f =1MHz pf Reverse Trafer Capacitance C rss 9 15 pf SWITCHING CHARACTERISTICS (note 3, 4) Turn-on delay time td(on) 9 Turn-on rise time Turn-off delay time tr td(off) =-4.5V,V DS =-10V, =-200mA,R GEN =10Ω Turn-off fall time tf 20.3 Notes : 1.Surface mounted on FR4 board using the minimum recommended pad size. 2. Pulse Test : Pulse width=μs, duty cycle 2%. 3. Switching characteristics are independent of operating junction temperature. 4. Graranted by design,not subject to producting. 2 D,Mar,2016
3 N-Channel MOS Output Characteristics =4V,5V =3V V DS =3V Trafer Characteristics =2.5V =2V =1.5V DRAIN TO SOURCE VOLTAGE V DS GATE TO SOURCE VOLTAGE =1.8V =2.5V =4.5V =0.65A GATE TO SOURCE VOLTAGE I S Threshold Voltage SOURCE CURRENT I S 0.1 THRESHOLD VOLTAGE V TH =250uA SOURCE TO DRAIN VOLTAGE JUNCTION TEMPERATURE T j ( ) 3 D,Mar,2016
4 P-Channel MOS Output Characteristics =-4V,-5V =-3V V DS =-3V Trafer Characteristics =-2.5V =-2V =-1.5V DRAIN TO SOURCE VOLTAGE V DS GATE TO SOURCE VOLTAGE =-1.8V =-2.5V =-4.5V =-1A GATE TO SOURCE VOLTAGE I S Threshold Voltage SOURCE CURRENT I S -0.1 THRESHOLD VOLTAGE V TH =-250uA SOURCE TO DRAIN VOLTAGE JUNCTION TEMPERATURE T J ( ) 4 D,Mar,2016
5 Symbol Dimeio In Millimeters Dimeio In Inches Min Max Min Max A A A b c D E E e TYP TYP e L REF REF L D,Mar,2016
6 SOT-363 Tape and reel SOT-363 Embossed Carrier Tape P0 P1 P A d A A F E W C A-A Packaging Description: SOT-363 parts are shipped in tape. The carrier tape is made from a dissipative (carbon filled) polycarbonate resin. The cover tape is a multilayer film (Heat Activated Adhesive in nature) primarily composed of polyester film, adhesive layer, sealant, and anti-static sprayed agent. These reeled parts in standard option are shipped with 3,000 units per 7" or 17.8cm diameter reel. The reels are clear in color and is made of polystyrene plastic (anti-static coated). Pkg type SOT-363 Dimeio are in millimeter A B C d E F P0 P P1 W Ø SOT-363 Tape Leader and Trailer Trailer Tape Leader Tape 50±2 Empty Pockets 100±2 Empty Pockets Components SOT-363 Reel G I D W2 H D1 D2 B W1 Dimeio are in millimeter Reel Option 7''Dia D D1 D2 G H I W1 W2 Ø R78.00 R25.60 R REEL Reel Size Box Box Size(mm) Carton Carton Size(mm) G.W.(kg) 0 pcs 7 inch 30,000 pcs ,000 pcs D,Mar,2016
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N-Channel Enhancement Mode Power MOSFET DESCRIPTION The PE30C uses advanced trench technology to provide excellent R DS(ON), low gate charge and operation with gate voltages as low as.5v. This device is
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Features N-Channel VDS (V) = 3V ID = A (VGS = V) RDS(ON) < 3mΩ (VGS = V) RDS(ON) < 4mΩ (VGS = 4.V) P-Channel VDS (V) = -3V ID = -. A (VGS = -V) RDS(ON) < 4mΩ (VGS = -V) RDS(ON) < 74mΩ (VGS = -4.V) SOP-8.
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DESCRIPTION The SPP1433 is the P-Channel logic enhancement mode power field effect transistors are produced using high cell density, DMOS trench technology. This high density process is especially tailored
More information4V Drive Pch MOSFET. Data Sheet RP1H065SP. 1/ Rev.A. Dimensions (Unit : mm) Structure Silicon P-channel MOSFET
4V Drive Pch MOSFET RPH65SP Structure Silicon P-channel MOSFET Dimensions (Unit : mm) MPT6 (Single) Features ) Low on-resistance. 2) Built-in G-S Protection Diode. 3) Small Surface Mount Package (MPT6).
More informationZXM62P03E6 30V P-CHANNEL ENHANCEMENT MODE MOSFET SUMMARY V (BR)DSS =-30V; R DS(ON) =0.15
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DESCRIPTION The is the P-Channel logic enhancement mode power field effect transistors are produced using high cell density, DMOS trench technology. This high density process is especially tailored to
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DESCRIPTION The SPP2319W is the P-Channel logic enhancement mode power field effect transistors are produced using high cell density, DMOS trench technology. This high density process is especially tailored
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DESCRIPTION The SPP2303 is the P-Channel logic enhancement mode power field effect transistors are produced using high cell density, DMOS trench technology. This high density process is especially tailored
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DESCRIPTION The SPP2301D is the P-Channel logic enhancement mode power field effect transistors are produced using high cell density, DMOS trench technology. This high density process is especially tailored
More informationPin Define Pin Symbol Description 1 S1 Source 1 2 G1 Gate 1 3 S2 Source 2 4 G2 Gate 2 5 D2 Drain 2 6 D2 Drain 2 7 D1 Drain 1 8 D1 Drain 1
General Description, N & P Pair enhancement mode MOSFET, uses Advanced Trench to provide excellent RDS(ON), low gate charge. These devices are particularly suited for low voltage power management, and
More informationFeatures. Description. Table 1: Device summary Order code Marking Package Packaging STR1P2UH7 1L2U SOT-23 Tape and reel
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DESCRIPTION The SPP2341 is the P-Channel logic enhancement mode power field effect transistors are produced using high cell density, DMOS trench technology. This high density process is especially tailored
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DESCRIPTION The SPP3415 is the P-Channel logic enhancement mode power field effect transistors are produced using high cell density, DMOS trench technology. This high density process is especially tailored
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DESCRIPTION The SPP3401D is the P-Channel logic enhancement mode power field effect transistors are produced using high cell density, DMOS trench technology. This high density process is especially tailored
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