V DSS R DS(ON) (Max.) I D
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1 FTP18N6 N-Channel MOSFET Pb Lead Free Package and Finish Applications: DC Motor Control UPS Class D Amplifier V DSS R DS(ON) (Max.) I D 6V 18 mω 59A Features: RoHS Compliant Low ON Resistance Low Gate Charge Peak Current vs Pulse Width Curve Inductive Switching Curves Ordering Information PART NUMBER PACKAGE BRAND FTP18N6 TO-22 FTP18N6 G D S TO-22 Not to Scale G D S Absolute Maximum Ratings Tc=25 o C unless otherwise specified Symbol Parameter Maximum Units V DSS Drain-to-Source Voltage (NOTE *1) 6 V I D Continuous Drain Current. 59 I o C Continuous Drain Current Figure 3 A I DM Pulsed Drain V (NOTE *2) Figure 6 Power Dissipation 15 W P D Derating Factor above 25 o C 1. W/ o C Gate-to-Source Voltage ±2 V E AS Single Pulse Avalanche Engergy L=5 µh, I D =21.5A 115 mj I AS Pulsed Avalanche Engergy Figure 8 dv/dt Peak Diode Recovery dv/dt (NOTE *3) 3. V/ns T L T PKG T J and T STG Maximum Temperature for Soldering Leads at.63in (1.6) from Case for seconds Package Body for seconds Operating Junction and Storage Temperature Range Caution: Stresses greater than those listed in the Absolute Maximum Ratings Table may cause permanent damage to the device. Thermal Resistance to 175 R θjc Junction-to-Case Water cooled heatsink, P D adjusted for o C/W a peak junction temperature of +175 o C R θja Junction-to-Ambient cubic foot chamber, free air o C
2 OFF Characteristics T J =25 o C unless otherwise specified BV DSS Drain-to-Source Breakdown Voltage V =V, I D =25µA BV DSS / T J BreakdownVoltage Temperature Coefficient, Figure V/ o C Reference to 25 o C, I D =25µA V DS =6V, =V I DSS Drain-to-Source Leakage Current µa V DS =48V, =V T J =15 o C Gate-to-Source Forward Leakage =+2V I GSS na Gate-to-Source Reverse Leakage =-2V ON Characteristics T J =25 o C unless otherwise specified Static Drain-to-Source On-Resistance, R DS(ON) -- =V, I D =36A Figure 9 and mω (NOTE *4) (TH) Gate Threshold Voltage, Figure V V DS =, I D =25µA gfs Forward Transconductance S V DS =15V, I D =59A (NOTE *4) Dynamic Characteristics Essentially independent of operating temperature C iss Input Capacitance =V C oss Output Capacitance V DS =25V pf f=1.mhz C rss Reverse Transfer Capacitance Figure 14 Q g Total Gate Charge V DS =3V Q gs Gate-to-Source Charge nc I D =59A Q gd Gate-to-Drain ( Miller ) Charge =V Figure 15 Resistive Switching Characteristics Essentially independent of operating temperature t d(on) Turn-On Delay Time V DD =3 V t rise Rise Time I D =59A ns t d(off) Turn-Off Delay Time =V t fall Fall Time R G =9.1Ω Page 2 of 11
3 Source-Drain Diode Characteristics T J =25 o C unless otherwise specified I S Continuous Source Current (Body Diode) A Integral pn-diode I SM Pulsed Source Current (Body Diode) A in MOSFET V SD Diode Forward Voltage V I S =59A, =V t rr Reverse Recovery Time ns =V Q rr Reverse Recovery Charge nc I F =59A, di/dt= A/µs Notes: *1. T J = +25 o C to +175 o C *2. Repetitive rating; pulse width limited by maximum junction temperature. *3. I SD = 59A, di/dt < A/µs, V DD < BV DSS, T J =+175 o C *4. Pulse width < 38µs; duty cycle < 2% Page 3 of 11
4 Duty Factor Figure 1. Maximum Effective Thermal Impedance, Junction-to-Case 1. 5% ZθJC, Thermal Impedance (Normalized)..1. 2% % 5% 2% 1% single pulse P DM t 1 t 2 NOTES: DUTY FACTOR: D=t1/t2 PEAK T J =P DM x Z θjc x 1E-5 1E-4 1E-3 1E-2 1E-1 1E+ 1E+1 t p, Rectangular Pulse Duration (s) Figure 2. Maximum Power Dissipation Figur e 3. vs Case Temperature Maximum Continuous Drain Current vs Case Temperature P D, Power Dissipation (W) T C, Case Temperature ( o C) T C, Case Temperature ( o C) I D, Drain Current (A) I D, Drain Current (A) Figure 4. Typical Output Characteristics PULSE DURATION = 25 µs DUTY FACTOR =.5% MAX T C = 25 o C = 15V = V = 8V = 6V RDS(ON), Drain-to-Source ON Resistance (mω) Typical Drain-to-Source ON Resistance vs Gate Voltage and Drain Current 3 8 VGS = 4.5V PULSE DURATION = 25 µs 6 25 VGS = 4V DUTY FACTOR =.5% MAX 4 T C = 25 o C VGS = 3.5V 2 2 VGS = 3V = 5V Fi gur e I D = 14A I D = 28A I D = 55A V DS, Drain-to-Source Voltage (V), Gate-to-Source Voltage (V) Page 4 of 11
5 Figure 6. Maximum Peak Current Capability I DM, Peak Current (A) TRANSCONDUCTANCE MAY LIMIT CURRENT IN THIS REGION FOR TEMPERATURES ABOVE 25 o C DERATE PEAK CURRENT AS FOLLOWS: I = I TC = V 1E-6 E-6 E-6 1E-3 E-3 E-3 1E+ E+ t p, Pulse Width (s) Figure 7. Typical Transfer Characteristics Figure 8. Unclamped Inductive Switching Capability I D, Drain-to-Source Current (A) PULSE DURATION = 25 µs DUTY FACTOR =.5% MAX V DS = V +175 o C +25 o C -55 o C IAS, Avalanche Current (A) STARTING T J = 15 o C If R : t AV = (L/R) ln[(i AS R)/(1.3BV DSS -V DD )+1] If R= : t AV = (L I AS )/(1.3BV DSS -V DD ) R equals total Series resistance of Drain circuit STARTING T J = 25 o C 1 1E-6 E-6 E-6 1E-3 E-3 E-3, Gate-to-Source Voltage (V) t AV, Time in Avalanche (s) R DS(ON), Drain-to-Source ON Resistance (mω) Figure 9. Typical Drain-to-Source ON Figure. Resistance vs Drain Current PULSE DURATION = µs DUTY FACTOR =.5% MAX T C =25 C =V RDS(ON), Drain-to-Source Resistance (Normalized) Typical Drain-to-Source ON Resistance vs Junction Temperature I D, Drain Current (A) T J, Junction Temperature ( o C) PULSE DURATION = 25 µs DUTY FACTOR =.5% MAX = V, I D = 15A Page 5 of 11
6 Figure 11. Typical Breakdown Voltage vs Figure 12. Junction Temperature Typical Threshold Voltage vs Junction Temperature BV DSS, Drain-to-Source Breakdown Voltage (Normalized) VGS(TH), Threshold Voltage (Normalized).95 = V V.6 GS = V DS I D = 25 µa I D = 25 µa T J, Junction Temperature ( o C) T J, Junction Temperature ( o C) Figure 13. Maximum Forward Bias Safe Figure 14. Operating Area Typical Capacitance vs Drain-to-Source Voltage OPERATION IN THIS AREA MAY BE LIMITED BY R DS(ON) I D, Drain Current (A) 1 T J = MAX RATED, T C = 25 o C Single Pulse V DS, Drain-to-Source Voltage (V) µs µs 1.ms ms DC C, Capacitance (pf) = V, f = 1MHz Ciss = Cgs + Cgd C oss C ds + C gd Crss = Cgd V DS, Drain Voltage (V) C iss C oss C rss Figure 15. Typical Gate Charge Figure 16. vs Gate-to-Source Voltage Typical Body Diode Transfer Characteristics, Gate-to-Source Voltage (V) 12 V DS =15V 8 V DS =3V V DS =45V I D = 59A ISD, Reverse Drain Current (A) Q G, Total Gate Charge (nc) V SD, Source-to-Drain Voltage (V) o C 25 o C -55 o C = V Page 6 of 11
7 Test Circuits and Waveforms I D V DS I D V DS D.U.T. V DD (TH) Miller Region 1 ma Q gs Q gd Q g Figure 17. Gate Charge Test Circuit Figure 18. Gate Charge Waveform R L V DS 9% V DS R D.U.T. V DD % t d(on) t rise t d(off t fall Figure 19. Resistive Switching Test Circuit Figure 2. Resistive Switching Waveforms Page 7 of 11
8 Test Circuits and Waveforms di/dt Current Pump Double Pulse I D di/dt = A/ µ s D.U.T. V DD Q rr L t rr I D Figure 22. Diode Reverse Recovery Waveform Figure 21. Diode Reverse Recovery Test Circuit BV DSS L Series Switch (MOSFET) I AS BV DSS D.U.T. 5Ω I AS Coutating Diode V DD V DD t AV t p I 2 AS L EAS = 2 Figure 23. Unclamped Inductive Switching Test Circuit Figure 24. Unclamped Inductive Switching Waveforms Page 8 of 11
9 TO-22 Package For Assembly Lot Codes Ending With: xxxxxh H Symbol Minimum, Average, Maximum, A 3.75 dia 3.85 dia 3.95 dia B C D J E F G K H J K M M a b c d G A e e E D C F d a B b c e e1 Page 9 of 11
10 TO-22 Package For Assembly Lot Codes Ending With: xxxxxs H Symbol Minimum, Average, Maximum, A 3.75 dia 3.85 dia 3.95 dia B C J D E F G K H J K M M a b c d G A e e E D F C d a B b c e e1 Page of 11
11 Disclaimers: InPower Semiconductor Co., Ltd (IPS) reserves the right to make changes without notice in order to improve reliability, function or design and to discontinue any product or service without notice. Customers should obtain the latest relevant information before orders and should verify that such information is current and complete. All products are sold subject to IPS s terms and conditions supplied at the time of order acknowledgement. InPower Semiconductor Co., Ltd warrants performance of its hardware products to the specifications at the time of sale, Testing, reliability and quality control are used to the extent IPS deems necessary to support this warrantee. Except where agreed upon by contractual agreement, testing of all parameters of each product is not necessarily performed. InPower Semiconductor Co., Ltd does not assume any liability arising from the use of any product or circuit designs described herein. Customers are responsible for their products and applications using IPS s components. To minimize risk, customers must provide adequate design and operating safeguards. InPower Semiconductor Co., Ltd does not warrant or convey any license either expressed or implied under its patent rights, nor the rights of others. Reproduction of information in IPS s data sheets or data books is permissible only if reproduction is without modification or alteration. Reproduction of this information with any alteration is an unfair and deceptive business practice. InPower Semiconductor Co., Ltd is not responsible or liable for such altered documentation. Resale of IPS s products with statements different from or beyond the parameters stated by InPower Semiconductor Co., Ltd for that product or service voids all express or implied warrantees for the associated IPS s product or service and is unfair and deceptive business practice. InPower Semiconductor Co., Ltd is not responsible or liable for any such statements. Life Support Policy: InPower Semiconductor Co., Ltd s products are not authorized for use as critical components in life support devices or systems without the expressed written approval of InPower Semiconductor Co., Ltd. As used herein: 1. Life support devices or systems are devices or systems which: a. are intended for surgical implant into the human body, b. support or sustain life, c. whose failure to perform when properly used in accordance with instructions for used provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. Page 11 of 11
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