Symbol Parameter FSW25N50A Units

Transcription

1 FSW25N5A N-Channel MOSFET Applications: Uninterruptible Power Supply(UPS) LCD Panel Power SMPS Power DC-AC Inverter FSW25N5 RoHS Compliant Low ON Resistance Low Gate Charge Peak Current vs Pulse Width Curve ESD Capability Improved Ordering Information PART NUMBER PACKAGE BRAND FSW25N5A TO-3PN FSW25N5A Pb Lead Free Package and Finish V DSS R DS(ON) (Typ.) I D 5V.18 25A G D S TO-3PN Not to Scale Absolute Maximum Ratings T C =25 o C unless otherwise specified Symbol Parameter FSW25N5A Units V DSS Drain-to-Source Voltage (NOTE *1) 5 V I D Continuous Drain Current 25 I 1 o C Continuous Drain Current Figure 3 A I DM Pulsed Drain 1V (NOTE *2) Figure 6 Power Dissipation 23 W P D Derating Factor above 25 o C 1.84 W/ o C Gate-to-Source Voltage ± 3 V E AS Single Pulse Avalanche Engergy L=1mH 25 mj I AS Pulsed Avalanche Rating Figure 8 dv/dt Peak Diode Recovery dv/dt (NOTE *3) 5. V/ns VESD(G-S) Gate to Source ESD:HBM_C=1pF,R=1.5K 6 V T L T PKG Maximum Temperature for Soldering Leads at.63in (1.6mm) from Case for 1 seconds Package Body for 1 seconds T J and T STG Operating Junction and Storage Temperature Range -55 to 15 *Drain Current limited by Maximum Junction Temperature. Caution: Stresses greater than those listed in the Absolute Maximum Ratings Table may cause permanent damage to the device. Thermal Resistance Symbol Parameter FSW25N5A Units Test Conditions R JC Junction-to-Case.54 Water cooled heatsink, PD adjusted for o C/W a peak junction temperature of +15 o C. R JA Junction-to-Ambient 62 1 cubic foot chamber, free air o C 211 InPower Semiconductor Co., Ltd. Page 1 of 9

2 OFF Characteristics TJ=25 o C unless otherwise specified BV DSS Drain-to-Source Breakdown Voltage V =V, I D =25μA BV DSS / T J BreakdownVoltage Temperature Coefficient, Figure V/ o C Reference to 25 o C, I D =25μA V DS =5V, =V I DSS Drain-to-Source Leakage Current μa V DS =4V, =V T J =125 o C Gate-to-Source Forward Leakage V I GS =+3V GSS ua Gate-to-Source Reverse Leakage = -3V ON Characteristics TJ=25 o C unless otherwise specified R Static Drain-to-Source On-Resistance V DS(ON) GS =1V, I D =1A Figure 9 and 1. (NOTE *4) (TH) Gate Threshold Voltage, Figure V V DS =, I D =25 A gfs Forward Transconductance S V DS =15V, I D =1A (NOTE *4) Dynamic Characteristics Essentially independent of operating temperature C iss Input Capacitance =V C oss Output Capacitance V DS =25V pf f=1.mhz C rss Reverse Transfer Capacitance Figure 14 Q g Total Gate Charge VDD=25V Q gs Gate-to-Source Charge nc I D=2A =1V Q gd Gate-to-Drain ( Miller ) Charge Figure 15 Resistive Switching Characteristics Essentially independent of operating temperature t d(on) Turn-on Delay Time =25V t rise Rise Time I D =2A ns t d(off) Turn-Off Delay Time =1V t fall Fall Time R G = InPower Semiconductor Co., Ltd. Page 2 of 9

3 Source-Drain Diode Characteristics Tc=25 o C unless otherwise specified I S Continuous Source Current (Body Diode) A Integral pn-diode I SM Maximum Pulsed Current (Body Diode) A in MOSFET V SD Diode Forward Voltage V I S =2A, =V t rr Reverse Recovery Time ns =V Q rr Reverse Recovery Charge μc I F =2A, di/dt=1 A/μs Notes: *1. T J = +25 o C to +15 o C. *2. Repetitive rating; pulse width limited by maximum junction temperature. *3. I SD = 2A di/dt < 1 A/μs, < BV DSS, T J =+15 o C. *4. Pulse width < 38μs; duty cycle < 2%. 211 InPower Semiconductor Co., Ltd. Page 3 of 9

4 Duty Factor Figure 1. Maximum Effective Thermal Impedance, Junction-to-Case 1. 5% Z JC, Thermal Impedance (Normalized).1.1 2% 1% 5% 2% 1% single pulse P DM t 1 t 2 NOTES: DUTY FACTOR: D=t1/t2 PEAK T J =P DM x Z JC x R JC +T C.1 1E-5 1E-4 1E-3 1E-2 1E-1 1E+ 1E+1 t p, Rectangular Pulse Duration (s) Figure 2. Maximum Power Dissipation Figure 3. vs Case Temperature Maximum Continuous Drain Current vs Case Temperature P D, Power Dissipation (W) I D, Drain Current (A) T C, Case Temperature ( o C) T C, Case Temperature ( o C) Figure 4. Typical Output Characteristics Figure 5. Typical Drain-to-Source ON Resistance vs Gate Voltage and Drain Current I D, Drain Current (A) PULSE DURATION = 25 μs DUTY FACTOR =.5% MAX T C = 25 o C VGS = 15V VGS = 6.V =5.5V VGS = 5.25V VGS = 5.V VGS = 4.5V RDS(ON), Drain-to-Source ON Resistance ( I D = 2A I D = 1A PULSE DURATION = 25 μs DUTY FACTOR =.5% MAX T C = 25 o C V DS, Drain-to-Source Voltage (V), Gate-to-Source Voltage (V) 211 InPower Semiconductor Co., Ltd. Page 4 of 9

5 1 TRANSCONDUCTANCE MAY LIMIT CURRENT IN THIS REGION Figure 6. Maximum Peak Current Capability FOR TEMPERATURES ABOVE 25 o C DERATE PEAK CURRENT AS FOLLOWS: I DM, Peak Current (A) 1 1 = VGS = 1V 1E-6 1E-6 1E-6 1E-3 1E-3 1E-3 1E+ 1E+ t p, Pulse Width (s) Figure 7. Typical Transfer Characteristics Figure 8. Unclamped Inductive Switching Capability I D, Drain-to-Source Current (A) PULSE DURATION = 25 μs DUTY CYCLE =.5% MAX VDS = 1 V +15 o C +25 o C -55 o C I AS, Avalanche Current (A) STARTING T J = 15 o C If R= : t AV = (L I AS )/(1.3BV DSS - ) If R : t AV = (L/R) ln[i AS R)/(1.3BV DSS - )+1] STARTING T J = 25 o C R equals total Series resistance of Drain circuit 1. 1E-6 1E-6 1E-6 1E-3 1E-3 1E-3, Gate-to-Source Voltage (V) t AV, Time in Avalanche (s) R DS(ON), Drain-to-Source ON Resistance ( ) Figure 9. Typical Drain-to-Source ON Figure 1. Resistance vs Drain Current PULSE DURATION = 2 μs DUTY CYCLE =.5% MAX TC=25 C = 1V = 2V R DS(ON), Drain-to-Source Resistance (Normalized) Typical Drain-to-Source ON Resistance vs Junction Temperature PULSE DURATION = 25 μs DUTY CYCLE =.5% MAX = 1V, I D = 1.A I D, Drain Current (A) T J, Junction Temperature ( o C) 211 InPower Semiconductor Co., Ltd. Page 5 of 9

6 BV DSS, Drain-to-Source Breakdown Voltage (Normalized) Figure 11. Typical Breakdown Voltage vs Figure 12. Junction Temperature = V I D = 25 μa (TH), Threshold Voltage (Normalized) = V DS I D = 25 μa Typical Threshold Voltage vs Junction Temperature T J, Junction Temperature ( o C) T J, Junction Temperature ( o C) Figure 13. Maximum Forward Bias Safe Figure 14. Operating Area Typical Capacitance vs I D, Drain Current (A) T J = MAX RATED, T C = 25 o C Single Pulse V DS, Drain-to-Source Voltage (V) 1μs 1μs 1.ms 1ms DC C, Capacitance (pf) = V, f = 1MHz C 1 rss C iss = C gs + C gd OPERATION IN THIS AREA MAY C oss C ds + C gd BE LIMITED BY R DS(ON) C rss = C gd V DS, Drain Voltage (V) C iss C oss, Gate-to-Source Voltage (V) Figure 15. Typical Gate Charge Figure 16. vs Gate-to-Source Voltage V DS = 125V V DS = 25V V DS = 375V Q G, Total Gate Charge (nc) I D = 1A I SD, Reverse Drain Current (A) o C +25 o C -55 o C Typical Body Diode Transfer Characteristics V SD, Source-to-Drain Voltage (V) = V 211 InPower Semiconductor Co., Ltd. Page 6 of 9

7 Test Circuits and Waveforms V DS I D I D V DS Miller Region D.U.T. (TH) 1 ma Q gs Q gd Q g Figure 17. Gate Charge Test Circuit Figure 18. Gate Charge Waveform R L V DS 9% V DS R G D.U.T. 1% t d(on) t rise t d(off) t fall Figure 19. Resistive Switching Test Circuit Figure 2. Resistive Switching Waveforms 211 InPower Semiconductor Co., Ltd. Page 7 of 9

8 Test Circuits and Waveforms di/dt adj. Current Pump Double Pulse I D di/dt = 1A/μA D.U.T. Q rr L t rr I D Figure 22. Diode Reverse Recovery Waveform Figure 21. Diode Reverse Recovery Test Circuit BV DSS L Series Switch (MOSFET) I AS BV DSS D.U.T. Commutating Diode t AV 5 I AS t p I 2 AS L EAS 2 Figure 23. Unclamped Inductive Switching Test Circuit Figure 24. Unclamped Inductive Switching Waveforms 211 InPower Semiconductor Co., Ltd. Page 8 of 9

9 Disclaimers: InPower Semiconductor Co., Ltd (IPS) reserves the right to make changes without notice in order to improve reliability, function or design and to discontinue any product or service without notice. Customers should obtain the latest relevant information before orders and should verify that such information is current and complete. All products are sold subject to IPS s terms and conditions supplied at the time of order acknowledgement. InPower Semiconductor Co., Ltd warrants performance of its hardware products to the specifications at the time of sale, Testing, reliability and quality control are used to the extent IPS deems necessary to support this warrantee. Except where agreed upon by contractual agreement, testing of all parameters of each product is not necessarily performed. InPower Semiconductor Co., Ltd does not assume any liability arising from the use of any product or circuit designs described herein. Customers are responsible for their products and applications using IPS s components. To minimize risk, customers must provide adequate design and operating safeguards. InPower Semiconductor Co., Ltd does not warrant or convey any license either expressed or implied under its patent rights, nor the rights of others. Reproduction of information in IPS s data sheets or data books is permissible only if reproduction is without modification or alteration. Reproduction of this information with any alteration is an unfair and deceptive business practice. InPower Semiconductor Co., Ltd is not responsible or liable for such altered documentation. Resale of IPS s products with statements different from or beyond the parameters stated by InPower Semiconductor Co., Ltd for that product or service voids all express or implied warrantees for the associated IPS s product or service and is unfair and deceptive business practice. InPower Semiconductor Co., Ltd is not responsible or liable for any such statements. Life Support Policy: InPower Semiconductor Co., Ltd s products are not authorized for use as critical components in life support devices or systems without the expressed written approval of InPower Semiconductor Co., Ltd. As used herein: 1. Life support devices or systems are devices or systems which: a. are intended for surgical implant into the human body, b. support or sustain life, c. whose failure to perform when properly used in accordance with instructions for used provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 211 InPower Semiconductor Co., Ltd. Page 9 of 9