SLIDING-MODE AMPLITUDE CONTROL TECHNIQUES FOR HARMONIC OSCILLATORS. A Thesis CHAD A. MARQUART

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1 SLIDING-MODE AMPLITUDE CONTROL TECHNIQUES FOR HARMONIC OSCILLATORS A Thesis by CHAD A. MARQUART Submitted to the Office of Graduate Studies of Texas A&M Uiversity i partial fulfillmet of the requiremets for the degree of MASTER OF SCIENCE May 2006 Major Subject: Electrical Egieerig

2 SLIDING-MODE AMPLITUDE CONTROL TECHNIQUES FOR HARMONIC OSCILLATORS A Thesis by CHAD A. MARQUART Submitted to the Office of Graduate Studies of Texas A&M Uiversity i partial fulfillmet of the requiremets for the degree of MASTER OF SCIENCE Approved by: Chair of Committee, Committee Members, Head of Departmet, Takis Zourtos Aydi Karsilaya Scott Miller Duca Walker Costas Georghiades May 2006 Major Subject: Electrical Egieerig

3 iii ABSTRACT Slidig-Mode Amplitude Cotrol Techiques for Harmoic Oscillators. (May 2006) Chad A. Marquart, B.S., Uiversity of Nebraska-Licol Chair of Advisory Committee: Dr. Takis Zourtos This thesis ivestigates both theoretical ad implemetatio-level aspects of switchigfeedback cotrol strategies for the developmet of voltage-cotrolled oscillators. We use a modified slidig-mode compesatio scheme based o various orms of the system state to achieve amplitude cotrol for wide-tuig rage oscillators. The proposed cotroller provides amplitude cotrol at miimal cost i area ad power cosumptio. Verificatio of our theory is achieved with the physical realizatio of a amplitude cotrolled egative-g m LC oscillator. A wide-tuig rage RF rig oscillator is developed ad simulated, showig the effectiveess of our methods for high speed oscillators. The resultig rig oscillator produces a amplitude cotrolled siusoidal sigal operatig at frequecies ragig from 170 MHz to 2.1 GHz. Total harmoic distortio is maitaied below 0.8% for a oscillatio amplitude of 2 V pp over the etire tuig rage. Phase oise is measured as dbc/hz at GHz with a 1 MHz offset.

4 iv ACKNOWLEDGMENTS I would like to thak my committee chair, Dr. Takis Zourtos, for all of his guidace ad support. Thaks also to Dr. Sebastia Magierowski of the Uiversity of Calgary for his collaboratio durig the writig of this thesis. I would like to exted my gratitude to Dr. Steve Wright for providig access to the lab facilities ad equipmet used for this research. Fially, thaks to all of my frieds ad family for their support ad ecouragemet over the course of this jourey.

5 v TABLE OF CONTENTS CHAPTER Page I INTRODUCTION: MODERN WIRELESS COMMUNICATIONS 1 A. VCO Desig Challeges B. Problem Descriptio C. Proposed Solutio D. Thesis Orgaizatio II VARIABLE FREQUENCY OSCILLATORS A. Periodic Oscillatory Systems Poicaré-Bedixso Criterio Barkhause Criterio Harmoic Oscillatory Systems B. Variable Frequecy Oscillator Architectures I-phase/Quadrature Negative-G m LC Oscillator Rig Oscillator C. Existig Amplitude Cotrol Techiques III PROPOSED MODIFIED SLIDING-MODE COMPENSATION 28 A. Slidig-Mode Cotrol B. Applicatio to the I/Q Negative-G m LC Oscillator Periodic Stability Aalysis C. Applicatio to Rig Oscillator Periodic Stability Aalysis D. Equivalece of Vector Norms Slidig Maifold Based upo 1-Norm Cotrol Law Based upo -Norm E. Chatterig IV LC OSCILLATOR REALIZATION A. Circuit Descriptio Oscillator Desig Slidig-Mode Cotroller Charge Pump B. Measuremet Results

6 vi CHAPTER Page V RING OSCILLATOR REALIZATION A. Circuit Descriptio Delay Cell Norm Detector Curret Comparator Charge Pump B. Simulatio Results VI CONCLUSION REFERENCES VITA

7 vii LIST OF TABLES TABLE Page I Priority Waveforms for JTRS [3] II Existig Cellular Commuicatio Stadards [7] III Existig WLAN Stadards [7] IV Phase Noise Aalysis of I/Q Oscillator V Trasistor Sizig of Capacitor Array VI Trasistor Sizig of Delay Cell VII Trasistor Sizig of 1-Norm Detector VIII Trasistor Sizig of Curret Comparator IX Trasistor Sizig of Charge Pump X Phase Noise Aalysis of Rig Oscillator XI Phase Noise Compariso of Recetly Reported Rig Oscillators... 81

8 viii LIST OF FIGURES FIGURE Page 1 Geeralized View of a SDR Trasceiver Architecture RF Desig Hexago [11] VFO with Modified Slidig-Mode Amplitude Cotrol Bouded Regio for Periodic Orbit Liear Feedback System System-Level View of Harmoic Oscillator I/Q Negative-G m LC Oscillator Rig Oscillator Covetioal Amplitude Gai Cotroller Boudig Regio of 2 d Order AGC Slidig Maifold for Harmoic Oscillator Vector Norms Implemeted as Slidig-Maifolds State-Space Trasformatio of LC Oscillator Norm Based Slidig Maifold Equivalece of Cotrol Laws Based o 1-Norm ad 2-Norm Norm Based Slidig Maifold Equivalece of Cotrol Laws Based o -Norm ad 2-Norm Chatterig about the Slidig Maifold Example of Output Respose of Slidig-Mode Cotroller

9 ix FIGURE Page 20 VCO with Modified Slidig-Mode Amplitude Cotrol I/Q LC Oscillator Proposed Quadrature Negative-G m LC Oscillator Proposed Slidig-Mode Amplitude Cotroller Proposed Charge Pump for LC Oscillator Protoboard Realizatio of Amplitude-Cotrolled I/Q LC Oscillator Photograph of I/Q LC Oscillator Output Respose of Amplitude Cotrolled LC Oscillator Harmoic Aalysis of LC Oscillator Measured Phase Noise of LC Oscillator Phase Noise Comparisos of LC Oscillator Proposed Amplitude-Cotrolled 3-Rig Oscillator Proposed Delay Cell for Rig VCO Bad-switched Capacitor Array Proposed 1-Norm Detector for Rig Oscillator Proposed Curret Comparator for Rig Oscillator Proposed Charge Pump for Rig Oscillator Trasiet Aalysis of Rig Oscillator Tuig-Rage Aalysis of Rig Oscillator Harmoic Distortio Aalysis of Rig Oscillator Phase Noise Performace of Rig Oscillator

10 1 CHAPTER I INTRODUCTION: MODERN WIRELESS COMMUNICATIONS I 1994 the Defese Advaced Research Projects Agecy (DARPA) successfully demostrated the first large-scale Software Defied Radio (SDR) [1]. The project was officially titled SPEAKeasy ad marks a major milestoe i the history of moder radio commuicatios. SPEAKeasy Phase-1 successfully demostrated the ability to chage wireless commuicatio schemes (multibad, multichael, multiwaveform) o the fly through software maipulatio. I recet years SDR has become a major area of iterest i various areas of wireless commuicatios. Sice its implemetatio i the military, radio commuicatio has played a sigificat role i military campaigs all over the world. Radio commuicatio ca serve as a ivaluable strategic tool but also provides opportuities for the compromise of sesitive tactical iformatio. Because of this, militaries have ivested much iterest i the cotiued developmet of reliable, secure commuicatio systems. All over the world military etities use umerous commuicatio systems operatig at differet badwidths, carrier frequecies; implemetig differet modulatio ad codig schemes. Recet U.S. military evets have demostrated sigificat radio icompatibility problems betwee allies ad differet braches of military services. Such radio oiteroperability betwee allies durig the allied ivasio of Greada (Oct. 1983) ad Operatio Desert Storm helped to spaw the creatio of the SPEAKeasy project i 1991 [1]. The success of the SPEAKeasy project has sice chaged the directio of wireless commuicatios i the military. The joural model is IEEE Trasactios o Automatic Cotrol.

11 2 The Departmet of Defese (DoD) has committed to the use of the Joit Tactical Radio System (JTRS) for use i future military field operatios. JTRS is a family of commo, software-defied, programmable radios that will become our Army s primary tactical radio for mobile commuicatios [2]. JTRS is beig developed to trasmit voice, video, ad data commuicatios at carrier frequecies ragig from 2 MHz to 2 GHz. Additioally, JTRS will be backwards compatible with may existig military (Legacy) ad civilia commuicatio protocols. Table I shows radio waveforms that are cosidered a priority for JTRS [3]. Table I. Priority Waveforms for JTRS [3] Name Frequecy Bad Badwidth Waveform Voice/Data Rate SINCGARS ESIP MHz 25 khz FM 75 Bps - 16 KBps HAVE QUICK II MHz 25kHz AM/FM/PSK 75 Bps - 16 KBps UHF SATCOM MILITARY MHz 5 khz, 25kHz MIL-STD 181/182/ Bps - 64 KBps EPLRS MHz 3 MHz SADL 57 KBps, 228 KBps Soldier Radio ad WLAN GHz 13 MHz IEEE b/e/g 16 KBps, 1 MBps Lik MHz 3 MHz MIL-STD KBps, 16 KBps Mobile radios iteded for use i JTRS are developed aroud the Software Commuicatio Architecture (SCA) specificatios published by the JTRS Joit Program Office (JPO). The SCA documet defies ecessary iterfaces, behavior, ad rules to make SDRs SCA compliat ad capable for use i the JTRS. Guidelies i the SCA are selected to optimize portability, iteroperability, ad cofigurability of the software ad hardware of a SDR while allowig flexibility to meet requiremets ad restrictios for specific operatig domais [4]. While the SCA was iitially developed for the JTRS it has rapidly gaied attetio i the commercial commuity ad is widely accepted as the de facto stadard for the geeral framework of SDRs. Wireless commuicatio also plays ad essetial role to disaster-relief efforts. Recet disasters such as the New York terrorist attacks of September 11, 2001 ad Hurricae Katria have exposed vulerabilities of curret wireless commuicatio

12 3 systems to widespread destructio. Both of these disasters demostrated how the lack of adequate commuicatios ca seriously impede relief efforts. Sice the widespread destructio of Hurricae Adrew, the U.S. Federal Emergecy Maagemet Agecy (FEMA) has expressed its desire to obtai a mobile wireless commuicatio system specialized for disaster relief [5]. This mobile commuicatio system specialized for disaster relief should be capable of quickly re-establishig local commuicatio services disrupted by disasters while providig reliable commuicatios betwee teams ivolved i the relief effort. Durig large-scale operatios disaster relief teams may be composed of persoel from a umber of differet federal, state, local, ad private sector orgaizatios. Commuicatio amogst these teams poses a problem sice differet orgaizatios use commuicatio systems that are ot ecessarily iteroperable. A recet report by the 9-11 Commissio recogizes the lack of a federal program for commuicatios iteroperability amog first respoders ad makes radio iteroperability of first respoders oe of its primary recommedatios [6]. SDR also has umerous applicatios for the commercial sector. Throughout the world there exists umerous differet commercial commuicatio stadards ragig i applicatio from cordless ad cellular telephoy to Wireless Local Area Networks (WLAN). Curretly may cellular phoes iclude multiple chipsets i hardware allowig them to iterface with multiple commuicatio stadards. Moder cellular phoes typically are capable of commuicatios usig two or three wireless stadards. First, the phoe must be capable of commuicatig with its origial digital cellular etwork (e.g. GSM, CDMA). For rural areas where a basestatio to the digital cellular etwork is out of rage the phoe ca eter its aalog roamig mode of operatio (e.g. AMPS) allowig it to commuicate with aalog basestatios that may be i the area. Fially, may moder phoes also have a broadbad mode of op-

13 4 eratio allowig users to upload/dowload data files, pictures, video, etc. Table II provides specificatios for some of the most popular cellular stadards curretly beig implemeted throughout the world. Table II. Existig Cellular Commuicatio Stadards [7] AMPS CDMA GSM W-CDMA Tx: (IMT-2000) Tx: Rx: Rx: Tx: Frequecy Tx: Tx: Rx: Rage (MHz) Rx: Rx: Tx: (PCS 1900) Tx: Rx: Rx: Tx: Rx: Multiple Access Method FDMA CDMA/FDMA TDMA/FDMA CDMA Chael Spacig 30 khz 1250 khz 200 khz 5 MHz Modulatio Type FM QPSK/OQPSK GMSK QPSK Chael Bit Rate N/A Mb/s Kb/s 384 Kb/s While these cellular phoes are capable of multi-stadard commuicatios the umber of commuicatio stadards available are limited sice each stadard requires a differet chipset. Implemetatio of SDR techology ito these portable phoes broades their capacity to implemet differet commuicatio stadards. Such flexibility opes the door for umerous applicatios i terms of voice commuicatios ad multimedia. Maitaiig commuicatios durig itraatioal ad iteratioal travel ca become cumbersome as differet regios implemet differet commuicatio stadards. SDR techology ca allow for commuicatios to remai uiterrupted while travelig through such regios. Additioally, it ca also allow for the capability to commuicate peer to peer with other mobile radios that may be usig a umber of differet aalog or digital commuicatio schemes. Aother useful applicatio of SDR is the capability to coect to the iteret via a WLAN, or a Wireless Metropolita Area Network (WMAN) that is implemetig a IEEE wireless commuicatio stadard. The SDR might also be able to commuicate

14 5 with various remote media devices i a home or office usig Bluetooth TM techology. For example a perso may wish to fid a priter that is available locally to prit out a hardcopy of a recetly received. Table III shows specificatios for some of the most commoly implemeted WLAN stadards curretly implemeted. Table III. Existig WLAN Stadards [7] IEEE b IEEE g Bluetooth TM IEEE a Frequecy Rage GHz GHz GHz GHz Multiple Access Method CSMA-CSA CSMA-CSA TDMA CSMA-CSA Chael Spacig 25 MHz 25 MHz 1 MHz 528 MHz Modulatio Type DBPSK/DQPSK OFDM GFSK Pulse Shapig/OFDM Data Rate 11 Mb/s 54 Mb/s 1 Mb/s 480 Mb/s SDR provides a solutio to may existig wireless commuicatio issues i both the public ad private sector. With the wide-spread implemetatio of SDR also comes potetial for ew protocols ad cocepts to advace the capabilities of wireless commuicatio. A cocept that has garered much attetio recetly particularly for its potetial to utilize frequecy spectrum more efficietly is that of Cogitive Radio (CR). CR was first itroduced i a article for IEEE Persoal Commuicatios [8]. While curret techology is ot capable for affordable wide-spread implemetatio it is expected CR is expected by may to be the ext geeratio of SDR. CR is a more itelliget form of SDR that is capable of maagig its ow resources ad parameters by makig iformed decisios based upo awareess of oe or may of the followig factors [8]-[10]: Locatio: Is the CR located i a geographical regio where certai frequecy bads are ulicesed? Is the CR located i a area accessible to a WLAN or WMAN? Eviromet: Is the CR curretly i a particularly oisy eviromet? Is the CR travelig i a vehicle?

15 6 Spectrum: Which frequecy bads are curretly beig used? Ca the CR use TDMA or FDMA to trasmit/receive withi a frequecy bad without creatig iterferece? User Behavior: Are there situatios where the user prefers higher badwidth for higher quality voice commuicatios. Does the user desire periodic updates o weather, ews, or ? The autoomous ature of CR provides may opportuities for wireless commuicatio. Probably the greatest opportuity exists for the possibility of adaptive spectrum utilizatio with CR. Frequecy spectrum is cosidered to be a limited atural resource. This has caused frequecy spectrum to be regulated by agecies such as the US Federal Commuicatios Commissio (FCC). Curretly frequecy spectrum is regulated usig fixed spectrum allocatio i which discrete frequecy segmets are allocated for specific devices ad/or fuctios. This form of frequecy allocatio is cosidered by may to be iefficiet sice spectrum utilizatio varies with time ad geographic locatio (e.g. urba areas vs. rural areas). The recet desire for SDR ad multi-stadard commuicatios has had a major impact o moder trasceiver desig. Fig. 1 shows a system-level diagram of a possible SDR architecture. The desire for SDR has ecouraged frameworks to iclude more digital software-based hardware while miimizig aalog hardware. Direct coversio based trasceivers (zero IF) are beig implemeted much more frequetly i recet years as opposed to the heterodye based architectures which require coversio to a itermediate frequecy (IF) before coversio to basebad (BB). Heterodye based trasceivers architectures beig implemeted are commoly digitized at the IF bad ad dowcoverted digitally to BB to avoid the eed for additioal mixers. Advaced digital sigal processig techiques are beig implemeted i trasceiver architectures to icrease the flexibility of processig both IF ad BB sigals

16 7 Fig. 1. Geeralized View of a SDR Trasceiver Architecture i real-time. While digital techology has come a log way i its evolutio it is still ot yet practical to digitally process RF sigals i real-time. Therefore, it appears that RF trasceivers that are completely software-defied are ot plausible i the ear future. For ow, SDRs will cotiue to require a hardware based RF frot-ed to operate. The digital hardware implemeted for basebad sigal processig i the SDR trasceiver is far more complex tha the aalog hardware implemeted i the RF frot-ed. However, desig of aalog RF hardware teds to pose the greatest challege i wireless trasceiver desig. There are may reasos for this, oe of the mai difficulties beig the umerous tradeoffs ecoutered durig the desig of RF microelectroics. Fig. 2 shows a hexago illustratig some of the importat trade-offs that exist i the desig of RF microelectroics. [11]. RF microelectroic systems are characterized by several opposable parameters. Chages made to improve a particular parameter i a RF system leads to the degra-

17 8 Fig. 2. RF Desig Hexago [11] datio of other system parameters. Because of this, RF hardware must be customized for its applicatio to optimize performace ad meet required miimum specificatios. For may moder commuicatio stadards such specificatios ca be very difficult to achieve. Such difficulty is ofte amplified by the eed for RF desigers to itegrate aalog systems usig digital based IC techologies. Thus, the recet desire for SDR ad multi-stadard commuicatios poses may challeges to the desig of multi-frequecy ad multi-badwidth RF frot-eds. Such challeges are reflected by the amout of research that has recetly bee reported o the developmet of RF hardware compoets suitable for multi-stadard commuicatios [12], [13], [14]. This tred has led to the developmet of programmable Aalog to Digital Coverters (ADCs), programmable Digital to Aalog Coverters, Programmable Filters. MEMS also shows promise i improvig programmability as well as hardware recofiguratio. The local oscillator (LO) of wireless trasceivers has received much attetio due to the desire for geeratio of a wide rage of carrier frequecies. The LO of a RF trasceiver geerates the carrier frequecies used to modulate ad demodulate message sigals. The LO is typically implemeted with a voltage cotrolled oscillator i some type of phase-locked loop (PLL) cofiguratio. To icrease the umber of

18 9 operatig frequecies of the RF trasceiver emphasis has recetly bee placed upo icreasig the tuig frequecy rage of VCOs. A. VCO Desig Challeges The followig are commoly used metrics to characterize the performace of a VCO. Results provided i Chapter V of this thesis are calculated based o these metrics. Tuig Rage is the rage of oscillatio frequecies the VCO is capable of operatig at relative to its ceter frequecy. T R = 100 ( ) fmax 1 [%] (1.1) f c where f c is the ceter frequecy of the VCO ad f max is the maximum operatig frequecy. Typically, a wide tuig rage is desired i a VCO to overcome process ad temperature variatios that may cause the ceter frequecy of the VCO to vary. As metioed previously, implemetatio of a VCO with a wide-tuig rage ca reduce the amout of hardware ecessary to realize a multi-stadard RF frot-ed. Tuig Sesitivity is the rate at which the frequecy of oscillatio chages with respect to the cotrol voltage at the ceter frequecy. K vco = dω o dv [ ] V Hz (1.2) Typically, a large tuig rage is desired for a VCO while a large tuig sesitivity is ot. A VCO with a large tuig sesitivity is more capable of covertig amplitude oise from its cotrol voltage ito phase oise of the output frequecy.

19 10 Phase Noise is the radom fluctuatios of the oscillatio frequecy (ad thus phase) i a o-ideal oscillator. Phase oise degrades the sigal to oise ratio (SNR) of wireless commuicatios systems. Phase oise ca also cause iterferece to other commuicatio systems operatig at eighborig frequecies. A commo method of measurig phase oise is as follows: L( f) = P SSB P S [ ] dbc Hz (1.3) where P S is the spectral power at the oscillatio frequecy (sigal) ad P SSB is the spectral power of 1 Hz of badwidth of a sigle-sidebad offset frequecy f Hz from the carrier. Harmoic Distortio a ideal harmoic oscillator produces a perfect siusoid at the oscillatio frequecy (ω o ). Whe o-liearities eter the system it causes this siusoid to become distorted. This distortio creates additioal harmoics at differet multiples of the fudametal frequecy. This additioal harmoic cotet is kow as harmoic distortio. Harmoic distortio ca be determied from the output power spectrum as follows HD i = P i P s [ ] dbc Hz (1.4) where HD i is the amout of distortio preset at the i th harmoic. P i is the spectral power of 1 Hz of badwidth at the i th multiple of the fudametal oscillatio frequecy ad P s is the spectral power at the fudametal oscillatio frequecy. Total harmoic distortio is the sum of the distortio preset for all harmoics

20 11 greater tha the fudametal frequecy T HD = i=1 P i P s [ ] dbc Hz (1.5) aother commo represetatio of THD is as a percetage relative to the fudametal frequecy T HD = 100 P i [%] (1.6) P s i=1 Reductio of harmoic distortio is essetial to maximizig the performace of a wireless trasceiver. Whe excessive harmoic distortio is trasmitted or received by a wireless trasceiver it ca lead to sigificat iterferece of the message sigal. Harmoic distortio ca be reduced i a wireless trasceiver through filterig ad utilizig high quality liear compoets. Figure of Merit a figure of merit (FoM) exists that is widely accepted i the RF commuity to provide a phase oise performace compariso of differet offset frequecies ad for VCOs operatig at differet oscillatio frequecies. F om = L f + 20 log( f f o ) + 10 log( P cos. ) [db] (1.7) 1 mw The FoM calculates a phase oise metric based upo the VCO oscillatio frequecy, measured phase oise, phase oise frequecy offset, ad power cosumptio. B. Problem Descriptio Recetly a great deal of research has bee devoted towards icreasig the tuig rage ad frequecy stability (to improve phase oise) of Variable Frequecy Oscillators (VFO). However ot much research has devoted towards amplitude stability. For

21 12 most VFO topologies the amplitude of oscillatio varies with oscillatio frequecy. For wide-tuig rage VFOs amplitude cotrol techiques become ecessary to prevet large deviatios i oscillatio amplitude over the frequecy tuig rage [15], [16]. Amplitude of oscillatio is importat sice it ca play a sigificat role i the total harmoic distortio (THD) ad overall phase oise performace [16] of the oscillator. Curret techiques for amplitude cotrol are either expesive to implemet or cause sigificat degradatio to phase oise performace. Better amplitude cotrol techiques are desired for wide-tuig rage VFOs that are relatively cheap to implemet ad do ot severely degrade phase oise performace. C. Proposed Solutio Fig. 3. VFO with Modified Slidig-Mode Amplitude Cotrol This thesis presets slidig-mode cotrol (SMC) techiques applicable to harmoic oscillators to provide improved amplitude cotrol. Fig. 3 shows the systemlevel diagram of the proposed SMC. This is a switch-based cotroller allowig for the potetial cost of realizatio to be relatively low. This SMC ca be implemeted with slidig-maifolds based o ay vector p-orm allowig for a umber of differet

22 13 realizatios to be possible. The proposed cotroller may also implemet a optioal charge pump at the output of the SMC to reduce chatterig. D. Thesis Orgaizatio The emphasis of this thesis is o the developmet of amplitude-cotrol techiques for wide-tuig rage VCOs. Slidig-mode techiques are proposed to cotrol the amplitude of oscillatio. Chapter II provides backgroud iformatio o periodic oscillatory systems. Two commoly used VCO architectures are characterized ad compared. Existig amplitude cotrol techiques are discussed briefly. Chapter III provides a geeral descriptio of SMC. Mathematical slidig-mode compesatio schemes based o various vector orms are proposed for the VCO architectures discussed i Chapter II. Desig challeges of implemetig SMC are discussed. Chapter IV discusses the physical realizatio of a LC oscillator implemetig SMC. This modified slidig-mode amplitude-cotrolled LC oscillator is desiged ad realized at the board-level usig discrete compoets. Measuremet results of the oscillator are discussed. Chapter V discusses the physical realizatio of a modified SMC rig oscillator simulated usig 0.18 µm TSMC CMOS techology. Simulatio results are discussed ad compared with rig oscillators reported recetly i literature. Chapter VI presets cocludig remarks for the thesis.

23 14 CHAPTER II A. Periodic Oscillatory Systems VARIABLE FREQUENCY OSCILLATORS Periodic oscillatory systems are systems that have a o-costat periodic solutio [17]. The phase portrait of such systems cotai trajectories with closed periodic orbits. As log as a periodic oscillatory system is ot disturbed it will traverse its periodic orbit idefiitely. 1. Poicaré-Bedixso Criterio The Poicaré-Bedixso criterio is a widely celebrated criterio used to prove the existece of periodic orbits for oliear systems of ay order. Fig. 4 shows the Fig. 4. Bouded Regio for Periodic Orbit state-space view a periodic system ẋ = f(x) (2.1) where M is a closed bouded subset of the state-space. Accordig to the Poicaré- Bedixso Criterio for a periodic orbit to exist, such a system must satisfy the

24 15 followig coditios 1. M cotais o equilibrium poits, or cotais oly oe equilibrium poit such that the Jacobia matrix ear this equilibrium has eigevalues with positive real parts. (Hece, the equilibrium poit is either a ustable focus or ustable ode) [17]. 2. Every trajectory startig i M stays i M for all future time [17]. A purely siusoidal periodic orbit is capable of beig boud by a elliptical regio M. However, the shape ad size of the closed ad bouded regio M ca take ay form as log as it is closed ad o-overlappig. It is importat to realize that the Poicaré-Bedixso Criterio provides ecessary coditios for oscillatio but ot ecessarily the sufficiet coditios. 2. Barkhause Criterio The Barkhause Criterio is a commoly used criterio used to provide sufficiet coditios for oscillatio of liearized systems. Fig. 5. Liear Feedback System Fig. 5 shows the system-level diagram of a liear egative-feedback system. Accordig to the Barkhause criterio i order for this system to be capable of sustaied oscillatios the followig coditios must exist [18] H(jω o ) 1 (2.2)

25 16 H(jω o ) = 180 (2.3) 3. Harmoic Oscillatory Systems The simple harmoic oscillator provides a simple example of the behavior of periodic oscillatory systems. This liear oscillator model is helpful i uderstadig the behavior of oliear oscillatory systems eve if they are of a higher degree of order. Fig. 6. System-Level View of Harmoic Oscillator The harmoic oscillator show i Fig. 6 ca be characterized by the followig state equatios ẋ 1 = β 2 x 2 (2.4) ẋ 2 = β 1 x 1 + ζx 2 The characteristic eigevalues for this system are give as λ = ζ 2 ± 1 2 ζ2 4β 1 β 2 (2.5) The equilibrium classificatio of the harmoic oscillator is depedet o the value of ζ. Assumig ζ β 1 β 2, the equilibrium is a stable focus whe ζ < 0, a ustable focus whe ζ > 0, ad a ceter whe ζ = 0. The resultig time domai solutio of

26 17 this system is give as x 1 (t) = r o e ζ 2 t cos(ω o t + θ o ) x 2 (t) = r o e ζ 2 t si(ω o t + θ o ) (2.6) where r o = x 2 1(0) + x 2 2(0) ω o = ζ 2 4 β 1β 2 θ o = ta 1 ( x 2(0) x 1 (0) ) Mathematically, this system is capable of producig a ideal siusoidal sigal. However, there are two fudametal problems with its realizatio. First, the system is ot structurally stable. Perturbatios imposed o the system cause a bifurcatio at the origi from a ceter to either a stable focus or a ustable focus. Such perturbatios essetially destroy the periodic orbit of the system. These perturbatios are uavoidable sice the system is costructed with o-ideal compoets which cotai parasitics ad geerate oise. Secod, assumig such a system is realizable the amplitude of oscillatio is determied by the iitial coditios of the system. This meas that there are a ifiite umber of possible periodic solutios for this system based o the iitial coditios. There are may physical realizatios for oscillatory systems. For this thesis, two popular ad fudametally differet oscillator topologies are selected for experimetatio. The oscillator topologies selected are the egative-g m LC oscillator ad the rig oscillator. B. Variable Frequecy Oscillator Architectures 1. I-phase/Quadrature Negative-G m LC Oscillator Fig. 7 shows a liear model of a egative-g m LC oscillator capable of geeratig both i-phase ad quadrature (I/Q) sigals. The state equatios for this system are give

27 18 Fig. 7. I/Q Negative-G m LC Oscillator as x 1 = 1 x L 2 x 2 = 1 x C C x 3 = 1 x L 4 x 4 = 1 x C C [ G m 1 r p ] x 2 1 C G mcx 4 [ G m 1 r p ] x C G mcx 2 (2.7) where G m deotes the egative trascoductace used to compesate for eergy loss due to parasitics ad r p deotes the equivalet parallel resistace of the LC tak. Whe the oscillator has a large eough Q (typically, Q > 5), this resistace ca be approximated as ( ) r p L 1 = C r L + r C (2.8) where r L ad r C are the series resistace of the iductor (L) ad the capacitor (C) respectively.

28 19 The eigevalues for this system are give as G 2 m 1 rp 2 λ 1 = L2 C G m 1 rp + j G 2L 2 C 2 mc λ 2 = L2 C λ 3 = L2 C λ 4 = L2 C G m 1 rp 2L 2 C 2 G m 1 rp 2L 2 C 2 G m 1 rp 2L 2 C 2 + j G mc C C + j Gmc C + j G mc C 4C 2 G 2 m 1 r 2 p 4C 2 G 2 m 1 r 2 p 4C 2 G 2 m 1 r 2 p 4C 2 + j Gmc G m 1 rp G2 mc r p+g m 2 4r pc 1 2 LC + j G mc G m 1 rp + j Gmc G m 1 rp + j G mc G m 1 rp G2 mcr p+g m 2 4r p 1 C 2 LC G2 mcr p +G m 2 4r pc 1 2 LC G2 mc r p+g m 2 4r p 1 C 2 LC (2.9) Based upo the Poicaré-Bedixso Criterio these eigevalues must be located o the imagiary axis or i the right-half plae (RHP) for a periodic orbit to exist. Aalysis of the system eigevalues shows that i order to accomplish this G m 1 r p. Usig (2.8) the followig relatioship is obtaied for the miimum trascoductace required for sustaied oscillatios G m > C L (r L + r C ) (2.10) Notice that whe G m = 1 r p the system resembles a pair of coupled simple harmoic oscillators (2.4). A detailed aalysis of the I/Q oscillator is preseted i [19]. This paper demostrates that whe this oscillator is desiged appropriately the two idividual LC taks become ijectio-locked. The resultig system behavior ca be modeled as a harmoic oscillator with orthogoal voltage states. Based o the aalysis preseted i [19] the time domai solutio for the I/Q egative-g m LC oscillator ca be approximated as x 1 (t) = C L ρ oe ( Gm 2 1 2rp )t cos(ω o t + φ o ) x 2 (t) = ρ o e ( Gm 2 1 2rp )t si(ω o t + φ o ) C x 3 (t) = ρ L oe ( Gm 2 1 2rp )t si(ω o t + φ o ) x 4 (t) = ρ o e ( Gm 2 1 2rp )t cos(ω o t + φ o ) (2.11)

29 20 where r o = x 2 1(0) + x 2 2(0) + x 2 3(0) + x 2 4(0) ω o = 1 ± G mc LC 2C The oscillatio frequecy of the oscillator becomes offset from the atural oscillatio frequecy of the matched LC taks by Gm c 2C [19]. As metioed previously for the simple harmoic oscillator it is ot practical to assume that the egative trascoductace will cacel out the effective resistace of the tak exactly (G m 1 r p = 0) for all time. Itrisic ad extrisic perturbatios causes both the egative trascoductace ad the effective parallel resistace of the oscillator to vary slightly with time. Therefore, covetioal LC oscillators are desiged to resoate by makig sure that the characteristic eigevalues of the system are located i the RHP. Forcig the system eigevalues ito the RHP allows the system to resoate, however, mathematically this does ot boud the system withi a closed regio as specified by the Poicaré-Bedixso Criterio [17]. Physical bouds of the voltage ad curret sources are ot icluded i (3.3). Howver, the amplitude of oscillatio for the LC VCO is boud by the maximum available curret or voltage (e.g. 2V DD ). Assumig the oscillator is desiged to ot become clipped by the voltage rails the voltage amplitude of the oscillator after startup is give as V swig = I swig r p (2.12) Assumig, 1 LC G mc 2C the frequecy of oscillatio ca be approximated as ω o = 1 LC (2.13) Substitutig this ito (2.8) gives r p = L2 ω 2 o (r L + r C ) (2.14)

30 21 Notice that r p is directly proportioal to ωo. 2 This relatioship demostrates the strog depedece of oscillatio amplitude with oscillatio frequecy for LC based oscillators. For wide-tuig rage VCOs some form of compesatio to provide amplitude cotrol becomes ecessary. 2. Rig Oscillator Fig. 8. Rig Oscillator Fig. 8 shows a liearized -order rig oscillator. The state-space model of this liearized rig oscillator is ẋ 1 = G m C x 1 RC x 1 ẋ 2 = Gm C x 1 1 RC x 2. (2.15) ẋ = G m C x 1 1 RC x Notice that the rig oscillator ca have a ulimited umber of delay stages i the feedback loop. Followig the coditios specified by the Barkhause Criterio (2.3) it is ecessary to have a odd umber of ivertig delay stages for the topology show i Fig. 8. We ote that it is possible to implemet a rig oscillator with a eve umber of stages as log as there is at least oe o-ivertig stage ad a odd umber of

31 22 ivertig stages. It has bee reported that icreasig the umber of these delay stages helps to improve overall phase oise at the cost of area ad power cosumptio [20]. The characteristic eigevalues of the -order rig oscillator with a odd umber of delay stages is give as λ 1 = GmR+1 RC λ 2,3 = [ ( 1) 1 cos ( 1π λ 1, = [ ( 1) 1 2 cos = 3, 5,..., ) ± j si ( 1π. ( 1 2 π ) ± j si )] Gm C 1 RC ( 1 2 π )] G m C 1 RC (2.16) The characteristic eigevalues of the -order rig oscillator with a eve umber of delay stages (1 stage o-ivertig, -1 stages ivertig) is give as λ 1,2 = [ ( 1) 1 cos ( ( π ) ± j si π λ 3,4 = [ ( 1) 2 cos ( ) ( 2π ± j si 2π λ 1, = [ ( 1) 1 2 cos = 4, 6,...,. ( 2 2 π )] Gm C 1 RC ) ± j si )] Gm C 1 RC ( 2 2 π )] G m C 1 RC (2.17) As discussed previously harmoic oscillatory systems typically are secod-order systems i which the characteristic eigevalues are complex cojugates. Aalysis of the eigevalues give for the rig oscillator shows that whe the loop gai is approximately uity the system cotais oly oe complex cojugate pair i the RHP. All other system eigevalues are located i the LHP regardless of the order. The steady-state system respose of this system depeds oly o this RHP complex cojugate pair sice the system respose attributed to the LHP eigevalues decays expoetially with time.

32 23 We ote that if the loop gai becomes much greater tha uity additioal complex cojugate eigevalue pairs may be forced ito the RHP. Whe this happes it is possible for the output respose become amplitude modulated betwee the oscillatio frequecies of the complex cojugate eigevalue pairs i the RHP. Assumig that the loop gai is ear uity ad the real pole located i the LHP the steady-state time domai solutio for the liearized rig oscillator is approximated as where x 1 (t) = x 1 (0)e (A A o)t cos(ω o t + 1 ( π + π) + φ o ) x 2 (t) = x 2 (0)e (A A o)t cos(ω o t + 2 ( π + π) + φ o ) x (t) = x (0)e (A A o)t cos(ω o t + ( π + π) + φ o ). (2.18) A = G m R A o = sec ( ) π ω o = ta ( π ) RC For a rig oscillator implemeted with idetical delay cells the A o parameter defied i (2.18) provides the miimum gai requiremet for each delay cell to meet the uity feedback-loop gai requiremet. This gai requiremet is depedet o the umber of delay stages i the rig. Assumig that the rig oscillator has sufficiet gai ad is ot experiecig sigificat clippig the time domai solutio produces a siusoid at the output of each delay cell. Notice that the siusoids of adjacet delay cells ecouter a phase shift of π which ca be attributed to the Barkhause criterio that the overall phase shift must be equivalet to 180 = π divided equally betwee the delay stages i the rig. A additioal 180 = π phase shift occurs through the iversio of each delay cell. The resultig phase shift betwee adjacet delay cells is the give by ( ) ta 1 xi = π x i+1 + π (2.19)

33 24 We ote that the oscillatio frequecy is iversely proportioal to the the time costat of each delay cell. As metioed previously the oscillatio frequecy of the LC oscillator is iversely proportioal to the square root of the LC product. Compared to the LC oscillator the rig oscillator is capable of a much wider tuig rage for variatios i its RC time costat. Ufortuately, this relatioship also allows for the rig oscillator to be much more susceptible to phase oise whe compared to the badpass behavior of the LC based VCOs. C. Existig Amplitude Cotrol Techiques May existig VCO architectures implemeted have o explicit amplitude cotrol [18]. Amplitude cotrollers ofte are ot implemeted due to additioal complexity ad likelihood for phase oise degradatio. As metioed previously, mathematically these VCOs are iheretly ustable. A physical boud does exist o the maximum voltage swig ad curret swig that a VCO ca achieve. Appropriate selectio of the curret bias of a VCO determies the maximum curret swig that ca be achieved. Assumig that trasistors do ot become clipped by the voltage rails the correspodig voltage swig is give as V swig = I swig R (2.20) Cosiderig this i the desig of the VCO helps to miimize harmoic distortio i the the system ad ca lead to improved phase oise performace. Cotrol of the VCO amplitude of oscillatio through proper selectio of the curret bias may be effective for arrowbad applicatios. However, for wide-tuig rage VCOs this techique is ot as effective sice most VCO topologies have a oscillatio amplitude which is depedet o the oscillatio frequecy.

34 25 Fig. 9. Covetioal Amplitude Gai Cotroller Fig. 9 shows a commoly implemeted amplitude gai cotroller (AGC). The cotroller observes the output respose of the VCO ad implemets a peak detector to estimate the oscillatio amplitude. The estimated oscillatio amplitude is compared with a referece usig a differetial error amplifier to adjust the oscillatio amplitude accordigly. Typically, a LPF is also implemeted to filter out amplitude oise geerated by the amplitude cotroller. This is importat sice ay amplitude oise itroduced to the VCO ca potetially be trasformed ito phase oise. A discretized versio of this amplitude cotrol is proposed i [15]. For this feedback cotrol a peak detector is implemeted to estimate the oscillatio amplitude. A multi-bit voltage comparator compares this amplitude with the referece. The voltage comparator outputs a biary vector to a fiite state machie which cotrols biary weighted array of curret sources that supply the VCO. Switchig o differet combiatios of the curret sources allows for effective cotrol of the boud o the oscillatio amplitude without ijectig amplitude oise from the peak detector or a error amplifier. Peak detectors used for amplitude cotrol of a VCO attempt to estimate the amplitude of oscillatio through observatio of oly oe sigal vector. Fig. 10 shows the state-space view of how a peak detector based AGC attempts provide this boud.

35 26 Fig. 10. Boudig Regio of 2 d Order AGC A disadvatage of this cotrol is that decisios are made based o oly oe state of the system. The peak detector is oly accurate for oly oe istace (θ = 2π) i the oscillatio period (θ = π, 2π for peak detectio implemetig full-wave rectificatio). A itegrator is implemeted to hold this peak for the duratio of the oscillatio period where the peak detector is ot valid. The drawback of this is that if the oscillatio amplitude varies the peak detector requires at least oe oscillatio period ( 1 2 period for full-wave rectificatio) to detect the variace i amplitude. Wide-tuig rage VCOs ca further complicate the desig of the cotroller sice implemetatio of a fixed itegrator may ot be appropriate for all oscillatio frequecies i the tuig rage. The slidig-mode amplitude cotrol techiques discussed i this thesis provide a more robust method for amplitude cotrol of harmoic oscillators. The followig Chapter explais how SMC techiques ca sigificatly improve respose time while providig several cost-effective optios for realizatio. May topology specific amplitude cotrol techiques also exist for various VCOs. Such techiques iclude replica feedback biasig for curret-cotrolled rig oscillators to achieve costat voltage swig i spite of variatios i curret biasig. May diode based amplitude cotrollers have also bee proposed that limit the oscillatio

36 27 amplitude to the tur-o voltage of the diodes implemeted. While each of these cotrol techiques have bee show to be effective at providig amplitude cotrol they have the drawback of beig applicatio ad topology specific. The slidig-mode amplitude cotrol techiques discussed for this thesis are applicable to ay VCO where states are observable ad harmoic behavior is desired.

37 28 CHAPTER III PROPOSED MODIFIED SLIDING-MODE COMPENSATION A. Slidig-Mode Cotrol Slidig-mode cotrol (SMC) is a type of cotrol i which the dyamics of a oliear system are altered through the use of high-speed switchig cotrols. The switchig cotrols alter the system dyamics forcig the system states to traverse a desired slidig maifold. SMC ivolves two phases of operatio: 1. The system trajectory is forced oto the desired slidig maifold i fiite time for ay set of iitial coditios. 2. The system trajectory is cofied to the slidig maifold idefiitely. The resultig behavior of the system cofied to the slidig maifold (called the slidig-mode ) is verified to exhibit the desired properties (boudedess, limit cycle behavior, etc.). The ideal slidig maifold for a siusoidal oscillator is a ellipse (ot ecessarily a uit circle). Forcig a periodic oscillatory system to slide directly oto a elliptical orbit causes the system to produce a siusoidal respose with miimal harmoic distortio. Fig. 11 shows the desired slidig-maifold for a harmoic oscillator. The slidig maifold used to cofie the system trajectory divides the state space ito two regios. The output state of the SMC depeds o which of these regios the system is curretly operatig i: 1. Growth Regio : System state is eclosed by the slidig maifold. SMC

38 29 Fig. 11. Slidig Maifold for Harmoic Oscillator creates a ustable focus at the origi causig the oscillatio amplitude to icrease expoetially with time. 2. Decay Regio : System state is outside of slidig maifold. SMC creates a stable focus at the origi causig the oscillatio amplitude to decrease expoetially with time. (a) Ustable Focus (b) Stable Focus Fig. 12. Vector Norms Implemeted as Slidig-Maifolds Togglig the classificatio of the equilibrium at the origi betwee a stable focus ad a ustable focus causes the amplitude of oscillatio to grow expoetially or decay expoetially with time. Fig. 12 shows the trajectory of each of these

39 30 equilibrium classificatios i state-space. Switchig betwee these equilibrium classificatios allows for effective cotrol of the system trajectory. The SMC implemets such switchig behavior to attract the system trajectory oto a desired slidig maifold. Aalysis of the system behavior of the VCO architectures discussed previously exposes opportuities for cotrol of the equilibrium classificatio at the origi. It will be show that cotrol of the trascoductace of each VCO provides such a opportuity. Advatages of SMC are that it is robust ad relatively cheap to implemet sice the cotroller is switch-based. Oe of the mai cosideratios i the implemetatio of SMC is the chatterig oise geerated i the system due to the fiite propagatio delay of the SMC switches. Excessive chatterig is of particular importace to a VCO sice it ca sigificatly degrade its phase oise performace. B. Applicatio to the I/Q Negative-G m LC Oscillator Aalysis of (3.3) ad (2.10) provides isight towards a relatioship to toggle the classificatio of the focus at the origi. It was previously metioed that whe (2.10) is ot satisfied the origi becomes either a ceter or a stable focus. Otherwise if (2.10) is ot satisfied the origi is a ustable focus. The SMC utilizes this relatioship i order to bifurcate the origi so that the system trajectory is pushed towards a desired slidig-maifold. To accomplish this the trascoductace of the egative-g m LC oscillator described i (3.3) is desiged to be G m (u) = 1 r p + α sg(u) (3.1) where α is the switchig gai of the SMC ad the iput u is based upo the slidig maifold used to boud the periodic orbit. To miimize the switchig gai of the

40 31 SMC a DC compoet is icluded to cacel out the equivalet parallel resistace of the LC tak (r p ). The proposed slidig-mode compesated egative-g m LC oscillator is give as x 1 = 1 x L 2 x 2 = 1 x C 1 + α sg(σ C )x 2 Gmc x C 4 x 3 = 1 x L 4 (3.2) x 4 = 1 x C 3 + α sg(σ C )x 4 + G mc x C 2 The proposed SMC is desiged to provide amplitude cotrol of the egative-g m LC oscillator. 1. Periodic Stability Aalysis Fig. 13. State-Space Trasformatio of LC Oscillator To simplify stability aalysis of the Negative-G m LC Oscillator a system trasformatio is performed. This system trasformatio chages the elliptical periodic orbit of each idividual LC oscillator to a circular periodic orbit. Fig. 13 illustrates this trasformatio. I order to ormalize both of these states to equivalet uits z 1

41 32 is trasformed based upo the reactace of the LC tak. z 1 = L C x 1 z 2 = x 2 L z 3 = x C 3 (3.3) z 4 = x 2 Givig the followig trasformed system z 1 = 1 LC z 2 z 2 = 1 LC z 1 + α sg(u)z C 2 G mc z C 4 z 3 = 1 LC z 4 (3.4) z 4 = 1 LC z 3 + α sg(u)z C 4 + Gmc z C 2 For the SMC to be effective the resultig system should produce a stable limit cycle with a orbit that resembles a uit circle. The radius of the orbit is defied based o the desired amplitude of oscillatio (ρ o > 0). To demostrate this a Euclidea distace fuctio is used to determie the distace that the system state is away from the desired periodic orbit ρ = z z z z 2 4 (3.5) σ = ρ o ρ (3.6) where ρ o is the desired amplitude of oscillatio for the system. Usig this distace fuctio a quadratic Lyapuov fuctio cadidate is created V = 1 2 σ2 (3.7) The resultig derivative of the Lyapuov fuctio is determied usig the trasformed system model give i (3.4).

42 33 V = σ σ = 1 2 ( z z2 2 + z3 2 + z4) (2z 1 z 1 + 2z 2 z 2 + 2z 3 z 3 + 2z 4 z 4 ) (3.8) Substitutio of (3.5) ad (3.4) gives V = α ρ σ sg(u)(z2 2 + z 2 4) (3.9) based o this result u is selected to be u = σ (3.10) resultig i V = α ρ σ (z2 2 + z 2 4) (3.11) From this result it ca be cocluded that V is mootoically decreasig for σ 0, or z 2 0 ad z 4 0. V < 0, x R 2 ad σ 0, z 2, z 4 0 (3.12) Also we ote that V = 0, if σ = 0, or z 2, z 4 = 0 (3.13) This demostrates that the distace parameter σ is either decreasig or held costat with time. The oly istace where σ 0 is costat occurs whe z 2, z 4 = 0. It ca be demostrated that this costat σ 0 situatio oly occurs for fiite momets i time resultig i o chage to the trajectory of the system. We ote that it is impossible for σ to be costat with time ad ot equal to zero. I other words the coditio σ 0, σ = 0 t 0 (3.14)

43 34 caot occur. From (3.4) this coditio implies z 2, z 4 = 0 z 2, z 4 = 0 z 1, z 3 = 0 z(t) = t 0 Notice that this situatio oly occurs at the origi. Assumig that the oscillator is ot iitialized at the origi ad that ρ o > 0 it ca be cocluded that (3.14) ca ever occur. Therefore, the distace metric σ decreases mootoically. This proves that the circular periodic orbit (trasformed) with radius ρ o is attractive. The slidig-mode compesatio forces the system towards this orbit for ay ρ > 0 ad ay set of iitial coditios x R 2 {0}. Whe the system is o the desired periodic orbit it ever leaves the orbit. Thus a elliptical limit cycle exists for all time. The oly remaiig ucertaity of this SMC is the system behavior whe the trajectory is located o the slidig maifold. To determie this slidig-mode solutio it is assumed that σ = 0 σ = 0 (3.15) Substitutio of (3.6) gives ρ = (z2 1 + z2 2 + z3 2 + z4) (2z1 z 1 + 2z 2 z 2 + 2z 3 z 3 + 2z 4 z 4 ) = 0 (3.16) This ca be simplified sice ρ = 0 z 1 z 1 + z 2 z 2 + z 3 z 3 + z 4 z 4 = 0 (3.17)

44 35 Substitutio of (3.4) gives α C sg(u)(z2 2 + z4) 2 = 0 z 2, z 4 = 0 or sg(u) = 0 (3.18) It was show previously that z 2, z 4 0 t 0 sg(u) = 0 (3.19) Substitutio of this result back ito (3.3) gives the slidig-mode solutio x 1 = 1 x L 2 x 2 = 1 x C 1 G mc x C 4 x 3 = 1 x L 4 (3.20) x 4 = 1 x C 3 + G mc x C 2 Assumig G m (0) = r p the slidig-mode solutio resembles a pair of coupled simple harmoic oscillators. We ote that the SMC is essetially shutoff whe the system is o the slidig maifold allowig for the atural harmoic behavior of the system to oly be preset. From [21] it ca be cocluded that the system trajectory approaches the slidig-mode solutio whe the system is iitialized off of the slidig maifold. C. Applicatio to Rig Oscillator From the Barkhause criterio it is kow that the ope-loop gai of the rig oscillator must be greater tha uity for resoatio to occur. Whe this loop gai is less tha uity the origi becomes a stable focus causig oscillatios to decay expoetially with time. As with the egative-g m LC oscillator togglig this equilibrium classificatio at the origi betwee a stable focus ad a ustable focus allows for effective cotrol of the system trajectory. There are umerous methods to cotrol the

45 36 ope-loop gai of the rig oscillator. The most appropriate method for maipulatig the ope-loop gai may deped o the topology of the idividual delay cells. Overall, maipulatig the ope-loop gai of the rig through the trascoductace of each delay cell is a effective method of cotrol without itroducig sigificat oise ito the system. To allow for miimal switchig gai the trascoductace of each delay cell is selected to have the followig cotrol G m (u) = sec ( ) π α sg(u) (3.21) R where α is the switchig gai of the slidig-mode cotroller. A o is a DC compoet of the slidig-mode cotrol desiged to set the ope-loop gai to uity. The proposed slidig-mode compesated rig oscillator is give as ẋ 1 = 1 RC x 1 1 C ẋ 2 = 1 RC x 2 1 C ẋ = 1 RC x 1 C [ sec( π ] α sg(u) x R [ ] sec( π ) α sg(u) R. x 1 [ sec( π R α sg(u) ] x 1 (3.22) 1. Periodic Stability Aalysis To simplify the aalysis of the rig oscillator a equivalece trasformatio is applied to the origial liear model of the rig oscillator give i (2.15). z = P x (3.23) The liearized model is trasformed ito a algebraically equivalet Modal Form [22] i order to decouple adjacet states from each other ad divide the system ito disjoit sets. For a odd umber of delay stages () the P matrix is give as P 1 = [λ 1, Re(λ 2 ), Im(λ 2 ),... Re(λ 1 ), Im(λ 1 )] (3.24)

46 37 The Modal Form is determied usig the characteristic eigevalues give i (2.16). The modal form for a odd umber of delay stages is ż 1 = 1 [G RC mr + 1]z 1 [ ż 2 = 1 RC ( 1) 1 cos ( ) 1π Gm R 1 ] z 2 + si ( 1π ż 3 = si ( 1π [ ż 1 = 1 RC ż = si ) z2 + 1 RC ( 1) 1 2 cos ( 1 2 π [ ( 1) 1 cos ( 1π. ( 1 2 π ) z RC ) ] G m R 1 [ ( 1) 1 2 cos ) z3 ) Gm R 1 ] z 3 z 1 + si ( 1 2 π ( 1 2 π ) ) G m R 1 ] z z (3.25) The slidig-mode cotrol (3.21) is the substituted ito (3.25) givig the followig trasformed oliear system [ ( ż 1 = 1 RC sec π ) ] + 1 αr sg(u) z1 ż 2 = ( 1) 1 cos ( ) 1π α sg(u)z C 2 + si ( 1π ż 3 = si ( 1π ż 1 = ( 1) 1 2 ż = si ( 1 ) z2 ( 1) 1 cos ( 1π 2 π [ 1 RC. ) z3 ) α C sg(u)z 3 ] ν() cos( ) 1 + αrν() sg(u) π ) z 1 ( 1) RC [ z 1 + si ( 1 2 π ) z ν() cos( π ) 1 + αrν() sg(u) ] z (3.26) where ν() = cos ( 1 2 π ) Aalysis of (3.26) shows that z 1 is depedet oly o z 1. The remaiig states of the modal form for this liear odd-ordered rig oscillator cotais 1 2 pairs of states that resemble a set of decoupled 2 d -order harmoic oscillators.

47 38 Each of these decoupled oscillators is characterized by [ cos( iπ ) z i = ( 1) i 1 RC cos( ) 1 + αr cos ( iπ π [ ż i+1 = si ( ) iπ zi ( 1) i 1 RC cos( iπ ) ) sg(u) ] z i + si ( iπ ) zi+1 cos( π ) 1 + αr cos ( iπ ) sg(u) ] z i+1 (3.27) i = 2,..., To demostrate stability i the sese of Lyapuov multiple Lyapuov cadidates are created for each of these autoomous state subsets. V T = V 1 + V V (3.28) Each of these Lyapuov cadidates excludig V 2 are Globally Asymptotically Stable (GAS) with respect to the origi. This is show first with cadidate V 1 which is defied as Takig the derivative gives V 1 = 1 2 z2 1 (3.29) [ ( V 1 + sec π ) ] 1 = z 1 z 1 = + α RC C sg(u) z1 2 (3.30) Thus V 1 < 0, α < 1 + sec ( ) π R Next it is show that Lyapuov fuctios V 3,..., V 1 1 are also GAS. 2 (3.31) Takig the derivative gives V i i 2 +1 = 1 2 z2 i z2 i+1, i = 4, 6,..., 1 (3.32) V i i 2 +1 = z iz i + z i+1 ż i+1, i = 4, 6,..., 1 (3.33)

48 39 Substitutio of (3.26) gives V i i 2 +1 = 1 cos RC i i 2 π cos( ) π 1 + αr cos ( π ) sg(u) (z2 i + z 2 i+1) (3.34) Sice The i = 4, 6,..., 1 ( i i 2 cos π ) ( π < cos, i = 4, 6,..., 1 (3.35) ) ( cos π ) ( cos 3π ) V i i +1 < 0, α < 2 R cos ( ), i = 4, 6,..., 1 (3.36) 2 π We ote that requiremets upo the switchig gai (α) becomes icreasigly difficult to meet as the umber of delay stages icreases. It is the show that each Lyapuov cadidate excludig V 2 is GAS with respect to the origi. Sice each of these cadidates cotais disjoit state subsets its ca the be cocluded that the states themselves are GAS with respect to the origi. This is importat because after eough time has passed (T) these states become egligibly small. ( ɛ > 0)( T > 0) s.t. z i (t) < ɛ, t T i = 1, 4, 5,..., (3.37) This is sigificat sice it shows that t > T the cotributio of all system states other tha z 2 ad z 3 is less tha ɛ. Settig ɛ to a egligible value allows for these states to be essetially igored for the overall stability aalysis of the etire system. After eough time has passed the followig approximatio is valid V T = V2, t > T (3.38)

49 40 Sice all other Lyapuov cadidates are GAS with respect to the origi periodic stability of the SMC is demostrated based o the remaiig Lyapuov cadidate V 2. A distace metric with respect to the slidig-maifold is defied as σ = ρ o ρ (3.39) where ρ = z z 2 3 (3.40) The quadratic Lyapuov cadidate V 2 is defied based o this distace metric V 2 = 1 2 σ2 (3.41) takig the derivative gives V 2 = 1 ρ cos ( π ) σ σ = 1 ( π ) ρ cos σ(z 2 z 2 + z 3 z 3 ) (3.42) Substitutig (3.26) gives V 2 = α ( π ) ρc cos σ sg(u)(z2 2 + z 2 3) = α ρ ( π ) C cos σ sg(u) (3.43) From this result u is selected to be u = ρ o z z z 2 = σ, t > T (3.44) which results i V 2 = α ρ C cos ( π ) σ, t > T (3.45) From this it ca be cocluded that V 2 < 0, z R 2 (3.46)

50 41 The distace metric σ decreases mootoically. This proves that the circular periodic orbit with radius ρ o is attractive. The slidig-mode compesatio forces the system towards this orbit for ay ρ > 0 ad ay set of iitial coditios z R {0}. Whe the system is o the desired periodic orbit it ever leaves the orbit. Thus, a limit cycle exists for all time. We ote that the periodic stability aalysis of a eve-order rig oscillator shows the same relatioship. To determie the slidig-mode solutio of the rig oscillator it is assumed that σ = 0 σ = 0 (3.47) Substitutio of (3.6) gives ρ = (z2 1 + z z) (2z1 z 1 + 2z 2 z z z ) = 0 (3.48) This ca be simplified sice ρ = 0 z 1 z 1 + z 2 z z z = 0 (3.49) Substitutio of (3.26) gives α ρ C cos ( π ) sg(u) = 0, t > T (3.50) Givig the followig result α ρ C cos ( π ) sg(u) = 0, t > T sg(u) = 0, t > T (3.51)

51 42 Substitutio of this back ito (3.26) gives the slidig-mode solutio ż 1 = 1 [sec ( π RC ) + 1]z1 ż 2 = si ( 1π ) z3 ż 3 = si ( 1π ) z2 ż 1 = ( 1) 1 2 ż = si ( 1 2 π 1 RC. 2 π 1 cos cos( π ) ) z 1 + ( 1) αr sg(u) z 1 + si 1 RC 2 π 1 cos cos( π ) ( 1 2 π ) z 1 + αr sg(u) z (3.52) Assumig t > T reduces the system to 2 d -order ż 2 = si ( π ) z3 ż 3 = si ( ) (3.53) π z2 This solutio shows that t > T whe the system is o the slidig maifold it behaves like a simple harmoic oscillator. From [21] it ca be cocluded that the system trajectory approaches the slidig-mode solutio whe the system is iitialized off of the slidig-maifold. D. Equivalece of Vector Norms The desired trajectory of a harmoic oscillator is a elliptical orbit. Implemetig a slidig-maifold based o the Euclidea distace (2-Norm) that the system is from the origi provides for optimal system respose. This is true sice this slidig-maifold follows the same trajectory as the desired respose. The 2-orm is defied as x 2 = x i 2 (3.54) i=1

52 43 Ufortuately, implemetatio of a cotrol based upo the 2-orm requires squarig fuctios which ca be difficult to realize especially at high frequecies. However, it is possible to use other vector p-orms to approximate a 2-orm based slidig maifold. Utilizig o-elliptical slidig maifolds ca sigificatly decrease the cost of implemetig the SMC with miimal loss i overall performace. To illustrate the followig distace fuctio is defied based upo ay vector p-orm σ p = ρ o x p (3.55) Assume that for both oscillators discussed previously u is redefied as u = σ p (3.56) Aalysis of (3.9) ad (3.45) shows that whe sg(σ 2 ) = sg(σ p ) V < 0 (3.57) Thus V is mootoically decreasig ad a limit cycle exists. Thus, differet vector p-orms ca be implemeted for the SMC while still esurig periodic stability of the oscillator. 1. Slidig Maifold Based upo 1-Norm The 1-orm is a o-elliptical vector orm that is commoly used for mathematical systems. Fig. 14 shows the state-space view of the 1-orm for a -order system. The equatio used to calculate the vector 1-orm is give as x 1 = x i (3.58) i=1 A equivalece relatioship exists betwee the 2-orm ad the 1-orm as fol-

53 44 Fig Norm Based Slidig Maifold lows [17] x 2 x 1 x 2 (3.59) 1 x 1 x 2 x 1 Fig. 15 shows a state-space view of implemetig a slidig-maifold based o the 2-orm approximated usig the 1-orm. The ushaded regio i this figure shows the regios i state-space where sg(σ 1 ) = sg(σ 2 ). Withi the ushaded regios V is mootoically decreasig, thus, the shaded regios are attractive ad are the oly regios where a limit cycle ca exist. Fig. 15. Equivalece of Cotrol Laws Based o 1-Norm ad 2-Norm From (3.57) it is show that oce the system trajectory eters the shaded regio

54 45 i Fig. 15 it ever leaves that shaded regio. ( ρ o > 0)( T > 0) s.t. x(t) 2 <, t [0, T ] (3.60) x(t) 2 < ρ o, t T Thus oce the system is operatig withi this attractive regio it ca be assumed that x 2 ρ o, t > T (3.61) providig a boud for the maximum error betwee the distace fuctios x 1 x 2 ( 1)ρ o (3.62) We ote that implemetatio of this cotrol law does ot ecessarily mea that this is the magitude of chatterig to be expected. Notice from Fig. 15 that there are four istaces i the oscillatio period where each of these slidig-maifolds itersect with the 2-orm based slidig-maifold. Miimizig the switchig gai of the SMC miimizes the distace that the system trajectory ca stray from its harmoic orbit betwee each of these itersectios. Ufortuately, large switchig delays i the SMC ca actually icrease these distace errors beyod this maximum error as well. 2. Cotrol Law Based upo -Norm The -orm is a o-elliptical vector orm similar to that of the 1-orm. Fig. 16 shows the state-space view of the 1-orm for a -order system. The -orm is actually equivalet to the 1-orm rotated 45 about the origi. The -orm is defied as x = max( x 1, x 2,..., x ) (3.63)

55 46 Fig Norm Based Slidig Maifold The -orm also has a equivalece relatioship with the 2-orm [17]. x 2 x x 2 (3.64) 1 x x 2 x Fig. 17. Equivalece of Cotrol Laws Based o -Norm ad 2-Norm Fig. 17 shows a state-space view of the implemetatio of a slidig-maifold based o the 2-orm approximated by the -orm. The ushaded regio i this figure shows the regios i state-space where sg(σ ) = sg(σ 2 ). Withi the ushaded regios V is mootoically decreasig, thus, the shaded regios are attractive ad

56 47 are the oly regios where a limit cycle ca exist. From (3.57) it is show that oce the system trajectory eters the shaded regio i Fig. 17 it ever leaves that shaded regio. ( ρ o > 0)( T > 0) s.t. x(t) <, t [0, T ] (3.65) x(t) < ρ o, t T Thus oce the system is operatig withi this attractive regio it ca be assumed that x ρ o, t > T (3.66) providig a boud for the maximum error betwee the distace fuctios x x 2 ( 1)ρ o (3.67) As with the 1-orm this does ot ecessarily dictate what is expected i terms of chatterig. Miimizig the switchig gai of the SMC will help to reduce the amout of chatterig preset i the system. E. Chatterig Fig. 18. Chatterig about the Slidig Maifold Propagatio delays of the SMC causes the system to oscillate or chatter about

57 48 the slidig maifold. Fig. 18 shows a example i states-space of how switchig delays cause the system trajectory to oscillate or chatter about the slidig maifold. Chatterig becomes prevalet for large switchig gais ad/or large switchig delays. Chatterig is a importat cosideratio whe implemetig SMC of a VCO sice variatios of amplitude lead to variatios of frequecy through voltage-depedet device parasitics. The amplitude of voltage chatterig from the slidig-mode cotrol with fiite switchig delays ca be estimated usig the time domai solutio determied for the harmoic oscillator (2.6). This voltage chatter ca be estimated as V ε = e ατ d + 1 e ατ d (3.68) where τ d is the propagatio delay of the SMC ad α is the switchig gai of the SMC. This relatioship assumes that the VCO is biased to behave similar to a simple harmoic oscillator. This relatioship give by (3.68) does demostrate that miimizig the switchig gai of slidig-mode cotroller with fiite switchig delay miimizes the magitude of chatterig. If a harmoic oscillator ca be DC biased to so that it has a ceter at the origi this switchig gai ca be ifiitesimally small. Of course, o-idealities ad oise cause the characteristic eigevalues to vary slightly with time. For the SMC to be effective the switchig gai must be large eough to compesate for these stochastic variatios. Process ad temperature variatios must also be cosidered whe selectig the optimal switchig gai. Additioally, (2.8) shows that for LC based VCOs r p varies with the oscillatio frequecy. Either the DC compoet of the SMC must be desiged to vary with ω o to cacel r p or the switchig gai must be further icreased to assure a limit cycle will exist As metioed i Chapter II the output swig of a VCO is boud either by the

58 49 voltage rails or the curret sources. To miimize harmoic distortio appropriate selectio of curret biasig is ecessary to assure that the voltage swig ever grows large eough to force trasistors to become cutoff or saturated. Desig of this curret bias requires kowledge of the effective output resistace of the VCO for all operatig frequecies. Exploitatio of this physical boud i VCOs allows for the stability requiremets of the SMC to be relaxed. A charge pump ca be implemeted to itegrate the output of the SMC. This helps to further reduce chatterig of the VCO assumig that the curret swig is bouded. Fig. 19 compares the output of a SMC switchig from rail-to-rail implemeted with ad without a charge pump at the output. It is importat to realize that the charge pump is ot used to rigorously prove stabiliy, but to improve (empirically) the chatterig behavior preset i the SMC. The modified SMC with a charge pump is implemeted to provide a icremetal cotrol of the maximum curret swig of the VCO. (a) SMC w/o Charge Pump (b) SMC w/ Charge Pump Fig. 19. Example of Output Respose of Slidig-Mode Cotroller Assumig appropriate curret biasig this modified SMC allows for effective cotrol of the maximum voltage swig of the VCO ad thus cotrol of the oscillatio

59 50 amplitude. The advatage of the charge pump is that it provides a DC bias that automatically compesates for chages i the VCO impedace as it is varied to tue the oscillatio frequecy. Selectio of the charge pump capacitace ad curret sources results i a trade-off betwee the amplitude of the switchig gai ad the respose time of the SMC. Fig. 20 shows the system-level diagram of the proposed SMC. Fig. 20. VCO with Modified Slidig-Mode Amplitude Cotrol

60 51 CHAPTER IV LC OSCILLATOR REALIZATION A. Circuit Descriptio To verify its fuctioality the proposed slidig-mode amplitude cotrol is realized as a physical electrical circuit ( board-level ). The slidig maifold based o the -orm is chose to approximate the 2-orm sice full-wave rectifiers are ot ecessary for realizatio. A egative-g m LC oscillator capable of geeratig both i-phase ad quadrature (I/Q) sigals is selected for realizatio. There are several modulatio schemes which require a I/Q oscillator for proper operatio makig it desirable for multi-stadard commuicatios. x 1 = 1 x L 2 x 2 = 1 x C k sg(σ C )x 2 1 G C mcx 4 x 3 = 1 x L 4 (4.1) x 4 = 1 x C k sg(σ C )x G C mcx 2 We ote that the curret-mode states of the LC taks are ot directly observable. A estimator is ecessary to observe this state. x 1 = 1 x 2 + x 1 (0) (4.2) L This estimator is realizable but ca be expesive to implemet. Aother challege occurs whe implemetig the SMC sice the observed state x 1 must be trasformed to equivalet uits as x 2 so that the observed trajectory

61 52 follows a uit circle rather tha a ellipse. L z 1 = C x 1 (4.3) This trasformatio is ecessary for the orm based slidig-maifold implemeted i the slidig-mode cotrol to be accurate. This trasformatio ca be icluded i the desig of the estimator. z 1 = 1 LC x 2 + x 1 (0) = ω o x 2 + x 1 (0) (4.4) Notice that the resultig estimator is depedet o the oscillatio frequecy. This estimator must be tued with the LC tak to accurately observe x 1. Realizatio of this oscillator poses may challeges sice iaccuracies ca lead to errors i the slidig-mode cotrol. Thus, realizatio of this estimator is ot very practical i terms of cost. A commo alterative for geeratig quadrature siusoids is to couple multiple LC taks together. Although, this oscillator is a 4 th -order system whe the oscillator is operatig i steady-state it ca be assumed that states are i quadrature. Whe this is the case it is uecessary to observe all of the states to implemet the SMC. To simplify the realizatio of the system it is assumed that states that operate 180 out of phase ca be cosidered redudat i the calculatio of vector orms. Assumig the oscillator is operatig i steady state oly oe pair of orthogoal states is eeded to estimate x. Assumig x 2 = x 3 = x 1 = x 4 x 4 = x 1 = x 2 = x 3 The max( x 2, x 4 ) x (4.5)

62 53 Fig. 21. I/Q LC Oscillator Fig. 21 shows the system-level diagram of the proposed amplitude-cotrolled I/Q LC oscillator. The oscillator cosists of two egative-g m LC resoators coupled together i a feedback loop. Assumig the oscillators are matched the feedback etwork becomes ijectio locked ad the etire system oscillates at a oscillatio frequecy offset from the oscillatio frequecy of the idividual LC taks. We ote that this physical realizatio is iteded to demostrate the fuctioality of the slidig-mode cotrol. The oscillator realized is ot iteded for ay specific applicatio. The amplitude-cotrolled oscillator is realized o a protoboard usig discrete commercial compoets. The oscillatio frequecy is selected to be o the order of 10 MHz due to speed limitatios of DIP itegrated circuits (IC) ad the relatively large parasitics ecoutered with protoboard realizatios. 1. Oscillator Desig Fig. 22 shows the proposed topology for the I/Q LC egative-g m oscillator. Crosscoupled NMOS trasistors are used to provide the egative trascoductace ecessary to compesate for parasitics preset i the idividual LC taks. Trasco-

63 54 Fig. 22. Proposed Quadrature Negative-G m LC Oscillator ductace is cotrolled via source degeeratio by operatig NMOS trasistors i the triode regio. The overall trascoductace of the each VCO is iversely proportioal to resistace of these trasistors operatig i triode. G m (u) = g m 1 + g m R s (u) (4.6) The SMC cotrol is cofigured to provide cotrol of the amplitude of oscillatio via icremetal cotrol of the DC curret of each LC tak. While a DC curret bias exists for both VCOs the source degeeratio determies the amout of curret eterig the idividual LC taks at ay give time. Usig source degeeratio to cotrol the trascoductace is much less ivasive the varyig the curret bias of each resoator. Amplitude oise eterig the gates of triode trasistors is ot amplified as much as oise eterig active trasistors.

64 55 Additioally source degeeratio improves the liearity of the drivig trasistors at the cost of gai. Matched quad NMOS trasistor arrays (Aalog Liear Devices ALD1106 ) are used throughout the physical realizatio. Each matched array is used to match trasistors performig the same fuctio (curret source, source degeeratio, egative G m, oscillator couplig). The datasheet for these NMOS arrays provides the NMOS worst case gate capacitace C i = 3 pf. The total parasitic tak capacitace is estimated to be aroud 10 pf icludig parasitics from solder coectios ad wirig. From (2.8) it is apparet that maximizig the iductace of the LC tak miimizes power cosumptio of the oscillator. Usig this relatioship it is desired to select a varactor for realizatio that has a small C mi. To demostrate the effectiveess of this cotrol wide tuig rage varactors ( pf) are used to achieve a exceptioally large cotiuous tuig rage. Based o the tak capacitace rage the LC tak iductor is selected usig the time domai solutio defied i (2.11). Usig the relatioship for the oscillatio frequecy the tak iductace is selected to be 10 µh to geerate a 10 MHz ceter frequecy. 2. Slidig-Mode Cotroller As metioed previously the slidig maifold based o the -orm is to be implemeted for the slidig-mode cotroller. We ote that implemetatio of this slidigmode cotrol ca be performed without the use of rectifiers based o this relatioship sg( x ρ o ) sg(x 2 ρ o ) OR sg(ρ o x 2 ) OR sg(x 4 ρ o ) OR sg(ρ o x 4 ) (4.7)

65 56 The drawback of this cotrol law realizatio is the eed for additioal voltage comparators which ted to require large amouts of power for high speed operatio. Additioal power cosumptio is ot of major cocer sice fabricatio of this oscillator is iteded oly to verify the fuctioality of the proposed slidig-mode amplitude cotrol. Fig. 23. Proposed Slidig-Mode Amplitude Cotroller Fig. 23 shows the proposed topology for the -orm based slidig-mode cotroller. A voltage subtractor is implemeted to observe the sigle-eded voltage states while simultaeously providig a buffer for the LC taks. The voltage subtractors are implemeted usig wide badwidth (170 MHz) op-amps (Aalog Devices ALD8044ANZ ). To miimize chatterig of the SMC it is desired to miimize the propagatio delay of the cotrol loop. Additioally, the worst case propagatio delay of the SMC must be less tha the smallest oscillatio period expected from the oscillator.

66 57 Assumig that the largest oscillatio frequecy is 12.5 MHz the propagatio delay of the SMC should sigificatly less tha t p 80 s. Voltage comparators (Liear Techologies LT1016 ) with a worst case propagatio delay of t p 15 s are selected for implemetatio i the SMC. These comparators are accurate ad iterface directly to TTL/CMOS logic. These comparators are also power hugry cosumig 28 ma to 40 ma per comparator. Four of these voltage comparators are implemeted i the SMC. The output of the voltage comparators are OR ed together to establish the rectagular slidig-maifold. Based o Demorga s Law a four iput OR logic gate is realized usig two high-speed (t p < 15 s) CMOS NOR logic gates (Fairchild Semicoductor MM74HC02 ) ad oe high-speed (t p < 15 s) CMOS NAND logic gate (Fairchild Semicoductor MM74HC00 ). 3. Charge Pump A charge pump is implemeted at the output of the SMC to miimize chatterig of the SMC ad filter amplitude oise from eterig the oscillator. Fig. 24 shows the proposed topology for the charge pump. This topology is modified from the topology proposed i [23]. This charge pump is resistat clock-feedthrough implemetig varactors o the curret mirror gates ad bufferig the charge pump switches from the output. Matched trasistors arrays (Advaced Liear Devices NMOS: ALD1106, PMOS: ALD1107 ) are implemeted to physically realize the charge pump. To improve matchig betwee the curret mirrors resistors are implemeted i the braches that do ot cotai switchig trasistors. The resistor values are selected to match the typical ON -resistace of the switchig trasistors used i the mirrored brach. Selectio of the curret biases ad charge pump capacitor ormally depeds

67 58 Fig. 24. Proposed Charge Pump for LC Oscillator o the desired lock-time of the VCO implemeted i a PLL. Sice this oscillator is ot iteded to work i a PLL the capacitor is chose to be sigificatly large (C CP = 10 µf) to achieve miimal chatterig ad oise. B. Measuremet Results Fig. 25 shows a photograph of the physical realizatio of the slidig-mode amplitude cotrolled I/Q LC oscillator. The realizatio cosumes the majority of a 100 mm 160 mm protoboard. The majority of this area is cosumed by the matched trasistors arrays used to realize the charge pump ad the idividual egative-g m LC resoators. The Tektroix 1012 oscilloscope is used for time domai measuremets. The Hewlett Packard HP 4395A spectrum aalyzer is used for all frequecy spectrum measuremets. Fig 26 shows a photograph of the I/Q LC oscillator udergoig

68 59 Fig. 25. Protoboard Realizatio of Amplitude-Cotrolled I/Q LC Oscillator measuremet. The I/Q LC oscillator realized has a oscillatio frequecy spaig 5.8 MHz f o 9.4 MHz where the tuig rage is determied as T R = 23.7% The ceter frequecy of the oscillator is 7.6 MHz. We ote that the operatig frequecies measured are about 3 MHz less tha the iteded desig. This ca be attributed to the large parasitics ecoutered from the wires ad puch through coectios of the protoboard realizatio. Although matched trasistor arrays are utilized mis-match of the passive compoets ca be expected betwee the idividual LC oscillators. To compesate for this mis-match tuig of the curret bias is ecessary to achieve the desired phase shift of 90.

69 60 Fig. 26. Photograph of I/Q LC Oscillator (a) State-space Plot (b) Time Domai Plot Fig. 27. Output Respose of Amplitude Cotrolled LC Oscillator

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