LT MHz to 1100MHz High Linearity Direct Quadrature Modulator DESCRIPTION FEATURES APPLICATIONS TYPICAL APPLICATION

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1 FEATURES Direct Conversion from Baseband to High OIP: +.4dBm at 9MHz Low Output Noise Floor at MHz Offset: No : 8dBm/Hz P OUT = 4dBm:.7dBm/Hz Low Carrier Leakage: 4.7dBm at 9MHz High Image Rejection: 49dBc at 9MHz Channel CDMA ACPR: 7.4dBc at 9MHz Integrated LO Buffer and LO Quadrature Phase Generator Ω AC-Coupled Single-ended LO and Ports High Impedance Interface to Baseband Inputs with.v Common Mode Voltage 6-Lead QFN 4mm 4mm Package APPLICATIONS ID Single-Sideband Transmitters Infrastructure T X for Cellular and ISM Bands Image Reject Up-Converters for Cellular Bands Low-Noise Variable Phase-Shifter for 6MHz to MHz Local Oscillator Signals Microwave Links LT8 6MHz to MHz High Linearity Direct Quadrature Modulator DESCRIPTION The LT 8 is a direct I/Q modulator designed for high performance wireless applications, including wireless infrastructure. It allows direct modulation of an signal using differential baseband I and Q signals. It supports GSM, EDGE, CDMA, CDMA, and other systems. It may also be configured as an image reject upconverting mixer, by applying 9 phase-shifted signals to the I and Q inputs. The high impedance I/Q baseband inputs consist of voltage-to-current converters that in turn drive doublebalanced mixers. The outputs of these mixers are summed and applied to an on-chip transformer, which converts the differential mixer signals to a Ω single-ended output. The balanced I and Q baseband input ports are intended for DC coupling from a source with a common-mode voltage level of about.v. The LO path consists of an LO buffer with single-ended input, and precision quadrature generators which produce the LO drive for the mixers. The supply voltage range is 4.V to.v., LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. TYPICAL APPLICATION 6MHz to MHz Direct Conversion Transmitter Application IDAC QDAC EN BASEBAND GENERATOR 4 6 7, 4, 6, 9,,,, 7 V- I-CH Q-CH V- O 9 8, VCO/SYNTHESIZER BALUN LT8 8 TA V x nf = 6MHz TO MHz PA CDMA ACPR, AltCPR and Noise vs Output Power at 9MHz for and Carriers ACPR, ALTCPR (dbc) 6 7 DOWNLINK TEST MODEL 64 DPCH -CH ALTCPR -CH ACPR -CH ACPR 4 -CH NOISE 8 -CH ALTCPR -CH NOISE 9 6 OUTPUT POWER PER CARRIER (dbm) 8 TAb NOISE FLOOR AT MHz OFFSET (dbm/hz)

2 LT8 ABSOLUTE MAXIMUM RATINGS (Note ) Supply Voltage...V Common-Mode Level of BBPI, BBMI and BBPQ, BBMQ...V Voltage on any Pin Not to Exceed...mV to ( + mv) Operating Ambient Temperature (Note )... C to 8 C Storage Temperature Range... 6 C to C PACKAGE/ORDER INFORMATION EN LO 4 TOP VIEW BBMI BBPI VCC BBMQ BBPQ VCC 9 ORDER PART NUMBER LT8EUF UF PART MARKING 8 ELECTRICAL CHARACTERISTICS = V, EN = High, T A = C, f LO = 9MHz, f = 9MHz, P LO = dbm. BBPI, BBMI, BBPQ, BBMQ CM input voltage =.V DC, baseband input frequency = MHz, I and Q 9 shifted (upper sideband selection). P (OUT) = dbm, unless otherwise noted. (Note ) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Output () f Frequency Range db Bandwidth db Bandwidth 6 to 68 to 96 S, ON Output Return Loss EN = High (Note 6).8 db S, OFF Output Return Loss EN = Low (Note 6). db NFloor Output Noise Floor No Input Signal (Note 8) P = 4dBm (Note 9) P = 4dBm (Note ) UF PACKAGE 6-LEAD (4mm 4mm) PLASTIC QFN T JMAX = C, θ JA = 7 C/W EXPOSED PAD (PIN 7) IS, MUST BE SOLDERED TO PCB Order Options Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking: Consult LTC Marketing for parts specified with wider operating temperature ranges MHz MHz dbm/hz dbm/hz dbm/hz G P Conversion Power Gain P OUT /P IN,I&Q 9.7 db G V Conversion Voltage Gain Log (V OUT, Ω/V IN, DIFF, I or Q ). db P OUT Absolute Output Power V P-P DIFF CW Signal, I and Q. dbm G LO vs LO LO Conversion Gain Difference (Note 7) 6. db OPdB Output db Compression (Note 7) 7.8 dbm OIP Output nd Order Intercept (Notes, 4) 6 dbm OIP Output rd Order Intercept (Notes, ).4 dbm IR Image Rejection (Note 6) 49 dbc LOFT Carrier Leakage EN = High, P LO = dbm (Note 6) 4.7 dbm (LO Feedthrough) EN = Low, P LO = dbm (Note 6) 6 dbm EVM GSM Error Vector Magnitude P = dbm.6 % LO Input (LO) f LO LO Frequency Range 6 to MHz P LO LO Input Power dbm

3 ELECTRICAL CHARACTERISTICS = V, EN = High, T A = C, f LO = 9MHz, f = 9MHz, P LO = dbm. BBPI, BBMI, BBPQ, BBMQ CM input voltage =.V DC, baseband input frequency = MHz, I and Q 9 shifted (upper sideband selection). P (OUT) = dbm, unless otherwise noted. (Note ) LT8 SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS S, ON LO Input Return Loss EN = High (Note 6).6 db S, OFF LO Input Return Loss EN = Low (Note 6). db NF LO LO Input Referred Noise Figure (Note ) at 9MHz 4.6 db G LO LO to Small-Signal Gain (Note ) at 9MHz 6.4 db IIP LO LO Input rd Order Intercept (Note ) at 9MHz. dbm Baseband Inputs (BBPI, BBMI, BBPQ, BBMQ) BW BB Baseband Bandwidth db Bandwidth 4 MHz V CMBB DC Common-mode Voltage (Note 4). V R IN, DIFF Differential Input Resistance Between BBPI and BBMI (or BBPQ and BBMQ) kω R IN, CM Common Mode Input Resistance (Note ) Ω I CM, COMP Common Mode Compliance Current range (Notes 8, ) 8 to 44 μa P LO-BB Carrier Feedthrough on BB P OUT = (Note 4) 46 dbm IPdB Input db compression point Differential Peak-to-Peak (Notes 7, 9).4 V P-P,DIFF ΔG I/Q I/Q Absolute Gain Imbalance. db Δϕ I/Q I/Q Absolute Phase Imbalance. Deg Power Supply ( ) Supply Voltage 4.. V I CC(ON) Supply Current EN = High 8 ma I CC(OFF) Supply Current, Sleep mode EN = V. μa t ON Turn-On Time EN = Low to High (Note ). μs t OFF Turn-Off Time EN = High to Low (Note ). μs Enable (EN), Low = Off, High = On Enable Input High Voltage EN = High V Input High Current EN = V μa Shutdown Input Low Voltage EN = Low. V Note : Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note : Specifications over the C to 8 C temperature range are assured by design, characterization and correlation with statistical process controls. Note : Tests are performed as shown in the confi guration of Figure 7. Note 4: At each of the four baseband inputs BBPI, BBMI, BBPQ and BBMQ. Note : V BBPI - V BBMI = V DC, V BBPQ - V BBMQ = V DC. Note 6: Maximum value within db bandwidth. Note 7: An external coupling capacitor is used in the output line. Note 8: At MHz offset from the LO signal frequency. Note 9: At MHz offset from the CW signal frequency. Note : At MHz offset from the CW signal frequency. Note : power is within % of fi nal value. Note : power is at least db lower than in the ON state. Note : Baseband is driven by MHz and.mhz tones. Drive level is set in such a way that the two resulting tones are dbm each. Note 4: IM measured at LO frequency + 4.MHz Note : IM measured at LO frequency +.9MHz and LO frequency +.MHz. Note 6: Amplitude average of the characterization data set without image or LO feedthrough nulling (unadjusted). Note 7: The difference in conversion gain between the spurious signal at f = LO - BB versus the conversion gain at the desired signal at f = LO + BB for BB = MHz and LO = 9MHz. Note 8: Common mode current range where the common mode (CM) feedback loop biases the part properly. The common mode current is the sum of the current flowing into the BBPI (or BBPQ) pin and the current fl owing into the BBMI (or BBMQ) pin. Note 9: The input voltage corresponding to the output PdB. Note : BBPI and BBMI shorted together (or BBPQ and BBMQ shorted together).

4 LT8 TYPICAL PEORMANCE CHARACTERISTICS = V, EN = High, T A = C, f LO = 9MHz, f = 9MHz, P LO = dbm. BBPI, BBMI, BBPQ, BBMQ CM input voltage =.V DC, baseband input frequency = MHz, I and Q 9 shifted, without image or LO feedthrough nulling. f = f BB + f LO (upper side-band selection). P (OUT) = dbm ( dbm/tone for -tone measurements), unless otherwise noted. (Note ) Output Power vs LO Frequency at V P-P Differential Voltage Gain vs LO Frequency Supply Current vs Supply Voltage Baseband Drive 4 SUPPLY CURRENT (ma) C C C 4.7 SUPPLY VOLTAGE (V). OUTPUT POWER (dbm) V, C VOLTAGE GAIN (db) V, C G 8 G 8 G 6 4 Output IP vs LO Frequency f BB, = MHz f BB, =.MHz Output IP vs LO Frequency 7 fim = f BB, + f BB, + f LO f BB, = MHz 7 f BB, =.MHz 8 Output db Compression vs LO Frequency OIP (dbm) V, C OIP (dbm) V, C OPdB (dbm) 6 4 V, C G4 8 G 8 G6 LO FEEDTHROUGH (dbm) LO Feedthrough to Output vs LO Frequency V, C 4.. LO LEAKAGE (dbm) 4 LO Leakage to Output vs LO Frequency V, C 4.. LO LEAKAGE (dbm) LO Leakage to Output vs LO Frequency V, C LO FREQUENCY (GHz) LO FREQUENCY (GHz) G7 8 G8 8 G9

5 TYPICAL PEORMANCE CHARACTERISTICS Noise Floor vs Frequency IMAGE REJECTION (dbc) 4 Image Rejection vs LO Frequency V, C LT8 = V, EN = High, T A = C, f LO = 9MHz, f = 9MHz, P LO = dbm. BBPI, BBMI, BBPQ, BBMQ CM input voltage =.V DC, baseband input frequency = MHz, I and Q 9 shifted, without image or LO feedthrough nulling. f = f BB + f LO (upper side-band selection). P (OUT) = dbm ( dbm/tone for -tone measurements), unless otherwise noted. (Note ) NOISE FLOOR (dbm/hz) V, C f LO = 9MHz (FIXED) NO BASEBAND SIGNAL FREQUENCY (MHz) S (db) LO and Port Return Loss vs Frequency LO PORT, EN = LOW LO PORT, EN = HIGH, P LO = dbm FREQUENCY (MHz) PORT, EN = LOW PORT, EN = HIGH, P LO = dbm LO PORT, EN = HIGH, P LO = dbm PORT, EN = HIGH, NO LO 8 G4 8 G 8 G ABSOLUTE I/Q GAIN IMBALANCE (db).. Absolute I/Q Gain Imbalance vs LO Frequency V, C 4.. ABSOLUTE I/Q PHASE IMBALANCE (DEG) 4 Absolute I/Q Phase Imbalance vs LO Frequency V, C 4.. VOLTAGE GAIN (db) Voltage Gain vs LO Power LO INPUT POWER (dbm) V, C G 8 G 8 G Output IP vs LO Power LO Feedthrough vs LO Power Image Rejection vs LO Power 4 OIP (dbm) f BB, = MHz f BB, =.MHz V, C LO INPUT POWER (dbm) LO FEEDTHROUGH (dbm) LO INPUT POWER (dbm) V, C IMAGE REJECTION (dbc) 4 V, C LO INPUT POWER (dbm) G4 8 G 8 G6

6 LT8 TYPICAL PEORMANCE CHARACTERISTICS = V, EN = High, T A = C, f LO = 9MHz, f = 9MHz, P LO = dbm. BBPI, BBMI, BBPQ, BBMQ CM input voltage =.V DC, baseband input frequency = MHz, I and Q 9 shifted, without image or LO feedthrough nulling. f = f BB + f LO (upper side-band selection). P (OUT) = dbm ( dbm/tone for -tone measurements), unless otherwise noted. (Note ) HD, HD (dbc) CW Output Power, HD and HD vs CW Baseband Voltage and Temperature HD HD 6 C 7 C 8 C 8 4 I AND Q BASEBAND VOLTAGE (V P-P, DIFF ) 6 CW OUTPUT POWER (dbm) 8 G7 HD, HD (dbc) CW Output Power, HD and HD vs CW Baseband Voltage and Supply Voltage HD HD 4.V V.V 4 I AND Q BASEBAND VOLTAGE (V P-P, DIFF ) 6 CW OUTPUT POWER (dbm) 8 G8 LO FEEDTHROUGH (dbm) 4 LO Feedthrough to Output vs CW Baseband Voltage V, C I AND Q BASEBAND VOLTAGE (V P-P, DIFF ) HD = MAX POWER AT f LO + f BB OR f LO f BB HD = MAX POWER AT f LO + f BB OR f LO f BB HD = MAX POWER AT f LO + f BB OR f LO f BB HD = MAX POWER AT f LO + f BB OR f LO f BB 8 G9 IMAGE REJECTIOIN (dbc) 4 6 Image Rejection vs CW Baseband Voltage V, C I AND Q BASEBAND VOLTAGE (V P-P, DIFF ) 8 G P TONE (dbm) IM, IM, (dbc) Two-Tone Power (Each Tone), IM and IM vs Baseband Voltage and Temperature f BBI = MHz,.MHz, f BBQ = MHz,.MHz, 9 IM IM C C 8 C I AND Q BASEBAND VOLTAGE (V P-P, DIFF, EACH TONE ) 8 G IM = POWER AT f LO + 4.MHz IM = MAX POWER AT f LO +.9MHz OR f LO +.MHz P TONE (dbm) IM, IM, (dbc) Two-Tone Power (Each Tone), IM and IM vs Baseband Voltage and Supply Voltage f BBI = MHz,.MHz, f BBQ = MHz,.MHz, 9 IM IM 4.V V.V I AND Q BASEBAND VOLTAGE (V P-P, DIFF, EACH TONE ) 8 G IM = POWER AT f LO + 4.MHz IM = MAX POWER AT f LO +.9MHz OR f LO +.MHz 6

7 TYPICAL PEORMANCE CHARACTERISTICS LT8 = V, EN = High, T A = C, f LO = 9MHz, f = 9MHz, P LO = dbm. BBPI, BBMI, BBPQ, BBMQ CM input voltage =.V DC, baseband input frequency = MHz, I and Q 9 shifted, without image or LO feedthrough nulling. f = f BB + f LO (upper side-band selection). P (OUT) = dbm ( dbm/tone for -tone measurements), unless otherwise noted. (Note ) PERCENTAGE (%) Gain Distribution C C 8 C V BB = 4mV P-P PERCENTAGE (%) Noise Floor Distribution C C 8 C PERCENTAGE (%) 4 LO Leakage Distribution C C 8 C V BB = 4mV P-P GAIN (db) NOISE FLOOR (dbm/hz) LO LEAKAGE (dbm) 8 G6 8 G7 8 G8 PERCENTAGE (%) Image Rejection Distribution < 66 V BB = 4mV P-P C C 8 C IMAGE REJECTION (dbc) 8 G9 LO FEEDTHROUGH (dbm), IR (dbc) LO Feedthrough and Image Rejection vs Temperature After Calibration at C CALIBRATED WITH P = dbm f BBI = MHz, f BBQ = MHz, 9 + ϕ CAL LO FEEDTHROUGH 4 TEMPERATURE ( C) IMAGE REJECTION G PIN FUNCTIONS EN (Pin ): Enable Input. When the Enable pin voltage is higher than V, the IC is turned on. When the Enable voltage is less than.v or if the pin is disconnected, the IC is turned off. The voltage on the Enable pin should never exceed by more than.v, in order to avoid possible damage to the chip. (Pins, 4, 6, 9,,,, 7): Ground. Pins 6, 9, and the Exposed Pad, Pin 7, are connected to each other internally. Pins and 4 are connected to each other internally and function as the ground return for the LO signal. Pins and are connected to each other internally and function as the ground return for the on-chip balun. For best performance, Pins, 4, 6, 9,,, and the Exposed Pad, Pin 7, should be connected to the printed circuit board ground plane. 7

8 LT8 PIN FUNCTIONS LO (Pin ): LO Input. The LO input is an AC-coupled singleended input with approximately Ω input impedance at frequencies. Externally applied DC voltage should be within the range.v to ( +.V) in order to avoid turning on ESD protection diodes. BBPQ, BBMQ (Pins 7, ): Baseband Inputs for the Q-channel. The differential input impedance is kω. These pins are internally biased at about.v. Applied common mode voltage must stay below.v. (Pins 8, ): Power Supply. Pins 8 and are connected to each other internally. It is recommended to use.μf capacitors for decoupling to ground on each of these pins. (Pin ): Output. The output is an AC-coupled single-ended output with approximately Ω output impedance at frequencies. Externally applied DC voltage should be within the range.v to ( +.V) in order to avoid turning on ESD protection diodes. BBPI, BBMI (Pins 4, 6): Baseband Inputs for the I-channel. The differential input impedance is kω. These pins are internally biased at about.v. Applied common mode voltage must stay below.v. BLOCK DIAGRAM BBPI BBMI 4 6 V-I 8 LT8 9 BALUN BBPQ BBMQ 7 V-I EN LO 8 BD APPLICATIONS INFORMATION The LT8 consists of I and Q input differential voltageto-current converters, I and Q up-conversion mixers, an output signal combiner/balun, an LO quadrature phase generator and LO buffers. External I and Q baseband signals are applied to the differential baseband input pins, BBPI, BBMI, and BBPQ, BBMQ. These voltage signals are converted to currents and translated to frequency by means of double-balanced up-converting mixers. The mixer outputs are combined in an output balun, which also transforms the output impedance to Ω. The center frequency of the resulting signal is equal to the LO signal frequency. The LO input drives a phase shifter which splits the LO signal into in-phase and quadrature LO signals. These LO signals 8 are then applied to on-chip buffers which drive the upconversion mixers. Both the LO input and output are single-ended, Ω-matched and AC coupled. Baseband Interface The baseband inputs (BBPI, BBMI), (BBPQ, BBMQ) present a differential input impedance of about kω. At each of the four baseband inputs, a low-pass filter using Ω and.8pf to ground is incorporated (see Figure ), which limits the baseband db bandwidth to approximately MHz. The common-mode voltage is about.v and is slightly temperature dependent. At T A = -4 C, the common-mode voltage is about.8v and at T A = 8 C it is about.v.

9 LT8 APPLICATIONS INFORMATION = V BBPI BBMI.8P.8P C.k.k BALUN LOMI V REF =.V CM Figure. Simplifed Circuit Schematic of the LT8 (Only I-Half is Drawn) LT8 FROM Q If the I/Q signals are DC-coupled to the LT8, it is important that the applied common-mode voltage level of the I and Q inputs is about.v in order to properly bias the LT8. Some I/Q generators allow setting the common-mode voltage independently. In this case, the common-mode voltage of those generators must be set to.v to match the LT8 internal bias where the internal DC voltage of the signal generators is set to.v due to the source-load voltage division (See Figure ). The LT8 baseband inputs should be driven differentially, otherwise, the even-order distortion products will degrade the overall linearity severely. Typically, a DAC will be the signal source for the LT8. A pulse-shaping filter should be placed between the DAC outputs and the LT8 s baseband inputs. An AC-coupled baseband interface with the LT8 is drawn in Figure. Capacitors C to C4 will introduce a LOPI 8 F BB SOURCE C C EN 4 7 BBPI BBPQ.V DC.V DC LT8 C C C4 6 BBMI BBMQ.V DC.V DC LO, 4, 6, 9,,,, 7 8, 4.V TO.V OUT BB SOURCE 8 F Figure. AC-Coupled Baseband Interface low-frequency high-pass corner together with the LT8 s differential input impedance of kω. Usually, capacitors C to C4 will be chosen equal and in such a way that the db corner frequency f db = /(π R IN, DIFF C) is much lower than the lowest baseband frequency. DC coupling between the DAC outputs and the LT8 baseband inputs is recommended, because AC coupling will introduce a low-frequency time constant that may affect the signal integrity. Active level shifters may be required to adapt the common mode level of the DAC outputs to the common mode input voltage of the LT8. Such circuits may, however, suffer degraded LO leakage performance as small DC offsets and variations over temperature accumulate. A better scheme is shown in Figure 6, where feedback is used to track out these variations. LO Section The internal LO input amplifier performs single-ended to differential conversion of the LO input signal. Figure 4 shows the equivalent circuit schematic of the LO input. The internal, differential LO signal is split into in-phase and quadrature (9 phase shifted) signals that drive LO buffer sections. These buffers drive the double balanced I and Q mixers. The phase relationship between GENERATOR Ω. Ω GENERATOR Ω +.V DC.V DC.V DC LT8.kΩ +.V DC + LO INPUT pf Ω 8 F 8 F4 Figure. DC Voltage Levels for a Generator Programmed at.vdc for a Ω Load and the LT8 as a Load Figure 4. Equivalent Circuit Schematic of the LO Input 9

10 LT8 APPLICATIONS INFORMATION the LO input and the internal in-phase LO and quadrature LO signals is fi xed, and is independent of start-up conditions. The phase shifters are designed to deliver accurate quadrature signals for an LO frequency near 9MHz. For frequencies significantly below 7MHz or above.ghz, the quadrature accuracy will diminish, causing the image rejection to degrade. The LO pin input impedance is about Ω and the recommended LO input power window is dbm to + dbm. For P LO < dbm, the gain, OIP, OIP, dynamic-range (in dbc/hz) and image rejection will degrade, especially at T A = 8 C. Harmonics present on the LO signal can degrade the image rejection, because they introduce a small excess phase shift in the internal phase splitter. For the second (at.8ghz) and third harmonics (at.7ghz) at dbc level, the introduced signal at the image frequency is about 6dBc or lower, corresponding to an excess phase shift much less than degree. For the second and third harmonics at dbc, still the introduced signal at the image frequency is about dbc. Higher harmonics than the third will have less impact. The LO return loss typically will be better than db over the 7MHz to GHz range. Table shows the LO port input impedance vs. frequency. The return loss S on the LO port can be improved at lower frequencies by adding a shunt capacitor. Table. LO Port Input Impedance vs Frequency for EN = High and P LO = dbm FREQUENCY S (MHz) INPUT IMPEDANCE (Ω) MAG ANGLE. + j j j j j j j j The input impedance of the LO port is different if the part is in shutdown mode. The LO input impedance for EN = Low is given in Table. Table. LO Port Input Impedance vs Frequency for EN = Low and P LO = dbm FREQUENCY S (MHz) INPUT IMPEDANCE (Ω) MAG ANGLE 7. + j j j j j j j j Section After up-conversion, the outputs of the I and Q mixers are combined. An on-chip balun performs internal differential to single-ended output conversion, while transforming the output signal impedance to Ω. Table shows the port output impedance vs frequency. Table. Port Output Impedance vs Frequency for EN = High and P LO = dbm FREQUENCY (MHz) OUTPUT IMPEDANCE (Ω) S MAG ANGLE.8 + j j j j j j j j

11 LT8 APPLICATIONS INFORMATION The output S with no LO power applied is given in Table 4. Table 4. Port Output Impedance vs Frequency for EN = High and No LO Power Applied FREQUENCY S (MHz)( OUTPUT IMPEDANCE (Ω) MAG ANGLE.4 + j j j j j j j j.. 9. For EN = Low the S is given in Table. To improve S for lower frequencies, a series capacitor can be added to the output. At higher frequencies, a shunt inductor can improve the S. Figure shows the equivalent circuit schematic of the output. Table. Port Output Impedance vs Frequency for EN = Low FREQUENCY S (MHz) OUTPUT IMPEDANCE (Ω) MAG ANGLE.8 + j j j j j j j j... Ω pf 7nH pf 8 F OUTPUT Figure. Equivalent Circuit Schematic of the Output Note that an ESD diode is connected internally from the output to the ground. For strong output signal levels (higher than dbm), this ESD diode can degrade the linearity performance if an external Ω termination impedance is connected directly to ground. To prevent this, a coupling capacitor can be inserted in the output line. This is strongly recommended during db compression measurements. Enable Interface Figure 6 shows a simplified schematic of the EN pin interface. The voltage necessary to turn on the LT8 is V. To disable (shut down) the chip, the enable voltage must be below.v. If the EN pin is not connected, the chip is disabled. This EN = Low condition is guaranteed by the 7kΩ on-chip pull-down resistor. It is important that the voltage at the EN pin does not exceed by more than.v. If this should occur, the full-chip supply current could be sourced through the EN pin ESD protection diodes, which are not designed for this purpose. Damage to the chip may result. EN Evaluation Board 7k k 8 F6 Figure 6. EN Pin Interface Figure 7 shows the evaluation board schematic. A good ground connection is required for the LT8 s Exposed Pad. If this is not done properly, the performance will degrade. Additionally, the Exposed Pad provides heat sinking for the part and minimizes the possibility of the chip overheating. R (optional) limits the EN pin current in the event that the EN pin is pulled high while the inputs are low. The application board PCB layouts are shown in Figures 8 and 9.

12 LT8 APPLICATIONS INFORMATION BBIM J J BBIP EN BBQM LO IN J J4 R BBMI BBPI EN LO LT8 9 7 BBMQ BBPQ C nf J6 C nf J OUT BBQP BOARD NUMBER: DC7A 8 F7 Figure 9. Bottom Side of Evaluation Board Application Measurements The LT8 is recommended for base-station applications using various modulation formats. Figure shows a typical application. Figure shows the ACPR performance for CDMA using one and three channel modulation. Figures and illustrate the - and -channel CDMA measurement. To calculate ACPR, a correction is made for the spectrum analyzer noise floor (Application Note 99). Figure 7. Evaluation Circuit Schematic Figure 8. Component Side of Evaluation Board If the output power is high, the ACPR will be limited by the linearity performance of the part. If the output power is low, the ACPR will be limited by the noise performance of the part. In the middle, an optimum ACPR is obtained. Because of the LT8 s very high dynamic-range, the test equipment can limit the accuracy of the ACPR measurement. Consult Design Note 7 or the factory for advice on ACPR measurement if needed. The ACPR performance is sensitive to the amplitude mismatch of the BBIP and BBIM (or BBQP and BBQM) inputs. This is because a difference in AC current amplitude will give rise to a difference in amplitude between the even-order harmonic products generated in the internal V-I converter. As a result, they will not cancel out entirely. Therefore, it is important to keep the amplitudes at the BBIP and BBIM (or BBQP and BBQM) inputs as equal as possible. LO feedthrough and image rejection performance may be improved by means of a calibration procedure. LO feedthrough is minimized by adjusting the differential DC offset at the I and the Q baseband inputs. Image rejection can be improved by adjusting the gain and the phase difference between the I and the Q baseband inputs. The LO feedthrough and Image Rejection can also change as a function of the baseband drive level, as depicted in Figure 4.

13 APPLICATIONS INFORMATION LT8 BASEBAND GENERATOR I-DAC 4 6 V-I 8, LT8 V nf = 6MHz TO MHz Q-DAC EN 7 I-CHANNEL Q-CHANNEL V-I 9 BALUN PA, 4, 6, 9,,,, 7 VCO/SYNTHESIZER 8 F Figure. 6MHz to.ghz Direct Conversion Transmitter Application ACPR, ALTCPR (dbc) DOWNLINK TEST MODEL 64 DPCH -CH ALTCPR -CH ALTCPR -CH ACPR -CH ACPR -CH NOISE -CH NOISE 9 6 OUTPUT POWER PER CARRIER (dbm) 8 TAb 4 Figure. ACPR, ALTCPR and Noise for CDMA Modulation NOISE FLOOR AT MHz OFFSET (dbm/hz) POWER IN khz BW (dbm) DOWNLINK TEST MODEL 64 DPCH UNCORRECTED SPECTRUM SPECTRUM ANALYSER NOISE FLOOR CORRECTED SPECTRUM FREQUENCY (MHz) 8 F Figure. -Channel CDMA Spectrum POWER IN khz BW (dbm) UNCORRECTED SPECTRUM SPECTRUM ANALYSER NOISE FLOOR FREQUENCY (MHz) DOWNLINK TEST MODEL 64 DPCH CORRECTED SPECTRUM 8 F Figure. -Channel CDMA Spectrum Example: ID Application In Figure the interface between the LTC6 (U, U) and the LT8 is designed for ID applications. The LTC6 is a seventh-order, 6kHz, continuous-time, linear-phase, lowpass filter. The optimum output common-mode level of the LTC6 is about.v and the optimum input common-mode level of the LT8 is around.v and is temperature dependent. To adapt the common-mode level of the LTC6 to the LT8, a level shift network consisting of R to R6 and R to R6 is used. The output common-mode level of the LTC6 can be adjusted by overriding the internally generated voltage on pin of the LTC6.

14 LT8 APPLICATIONS INFORMATION P, LOFT (dbm), IR (dbc) C 8 C 8 C C C C C Figure 4. LO Feedthrough and Image Rejection vs Baseband Drive Voltage After Calibration at C The common-mode voltage on the LT8 is sampled using resistors R7, R8, R7 and R8 and shifted up to about.v using resistor R9. Op amp U4 compensates for the gain loss in the resistor networks and provides a low-ohmic drive to steer the common-mode input pins of U and U. Resistors R and R improve op amp P 4 I AND Q BASEBAND VOLTAGE (V P-P,DIFF ) IR LOFT 8 F4 = V EN = HIGH f LO = 9MHz, f BBI = MHz, f BBQ = MHz, 9 f = f BB + f LO P LO = dbm U4 s stability while driving the large supply decoupling capacitors C and C4. This corrected common-mode voltage is applied to the common-mode input pins of U and U (pins ). This results in a positive feedback loop for the common mode voltage with a loop gain of about -db. This technique ensures that the current compliance on the baseband input pins of the LT8 is not exceeded under supply voltage or temperature extremes, and internal diode voltage shifts or combinations of these. The core current of the LT8 is thus maintained at its designed level for optimum performance. The recommended common-mode voltage applied to the inputs of the LTC6 is about V. Resistor tolerances are recommended % accuracy or better. The total current consumption is about 6mA and the noise fl oor at MHz offset is 47dBm/Hz with.7dbm output power. For a V PP, DIFF baseband input swing, the output power at f LO + f BB is.6dbm and the third harmonic at f LO f BB is 48.6dBm. For a.6v PP, DIFF input, the output power at f LO + f BB is.8dbm and the third harmonic at f LO f BB is.dbm. = dbm MAX 4.V to.v R.k R4.k R 49Ω R.7k R6.7k R9 88.7k R.k 4 U4 + LT797 R6.7k R.7k R 49Ω C, C.µF BB SOURCE.V DC C.µF 4 U +IN +OUT IN OUT LTC6- V+ V SHDN V DC R 499Ω R 499Ω EN.V DC 4 7.V DC BBPI BBPQ R.k R7 49.9k R7 49.9k R.k U LT8 R4 R8 R8 R4.k 49.9k 49.9k.k.V DC 6 BBMI BBMQ LO.V DC, 4, 6, 9,,, 7 8, R 499Ω R 499Ω.V DC U +OUT +IN OUT IN LTC6- V+ SHDN V 4 BB SOURCE.V DC C4.µF 8 F6 Figure. Baseband Interface Schematic of the LTC6 with the LT8 for ID applications. 4

15 LT8 PACKAGE DESCRIPTION UF Package 6-Lead Plastic QFN (4mm 4mm) (Reference LTC DWG # -8-69).7 ±. 4. ±.. ±..9 ±. (4 SIDES) PACKAGE OUTLINE. ±..6 BSC RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS BOTTOM VIEW EXPOSED PAD 4. ±..7 ±. R =. (4 SIDES) TYP 6 PIN TOP MARK (NOTE 6). ±. (4-SIDES) PIN NOTCH R =. TYP OR. 4 CHAMFER. ±.. REF.. NOTE:. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO- VARIATION (WGGC). DRAWING NOT TO SCALE. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED.mm ON ANY SIDE. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN LOCATION ON THE TOP AND BOTTOM OF PACKAGE (UF6) QFN -4. ±..6 BSC Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.

16 LT8 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS Infrastructure LT High Linearity Upconverting Mixer Output to GHz, 7dBm IIP, Integrated LO Buffer LT DC to GHz High Signal Level Downconverting DC to GHz, 7dBm IIP, Integrated LO Buffer Mixer LT4 Ultralow Distortion, IF Amplifi er/adc Driver with 8MHz Bandwidth, 47dBm OIP at MHz,.dB to db Gain Control Range Digitally Controlled Gain LT.GHz to.ghz Direct Conversion Quadrature dbm IIP, Integrated LO Quadrature Generator Demodulator LT6.8GHz to.ghz Direct Conversion Quadrature.dBm IIP, Integrated LO Quadrature Generator Demodulator LT7 4MHz to 9MHz Quadrature Demodulator dbm IIP, Integrated LO Quadrature Generator LT8.GHz to.4ghz High Linearity Direct Quadrature Modulator.8dBm OIP at GHz, 8.dBm/Hz Noise Floor, Ω Single-Ended LO and Ports, 4-Ch W-CDMA ACPR = 64dBc at.4ghz LT9.7GHz to.4ghz High Linearity Upconverting Mixer 7.dBm IIP at GHz, Integrated Output Transformer with Ω Matching, Single-Ended LO and Ports Operation LT.GHz to.ghz High Linearity Upconverting Mixer.9dBm IIP at.9ghz, Integrated Output Transformer with Ω Matching, Single-Ended LO and Ports Operation LT MHz to 7MHz High Linearity Upconverting Mixer 4.dBm IIP at.9ghz, NF =.db,.v to.v Supply, Single-Ended LO Port Operation LT 6MHz to.7ghz High Signal Level Downconverting Mixer 4.V to.v Supply, dbm IIP at 9MHz, NF =.db, Ω Single-Ended and LO Ports LT4 Low Power, Low Distortion ADC Driver with Digitally Programmable Gain 4MHz Bandwidth, 4dBm OIP, 4.dB to 7dB Gain Control LT6 High Linearity, Low Power Downconverting Mixer V to.v Supply, 6.dBm IIP, khz to GHz, NF = db, I CC = 8mA, 6dBm LO- Leakage LT7 4MHz to.7ghz High Signal Level IIP =.dbm and NF =.db at 9MHz, 4.V to.v Supply, I CC = 78mA Downconverting Mixer LT8.GHz to.4ghz High Linearity Direct Quadrature Modulator.8dBm OIP at GHz, 9.dBm/Hz Noise Floor, Ω,.V DC Baseband Interface, 4-Ch W-CDMA ACPR = 66dBc at.4ghz LT68 7MHz to MHz High Linearity Direct Quadrature Modulator.9dBm OIP at 8MHz, 6.dBm/Hz Noise Floor, Ω,.V DC Baseband Interface, -Ch CDMA ACPR = 7.4dBc at 8MHz LT7.GHz to.ghz High Linearity Direct Quadrature Modulator.6dBm OIP at GHz, 8.6dBm/Hz Noise Floor, High-Ohmic.V DC Baseband Interface, 4-Ch W-CDMA ACPR = 67.7dBc at.4ghz Power Detectors LT4 8MHz to.7ghz Measuring Receiver 8dB Dynamic Range, Temperature Compensated,.7V to.v Supply LTC Power Detectors with >4dB Dynamic Range MHz to GHz, Temperature Compensated,.7V to 6V Supply LTC7 khz to MHz Power Detector khz to GHz, Temperature Compensated,.7V to 6V Supply LTC8 MHz to 7GHz Power Detector 44dB Dynamic Range, Temperature Compensated, SC7 Package LTC9 MHz to GHz Power Detector 6dB Dynamic Range, Low Power Consumption, SC7 Package LTC MHz to 7GHz Precision Power Detector Precision V OUT Offset Control, Shutdown, Adjustable Gain LTC MHz to 7GHz Precision Power Detector Precision V OUT Offset Control, Shutdown, Adjustable Offset LTC MHz to 7GHz Precision Power Detector Precision V OUT Offset Control, Adjustable Gain and Offset LT4 MHz to GHz Loq Power Detector with ±db Output Variation over Temperature, 8ns Response Time 6dB Dynamic Range LTC6 Precision 6MHz to 7GHz Detector with Fast Comparater ns Response Time, Comparator Reference Input, Latch Enable Input, 6dBm to +dbm Input Range LT7 Wide Dynamic Range Loq /IF Detector Low Frequency to 8MHz, 8dB Dynamic Range,.7V to.v Supply High Speed ADCs LTC- -Bit, 8Msps ADC Single.V Supply, 9mW Consumption, 67.dB SNR, 8dB SFDR, 77MHz Full Power BW LTC49 4-Bit, 8Msps ADC Single V Supply, mw Consumption, 7dB SNR, 9dB SFDR LTC 4-Bit, Msps ADC Single V Supply, 9mW Consumption, 7.4dB SNR, 88dB SFDR, 64MHz Full Power BW 6 LT 76 REV A PRINTED IN USA Linear Technology Corporation 6 McCarthy Blvd., Milpitas, CA (48) 4-9 FAX: (48) LINEAR TECHNOLOGY CORPORATION 6