Adigital-to-analog converter (DAC) employing a multibit

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1 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I: REGULAR PAPERS, VOL. 59, NO. 2, FEBRUARY High-Order Mismatch-Shaped Segmented Multibit 16 DACs With Arbitrary Unit Weights Nan Sun, Member, IEEE Abstract This paper reports a new segment-mismatch-shaping technique for multi-bit 16 DACs. Our technique allows an arbitrary weight of unit elements in each segment and a high ( 2) segment mismatch shaping order. In addition, our required number of unit elements does not increase as the segment-mismatch-shaping order increases. Simulations under various conditions prove the validity of our technique. Index Terms 16 DAC, data converter, mismatch shaping. I. INTRODUCTION Adigital-to-analog converter (DAC) employing a multibit modulator is more advantageous than its binary counterpart for two major reasons: 1) its theoretical signal-to-noise ratio can be much higher, because a more aggressive noise transfer function can be used and the quantization noise is also smaller; 2) it makes the design of the analog reconstruction filter easier, for the output waveform more closely resembles the desired signal than the pulse-width-modulation-like square-wave output of the binary modulator. However, different from the binary DAC that is intrinsically linear, the multibit DAC cannot guarantee linearity due to component mismatches. To overcome the mismatch problem, various mismatch-shaping techniques have been developed, such as [1] [21]. The key idea of these techniques is to insert an element selection logic (ESL) block between the modulator and a multibit unit-element DAC comprised of equally-weighted 1-b DACs (see Fig. 1 for an example of a 3-b mismatch-shaped DAC). The ESL block transforms the output of the modulator to a vector, each element of which assumes either 1 or 0 and controls one 1-bit DAC. The summation of has to be to maintain the intended output amplitude, but we have the freedom to choose which elements of are 1 or 0, and this freedom/redundancy is exploited by the ESL block to make each element of exhibit a shaped spectrum, which guarantees that conversion errors caused by mismatches between these 1-bit DACs are always shaped regardless of the magnitude and the distribution of the mismatches. These mismatch-shaping techniques work well in cases the number of bits of the DAC is small,but they are not suitable for DACs with a large number of Manuscript received June 23, 2011; accepted July 08, Date of current version January 27, This paper was recommended by Associate Editor S. Pavan. The author is with the Department of Electrical and Computer Engineering, University of Texas, Austin, TX USA ( nansun@mail.utexas.edu). Color versions of one or more of the figures in this paper are available online at Digital Object Identifier /TCSI Fig. 1. Mismatch-shaped multibit 16 DAC. bits. The reason is that since these techniques require the use of the unit-element DAC whose number of elements grows exponentially with the number of bits, the digital circuit complexity of the ESL block that controls these unit elements also has to grow exponentially, which results in unacceptable power and area cost. The key to reduce the complexity of the ESL block is to decrease the number of elements. To this end, one straightforward way is to divide the DAC into segments with different unit-element weights. For example, instead of using 63 equallyweighted 1-b DACs to implement a 6-b DAC, we can divide the DAC into two segments: the first segment contains a 3-b DAC comprised of seven 1-bit DACs with unit weight of 1 least significant bit (LSB), and the second segment contains another 3-b DAC comprised of seven 1-bit DACs with unit weight of 8 LSBs (see Fig. 2). We can apply the same mismatch shaping techniques of [1] [21] to shape the mismatches between 1-bit DACs within the same segment. In this way, we only need to implement two sub-esl blocks that control 7 elements each, and thus, the digital circuit complexity is reduced substantially /$ IEEE

2 296 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I: REGULAR PAPERS, VOL. 59, NO. 2, FEBRUARY 2012 Fig. 2. Two-segment multibit 16 DAC. compared to implementing a single ESL block that controls 63 elements. However, for this approach to work, we need to solve two problems. The first problem is that segmentation introduces another source of mismatch, that is, the mismatch between the elements across different segments (see Fig. 2). Using the prior example, the average weight of the elements in the second segment may not be exactly 8 times the average weight of the elements in the first segment due to process variation. This segment mismatch causes nonlinearity and cannot be shaped by the mismatch shaping techniques of [1] [21] that handle only the mismatch between elements within the same segment. Thus, we need to develop/apply other techniques that can shape the noise caused by the segment mismatch. The second problem is that segmentation reduces the redundancy in the ways of using the 1-bit DACs. For example, to output 28, if we use sixty-three 1-bit DACs, we have in total ways of choosing which 1-bit DACs to output 1 and which 1-bit DACs to output 0; however, if we use the 2-segment configuration of Fig. 2, we have to choose three 1-bit DACs with weight of 8 LSBs to output 1, and four 1-bit DACs with weight of 1 LSB to output 1, and thus, we have only ways of choosing how the 1-bit DACs are used. Although this substantially reduced redundancy is still adequate for the shaping of the mismatch within the same segment, it is insufficient for the shaping of the mismatch across different segments, which requires extra redundancy in choosing how many 1-bit DACs are used in each segment. This additional redundancy leads to two undesirable consequences: 1) since we need to arrange more 1-bit DACs in each segment, the total number of elements increases, leading to an increased hardware complexity for the ESL block; 2) these additional 1-bit DACs dissipate extra power, or from a different angle, if we maintain the same power consumption by shrinking the size of each 1-bit DAC, then the signal swing has to be reduced to maintain the redundancy. These disadvantages, thoroughly discussed in [22], are inevitable prices for the shaping of segment mismatches; however, they can be made small compared to the power and area saving brought by segmentation. Therefore, there is still considerable net gain for using segmentation. The key to the shaping of the segment mismatch is the design of the segmentation logic (SL) block (see Fig. 2). In order to shape the segment mismatch, the SL block has to ensure that both and are noise shaped. Researchers have developed multiple ways of designing the SL block to achieve this goal [22] [25]. The technique in [23] generates by requantizing through an additional modulator with a shorter-bit-width quantizer, and then produces by. The patent of [24] generalized [23] to higher segment mismatch shaping orders, more than two segments, and various unit element weights. The merit of the techniques in [23] and [24] is that they allow a high mismatch shaping order and an arbitrary unit element weight. Their drawback is that the required number of elements increases as the segment-mismatch-shaping order increases, because does not closely follow for a high-order modulator, which leads to an increased bit-width of and an increased number of elements in the first segment. The technique in [25] is developed from the tree-based element mismatch shaping techniques [10] [13]. It uses a special tree-structured decoder to produce and. The paper of [22] built upon [25] and proposed a systematic way of designing segmented multibit DACs. The relative advantage of [22] and [25] is that their number of elements does not increase as the order increases, but they cannot provide high-order shaping 1 and they limit the unit element weight in each segment to be power of 2. This paper presents a new segment mismatch-shaping technique, whose key feature is a specially-designed modular quantizer. Our technique circumvents the aforementioned drawbacks of existing approaches. Its number of elements does not increase as the segment mismatch shaping order increases, which cannot be achieved by [23] and [24], and it allows a high segment mismatch shaping order and an arbitrary unit element weight, which cannot be achieved by [22] and [25]. The paper is organized as follows. Section II presents the architecture of our segmented mismatch-shaped multibit DAC. Section III describes our first-, second-, and third-order segment-mismatch-shaping algorithms. Sections IV and V discuss the number of elements required and the signal swing reduction. Section VI shows the simulation results. We finally conclude in Section VII. II. ARCHITECTURE OF OUR MISMATCH-SHAPED SEGMENTED MULTIBIT DAC The architecture of our mismatch-shaped segmented multibit DAC is shown in Fig. 3. A multibit modulator converts the digital input to, which is then decomposed by a segmentation logic (SL) block into, 1 To the best knowledge of the author, people have not figured out a way to stabilize a high (> 2) order 16 modulator inside the tree-structured decoder, for it is very difficult to meet the tough requirement on the quantizer output while still maintaining stability.

3 SUN: HIGH-ORDER MISMATCH-SHAPED SEGMENTED MULTIBIT DACS WITH ARBITRARY UNIT WEIGHTS 297 Fig. 4. Generation of the first-order shaped v [n]. Using (1), (2), and the fact that the modular rule are all integers, we obtain for (3) which is the second rule that needs to satisfy. The main contribution of this paper is that we propose a new way of designing the SL block, so that its produced satisfy the aforementioned three requirements. The detailed design of the SL block is presented in the following section. III. OUR SEGMENT MISMATCH SHAPING ALGORITHM Fig. 3. Our mismatch-shaped segmented multibit 16 DAC. is the input to the th segment. There are in total segments, each of which is comprised of an element selection logic (ESL) block and a unit-element DAC. The summation of the outputs of all unit-element DACs goes through an analog reconstruction filter to produce the analog output. The shaping of the segment mismatch requires to have shaped spectra (see Appendix A for a detailed proof), which is achieved through the design of the SL block. Besides this requirement, there are two additional rules that need to satisfy. The first one is the number conservation rule, given by the following equation: is the weight of the unit element in the th segment. For brevity, we assume,, and, and thus, we can express as (1) (2) A. First-Order Segment-Mismatch Noise Shaping As discussed in Section II, the shaping of the segment mismatch requires to have shaped spectra. For simplicity of presentation, let us first consider the generation of a first-order shaped, which is shown in Fig. 4. The block diagram resembles a standard first-order modulator with a constant input of. The difference is that the configuration of Fig. 4 uses a specially designed modular quantizer (MQ), which is defined as the following: if if. For easier understanding of the MQ, we plot its operation in Fig. 5 for and. We define the MQ this way because we want to satisfy the modular rule which is a special case of (3) for and is given by (4) (5). The relationship between Since, it is easy to prove that is bounded and the feedback loop of Fig. 4 is stable. To analyze the spectral property of, we use a linear approximation for the modular quantizer shown in Fig. 6, is the quantization noise. It is easy to derive that (6) NTF (7)

4 298 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I: REGULAR PAPERS, VOL. 59, NO. 2, FEBRUARY 2012 Fig. 5. Modular quantizer output curves for (a) J =2and (b) J =3. Fig. 8. Complete architecture of the SL block and the generation of fv [n]g(i 2 [1;L]). The scheme for the generation of can be recursively used to generate. For example, once is generated, we perform the following operation: (8) Fig. 6. Linear model for analyzing the spectrum of v [n]. Then, we use another dashed box of Fig. 4, set its input to, and define a new modular quantizer (MQ) to be if if. (9) It is easy to prove that is also first-order noise shaped and satisfies (3). The complete architecture for the SL block and the generation of ( ) is shown in Fig. 8, each shaded box is a copy of the dashed box in Fig. 4. The recursive relationship between and is given by (10) Fig. 7. Spectrum of the first-order shaped v [n]. if if. (11) is the -transform of and the quantization noise transfer function NTF. The first term is at dc and only produces an offset in the analog output [see (42)]. Thus, it does not generate noise. The second term represents a first-order shaped noise. To see how well the linear approximation is, we test our scheme of Fig. 4 for and a sinusoidal input with an amplitude of db full scale and a frequency at about 1/128 of the sampling rate. Fig. 7 shows the spectrum of, whose 20-dB/dec asymptotic behavior clearly demonstrates the first-order noise shaping. Equation (11) ensures (12) which is a general form of (5). It is easy to prove that the generated satisfy both (1) and (3), and are first-order noise shaped. Thus, according to the sufficient and necessary condition derived in Appendix A, this way of designing the SL block ensures that the segment mismatches are first-order shaped.

5 SUN: HIGH-ORDER MISMATCH-SHAPED SEGMENTED MULTIBIT DACS WITH ARBITRARY UNIT WEIGHTS 299 Fig. 9. Generation of the second-order shaped v [n]. Fig. 11. Spectra of second-order shaped v [n] for various a. Fig. 10. maxfyg for various a. B. Second-Order Segment-Mismatch Noise Shaping Our scheme can be readily generalized to the second-order segment-mismatch noise shaping. The block diagram for the generation of a second-order shaped is shown in Fig. 9, which resembles a standard second-order modulator. The modular quantization scheme for the second-order noise shaping is the same as that for the first-order case given by (4). Using a linear approximation, we derive NTF (13) used to generate other second-order shaped. The overall architecture of the SL block for the second-order segment mismatch noise shaping is identical to that of the firstorder segment mismatch noise shaping of Fig. 8, except that all shaded boxes need to be changed to Fig. 9. It is easy to prove that the generated are all second-order shaped and satisfy both (1) and (3). C. Third-Order Segment-Mismatch Noise Shaping Our block diagram for the generation of a third-order shaped is shown in Fig. 12. Again the modular quantization scheme is the same as that for the first-order noise shaping given by (4). It is easy to derive that NTF (15) NTF is given by NTF NTF (14) which shows that the quantization noise is second-order shaped. As in the standard second-order modulator, the feedback loop of Fig. 9 is not guaranteed stable. To enhance its stability and reduce the swing of, we add the feed-forward path with gain of (Fig. 9, top). For example, we simulate our algorithm of Fig. 9 for and a sinusoidal input. The result of Fig. 10 shows that a larger results in a smaller, and hence, a better stability. The reason is that NTF decreases as increases [26]. The disadvantage for having a larger is that NTF is less aggressive, leading to an increased in-band quantization noise in. The spectra of for various are plotted in Fig. 11, which clearly shows that the quantization noise rises as increases. To balance the trade-off between stability and noise reduction, we choose for our second-order segment-mismatch-shaping scheme of Fig. 9. As in the first-order noise shaping, our scheme for the generation of second-order shaped [Fig. 9] can be recursively (16) The two feed-forward paths with gains of and (Fig. 12) are added to enhance the stability. Fig. 13 shows the simulated as a function of and for and a sinusoidal input. We see that when and are small,, which indicates that the feedback loop is unstable. As and increase, decreases, demonstrating an improved stability. The reduction in saturates for and. Fig. 14 shows the spectra of for three combinations of and. The spectrum for is not shaped due to the instability of the feedback loop. Since the NTF for is less aggressive, its quantization noise at the lowfrequency end is slightly larger than that for. However, given that the stability for is better, we still choose for our scheme of Fig. 12. We also prefer and to be power of 2 because then the multiplication by and can be easily implemented through bit aligning. The overall architecture of the SL block for our third-order segment mismatch noise shaping is once again identical to that

6 300 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I: REGULAR PAPERS, VOL. 59, NO. 2, FEBRUARY 2012 Fig. 12. Generation of the third-order shaped v [n]. IV. NUMBER OF ELEMENTS A. Minimum Number of Elements Required This subsection calculates the number of elements required by our algorithm given the number of quantization levels and the number of segments. By definition, we have (17) is the number of unit elements in the th unit element DAC. Let us first calculate the lower bound for. Since takes value in [see (11)] and, we derive from (28) that for (18) Fig = maxfsg for various a and b. To calculate the lower bound for, we need to know the span of. It is easy to derive from (28) and that. In order to ensure that the produced using our algorithm of Section III are always nonnegative, we need to put a lower limit on (19) Equation (19) is a sufficient and necessary condition for (see Appendix B for proof). Therefore, in order to have quantization levels, needs to span, from which we derive (20) represents the nearest integer less than or equal to. Plugging (18) and (20) into (17), we obtain Fig. 14. Third-order shaped v [n] spectra for various a. (21) of the first-order segment mismatch noise shaping of Fig. 8, except that all shaded boxes are changed to Fig. 12. Our scheme can be generalized to even higher order segment mismatch shaping, but we omit it to keep the paper concise. Since both and are determined by [see (19)], (21) only depends on. Thus, the minimization of boils down to the selection of an optimum set of, so that the right-hand side of (21) is

7 SUN: HIGH-ORDER MISMATCH-SHAPED SEGMENTED MULTIBIT DACS WITH ARBITRARY UNIT WEIGHTS 301 Fig. 16. N versus segment mismatch shaping order for (a) our technique and (b) the technique of [23] assuming L =2. Fig. 15. N versus M and L. minimized. This is a well-defined optimization problem, whose solution can be iteratively obtained from (22) represents the nearest integer to. Thus, the minimum number of element is given by (23) (24) (25) We plot as a function of and in Fig. 15, which shows that reduces substantially as increases. For example, without segmentation, a 10-b 1024-level DAC requires 1023 elements; however, by segmenting the DAC into 5 segments, only 32 elements are sufficient to produce the 1024 levels, while still guarantee that the noise caused by segment mismatches is shaped. This example demonstrates the effectiveness of segmentation in reducing the total number of elements. B. Comparison to the Technique of [23] The advantage of our technique in comparison to [23] is that our minimum number of elements is the same for any segmentmismatch shaping order [Fig. 16(a)], while that for [23] grows as the segment-mismatch shaping order increases [Fig. 16(b)]. The reason that our number of elements does not increase is that is limited to by the modular quantizer [see (4)]. For the first-order segment mismatch shaping, for [23] is the same as ours; however, for the third-order shaping, for [23] is more than two times larger than ours. Therefore, our technique is more suitable for higher order segment mismatch shaping than the technique of [23]. V. SIGNAL SWING RESTRICTION As discussed in Section I and [22], any segment mismatch shaping technique restricts the signal swing to provide sufficient redundancy so that the errors resulting from segment mismatches are shaped. For our technique, the full input signal range is, is given by: 2 (26) However, as analyzed in Section IV, to ensure the working of our mismatch shaping technique and, the input is restricted to, which leads to the signal-to-noise ratio (SNR) reduction if not compensated by dissipating more power to reduce circuit noise. Therefore, there exists an SNR or power cost for using segmentation to reduce the number of elements and hardware complexity. To see how signal swing reduction changes with the number of segments, we plot the normalized available input range, defined as, versus in Fig. 17, assuming we use the minimum-number-of-element segmentation strategy of Section IV. Fig. 17 clearly shows that as the DAC is segmented into more levels, the normalized signal swing decreases. In addition, the reduction in the number of elements saturates for large (see Fig. 15). As a result, to balance the tradeoff between the number of elements and the signal range, we may prefer a small (2, 3, or 4) to a large. VI. SIMULATIONS We have verified our segment mismatch noise shaping technique under various conditions. This section presents one example of applying our technique to a 7-bit 128-level third-order DAC with an over-sampling ratio (OSR) of 64. We segment the DAC into 3 segments using the minimum-number-ofelement strategy described in Section IV. The corresponding unit-element weight and number of elements for each segment are summarized in Table I. The input to the DAC is a sinusoidal wave whose amplitude is assumed to be db 2 v corresponds to the situation all elements in the DAC are used.

8 302 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I: REGULAR PAPERS, VOL. 59, NO. 2, FEBRUARY 2012 TABLE II SNR AND BEHAVIOR Fig. 17. Normalized available signal range versus L. TABLE I VALUES OF K AND M (i 2 [1; 3]) each segment are shaped, if the mismatches across different segments are not shaped, the overall output spectrum is not shaped. In this example, the overall mismatch shaping order is determined by the segment mismatch shaping order because the mismatches within each segment have been shaped to the third order (see the end of Appendix A for further explanation). VII. CONCLUSION This paper reported a new segment mismatch shaping technique that allows an arbitrary unit element weight and a high segment-mismatch-shaping order. Another merit of this technique is that the required number of elements does not increase as the segment-mismatch-shaping order increases. With this technique, we vision that new multibit DACs with better linearity and less hardware complexity can be developed in the future. APPENDIX A In this appendix, we derive a sufficient and necessary condition for the shaping of mismatches in our segmented multibit DAC. Note that similar calculations have been done in [22]. We provide the following derivation, for it is best tailored for our segmented multibit DACs. As shown in Fig. 3, the -th element selection logic (ESL) block decodes into a vector (27) Fig. 18. Output spectra for various segment mismatch shaping orders. full scale (dbfs). Both the mismatches between unit elements within each segment and the mismatches across different segments are assumed to follow Gaussian distribution, with standard deviations of 0.3%, 0.6%, and 1.2% LSB for the first, second, and third segment, respectively. We apply the thirdorder mismatch shaping technique of [21] to shape the mismatch between unit elements within each segment. We use our segment mismatch shaping technique proposed in this paper to shape the mismatches across different segments. Fig. 18 shows the output spectra of the DAC without segment mismatch shaping and with our first-order, second-order, and third-order segment mismatch shaping. Their corresponding SNRs and behaviors are summarized in Table II. Even though the mismatches between unit elements within is the total number of unit elements in the -th unit element DAC. Each takes value of either 1 or 0, and controls the th 1-bit DAC in the th unit-element DAC (see Fig. 19). The ESL block ensures (28) which is the number conservation rule for. As seen from Fig. 19, the output of the th unit-element DAC is given by (29) is the analog output of the th 1-bit DAC in the th unit-element DAC, and corresponds to during

9 SUN: HIGH-ORDER MISMATCH-SHAPED SEGMENTED MULTIBIT DACS WITH ARBITRARY UNIT WEIGHTS 303 (38) (39) Fig. 19. Unit-element DAC model. the th sample period and is nonzero only when. The relationship between and is given by We use to denote the error pulses caused by mismatches across different segments, and use to denote the average of. Mathematically speaking (40) (41) if if. (30) and are the error pulses that reflect the mismatches between different 1-bit DACs within the th segment, and is the average output pulse of all 1-bit DACs in the -th segment, defined as Using (1), (37), and (40), we obtain the complete expression for the output of the entire segmented DAC before the reconstruction filter, (42) Plugging (30) in (31), we obtain (31) (43) (44) The two cases in (30) can be combined into one expression The ESL blocks ensure that each into (32) (33) (34) (35) can be decomposed (36) is a noise term uncorrelated with. By plugging (32), (33), and (36) into (29), we obtain (37) (45) Among the four terms on the right hand side of (42), the first term is the signal that is linear with, the second term [ of (43)] is the offset, the third term [ of (44)] is the summation of errors caused by the unit-element mismatches within each segment, and the 4th term [ of (45)] is the summation of errors caused by the mismatches across different segments. It is easy to derive from (42) that the sufficient and necessary condition for to be noise-shaped is: 1) is noise-shaped, which is made possible by the ESL block (see Fig. 3). Researchers have developed various ways of designing the ESL block to achieve this goal, such as [1] [21]. 2) is noise-shaped regardless of and, which essentially requires the SL block (see Fig. 3) to be specially designed so that have shaped spectra. Researchers have developed several ways of designing the SL block [22] [25]. Our contribution is a new design technique presented in Section III. Equation (42) also shows that because the total mismatch error is the summation of and, the overall mismatch-shaping

10 304 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I: REGULAR PAPERS, VOL. 59, NO. 2, FEBRUARY 2012 order for is set by the lower mismatch-shaping order between and. For example, if is shaped to the third order, the overall mismatch-shaping order will be equal to the shaping order of, as long as the shaping order of is less than or equal to 3 (see Section VI for an example). APPENDIX B We prove that (19) is a sufficient and necessary condition for for by induction. First, we prove this statement for. When, the statement becomes: is a necessary and sufficient condition for [ is by definition of (7)]. From (13), is equivalent to. From (7), it is trivial to show that is both necessary and sufficient for. Now we assume that the statement is true for, that is, is necessary and sufficient for for. We want to prove that is also necessary and sufficient for. Since ensures, it is trivial to prove from (11) that ensures, which is both necessary and sufficient for according to (10). Therefore, by induction, the statement is true for any. ACKNOWLEDGMENT The author would like to thank the anonymous reviewers for their valuable comments, Dr. Bo Zhang of Broadcom Inc. for discussions, and Dr. Richard Schreier of Analog Devices Inc. for discussions and sharing the toolbox. REFERENCES [1] B. H. Leung and S. Sutarja, Multibit sigma-delta A/D converter incorporating a novel class of dynamic element matching techniques, IEEE Trans. Circuits Syst., vol. 39, pp , Jan [2] H. S. Jackson, Circuit and Method for Cancelling Nonlinearity Error Associated With Component Value Mismatches in a Data Converter, U.S , Jun. 22, [3] R. W. Adams and T. W. Kwan, Data-Directed Scrambler for Multi-Bit Noise shaping D/A Converters, U.S. Patent , Apr. 4, [4] R. T. Baird and T. S. Fiez, Linearity enhancement of multi-bit 61 A/D and D/A converters using data weighted averaging, IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 42, no. 12, pp , Dec [5] K. D. Chen and T. H. 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Galton, Segmented dynamic element matching for high-resolution digital-to-analog conversion, IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 55, no. 11, pp , Dec [23] R. Adams, K. Q. Nguyen, and K. Sweetland, A 113-dB SNR oversampling DAC with segmented noise-shaped scrambling, IEEE J. Solid- State Circuits, vol. 33, no. 12, pp , Dec [24] R. Adams, Digital-to-Analog Converter Using Noise-Shaped Segmentation, U.S , Nov. 2, [25] A. Fishov, E. Siragusa, J. Welz, E. Fogleman, and I. Galton, Segmented mismatch-shaping D/A conversion, in Proc. IEEE Int. Symp. Circuits Syst., Aug. 2002, vol. 4, pp [26] R. Schreier, An empirical study of high-order single-bit delta-sigma modulators, IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 40, no. 8, pp , Aug Nan Sun (S 06 M 11) is an Assistant Professor in the Department of Electrical and Computer Engineering at the University of Texas at Austin. He received the B.S. degree in electronic science and technology from Tsinghua University, Beijing, China in 2006, he ranked top in the Department of Electronic Engineering and graduated with the highest honor and the Outstanding Undergraduate Thesis Award. He earned the Ph.D. degree in engineering science from the School of Engineering and Applied Sciences at Harvard University in Dr. Sun received the 1st-class Outstanding Student Award from Tsinghua University each year from 2003 to He won the Top Prize in the Intercollegiate Physics Competition in He is the recipient of Samsung Fellowship, Hewlett Packard Fellowship, and Analog Devices Outstanding Student Designer Award in 2003, 2006, and 2007, respectively. He also won the Harvard Teaching Award in three consecutive years: 2008, 2009, and His research interests include: 1) developing micro- and nano-scale solid-state platforms (silicon ICs and beyond) to analyze biological systems for biotechnology and medicine; 2) low-cost medical imaging systems; 3) miniature spin resonance systems; 4) analog, mixed-signal, and RF integrated circuits.