Understanding Delta-Sigma Data Converters
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1 Understanding Delta-Sigma Data Converters Richard Schreier Analog Devices, Inc. Gabor C. Temes Oregon State University OlEEE IEEE Press iwiley- INTERSCIENCE A JOHN WILEY & SONS, INC., PUBLICATION
2 Foreword xi References xii CHAPTER 1 Introduction The Need for Oversampling Converters Delta and Delta-Sigma Modulation Higher-Order Single-Stage Noise-Shaping Modulators 1.4 Multi-Stage (Cascade, MASH) Modulators Bandpass AZ Modulators AZ Modulators with Multi-Bit Quantizers Delta-Sigma Digital-to-Analog Converters History; Performance and Architecture Trends 17 CHAPTER 2 The First-Order Delta Sigma Modulator Quantizers and Quantization Noise 21 2.].] Binary Quantization 28
3 2.2 MODI as an ADC MODI as a DAC MODI Linear Model Simulation of MODI MODI under DC Excitation Idle Tone Generation Graphical Visualization Stability of MODI The Effects of Finite Op-Amp Gain Linear Systems Perspective- Degraded Noise Shaping Nonlinear Systems Perspective- Dead Zones Decimation Filters for MOD The Sine Filter [9] The Sine 2 Filter Conclusions 60 CHAPTER 3 The Second-Order Delta-Sigma Modulator The Second-Order Modulator: MOD Simulation of MOD Nonlinear Effects in MOD Signal-dependent quantizer gain Stability ofmod Dead-band behavior Alternative Second-Order Modulator Structures The Boser- Wooley Modulator The Silva-Steensgaard Structure The Error-Feedback Structure Generalized Second-Order Structures Optimal Second-Order Modulator Decimation Filtering for Second-Order A Modulators Conclusions 89 CHAPTER 4 Higher-Order Delta-Sigma Modulation High-Order Single-Quantizer Modulators Stability Considerations in High-Order Modulators 97 VI
4 4.2.1 Single-Bit Modulators Multi-Bit Modulators [12] 104 A3 Optimization of the NTF Zeros and Poles NTF Zero Optimization NTF Pole Optimization HI 4.4 Loop Filter Architectures Loop Filters with Distributed Feedback and Input Coupling- The CIFB and CRFB Structures Loop Filters with Distributed Feedforward and Input Coupling- The CIFF and CRFF Structures Multi-Stage Modulators The Leslie-Singh (L-0 Cascade) Structure [16] Cascade (MASH) Modulators Noise Leakage in Cascade Modulators Conclusions 136 CHAPTER 5 Bandpass and Quadrature Delta-Sigma Modulation The Need for Bandpass and Quadrature Modulation 5.2 Bandpass NTF Selection Pseudo N-path transformation Architectures for Bandpass Delta-Sigma Modulators Topology Choices Resonator Implementations Bandpass Modulator Example Quadrature Signals Quadrature Modulation Conclusions CHAPTER 6 Implementation Considerations For AE ADCs 6.1 Modulators with Multi-Bit Internal Quantizers Dual-Quantizer Modulators Dual-Quantization MASH Structure Dual-Quantization Single-Stage Structure Dynamic Element Randomization vii
5 6.4 Mismatch Error Shaping Element Rotation or Data-Weighted Averaging Individual Level Averaging Vector-Based Mismatch Shaping Element Selection Using a Tree Structure Digital Correction of DAC Nonlinearity Digitally-Corrected Multi-Bit AS Modulator with Power-Up Calibration Digitally-Corrected Multi-Bit AS ADC with Background Calibration Continuous-Time Implementations A Continuous-Time Implementation ofmod Inherent Anti-Aliasing in CT AS ADCs Design Issues for Continuous-Time Modulators Conclusions 216 CHAPTER 7 Delta-Sigma DACs System Architectures for AS DACs Loop configurations for AE DACs Single-Stage Delta-Sigma Loops The Error Feedback Structure Cascade (MASH) Structures AL DACs Using Multi-Bit Internal DACs Dual-Truncation DAC Structures Multi-bit Delta-Sigma DACs with Mismatch Error Shaping Digital Correction of Multi-Bit Delta-Sigma DACs Comparison of Single-Bit and Multi-Bit AS DACs Interpolation Filtering for AZ DACs Analog Post-Filters for AS DACs Analog Post-Filtering in Single-Bit AS DACs Analog Post-Filtering in Multi-Bit AS DACs Conclusions CHAPTER 8 High-Level Design and Simulation NTF Synthesis How synthesizentf works 260 V11I
6 8.1.2 Limitations o/synthesizentf NTF Simulation, SQNR Calculation and Spectral Estimation NTF Realization and Dynamic Range Scaling The ABCD Matrix Creating a SPICE-Simulatable Schematic Voltage Scaling Tuning kt/c Noise Conclusions 281 CHAPTER 9 Example Modulator Systems SCMOD2: General-Purpose Second-Order Switched-Capacitor ADC System Design Timing Scaling Verification Capacitor Sizing Circuit Design SCMOD5: A Fifth-Order Single-Bit Noise-Shaping Loop NTF and Architecture Selection Implementation Instability and Reset A Wideband 2-0 Cascade System Architecture Implementation A Micropower Continuous-Time ADC High-Level Design Circuit Design A Continuous-Time Bandpass ADC Architecture/Analysis Subcircuits Audio DAC Modulator Design Interpolation Filter Design DAC and Reconstruction Filter Design Conclusions The ADC State-of-the-Art 357 IX
7 9.7.2 FOM Justification References 362 APPENDIX A Spectral Estimation 365 A. 1 Windowing 366 A.2 Scaling and Noise Bandwidth 373 A.3 Averaging 377 A.4 An Example 379 A.5 Mathematical Background 383 APPENDIX B The Delta-Sigma Toolbox 389 Demonstrations and Examples 390 Summary of Key Functions 391 synthesizentf 393 predictsnr 395 simulatedsm 396 simulatesnr 398 realizentf 400 stuffabcd, mapabcd 401 scaleabcd 402 calculatetf 403 simulateesl 404 designhbf 405 simulatehbf 408 findpis 409 Modulator Model Details 410 APPENDIX C Noise in Switched-Capacitor Delta-Sigma Data Converters 417 C.I Noise Effects in CMOS Op Amps 419 C.2 Sampled Thermal Noise 423 C.3 Noise Effects in an SC Integrator 425 C.4 Integrator Noise Analysis Example 433 C.5 Noise Effects in Delta-Sigma ADC Loops 435
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