HSMP-382x, 482x. Data Sheet. Surface Mount RF PIN Switch and Limiter Diodes. Features

Transcription

1 HSMP-382x, 482x Surface Mount RF PIN Switch and Limiter iodes ata Sheet escription/applications The HSMP-382x series is optimized for switching applications where ultra-low resistance is required. The HSMP-482x diode is ideal for limiting and low inductance switching applications up to.5 GHz. A SPI model is not available for PIN diodes as SPI does not provide for a key PIN diode characteristic, carrier lifetime. Package Lead ode Identification, SOT-323 (Top View) UAL ANO Features iodes Optimized for: Low urrent Switching Low istortion Attenuating Power Limiting /ircuit Protection Surface Mount SOT-23 and SOT-323 Packages Single and ual Versions Tape and Reel Options Available Low Failure in Time (FIT) Rate [] Lead-free Option Available Note:. For more information see the Surface Mount PIN Reliability ata Sheet. HSMP-482B Package Lead ode Identification, SOT-23 (Top View) SINGL SRIS #0 OMMON ANO #2 OMMON ATHO #3 UAL ANO #4 HSMP-4820

2 2 Absolute Maximum Ratings [] T = +25 Symbol Parameter Unit SOT-23 SOT-323 I f Forward urrent ( µs Pulse) Amp P IV Peak Inverse Voltage V T j Junction Temperature T stg Storage Temperature -65 to to 50 θ jc Thermal Resistance [2] /W Notes:. Operation in excess of any one of these conditions may result in permanent damage to the device. 2. T = +25, where T is defined to be the temperature at the package pins where contact is made to the circuit board. lectrical Specifications T = 25 Package Minimum Maximum Maximum Part Number Marking Lead Breakdown Series Resistance Total apacitance HSMP- ode ode onfiguration Voltage V BR (V) R S (Ω) T (pf) 3820 F0 0 Single F2 2 Series 3823 F3 3 ommon Anode 3824 F4 4 ommon athode Test onditions V R = V BR f = 00 MHz f = MHz Measure I F = 0 ma V R = 20 V I R 0 µa High Frequency (Low Inductance, 500 MHz 3 GHz) PIN iodes Minimum Maximum Typical Maximum Typical Part Package Breakdown Series Total Total Total Number Marking Lead Voltage Resistance apacitance apacitance Inductance HSMP- ode ode onfiguration V BR (V) R S (Ω) T (pf) T (pf) L T (nh) 4820 FA A ual Anode B FA A ual Anode Test onditions V R = V BR I F = 0 ma f = MHz f = MHz f = 500 MHz Measure V R = 20 V V R = 0 V 3 GHz I R 0 µa Typical Parameters at T = 25 Part Number Series Resistance arrier Lifetime Reverse Recovery Time Total apacitance HSMP- R S (Ω) τ (ns) T rr (ns) T (pf) 382x V Test onditions f = 00 MHz I F = 0 ma V R = 0 V I F = 0 ma I F = 20 ma 90% Recovery

3 3 Typical Parameters at T = 25 (unless otherwise noted), Single iode I F FORWAR URRNT (ma) V F FORWAR VOLTAG (ma) Figure. Forward urrent vs. Forward Voltage. T rr RVRS ROVRY TIM (ns) 00 0 V R = 2V V R = 5V V R = 0V FORWAR URRNT (ma) Figure 2. Reverse Recovery Time vs. Forward urrent for Various Reverse Voltages. RF RSISTAN (OHMS) I F FORWAR URRNT (ma) Figure 3. RF Resistance at 25 vs. Forward Bias urrent. APAITAN (pf) V R RVRS VOLTAG (V) Figure 4. apacitance vs. Reverse Voltage. INPUT INTRPT POINT (dbm) iode Mounted as a Series Attenuator in a 50 Ohm Microstrip and Tested at 23 MHz I F FORWAR URRNT (ma) Figure 5. 2nd Harmonic Input Intercept Point vs. Forward Bias urrent. W POWR OUT (dbm) Measured with external bias return W POWR IN (dbm).5 GHz.0 GHz Figure 6. Large Signal Transfer urve of the HSMP-482x Limiter. 40 Typical Applications for Multiple iode Products RF OMMON RF OMMON RF RF 2 RF RF 2 2 Figure 7. Simple SPT Switch, Using Only Positive urrent. Figure 8. High Isolation SPT Switch, ual Bias.

4 4 Typical Applications for Multiple iode Products, continued RF OMMON RF OMMON RF RF 2 RF RF 2 Figure 9. Switch Using Both Positive and Negative Bias urrent. Figure 0. Very High Isolation SPT Switch, ual Bias. Figure. High Isolation SPST Switch (Repeat ells as Required. Figure 2. Power Limiter Using HSMP-3822 iode Pair. See Application Note 050 for details.

5 5 Typical Applications for HSMP- 482x Low Inductance Series Microstrip Series onnection for HSMP-482x Series In order to take full advantage of the low inductance of the HSMP-482x series when using them in series applications, both lead and lead 2 should be connected together, as shown in Figure HSMP-482x HSMP-482x Series In Figure 5, the center conductor of the microstrip line is interrupted and leads and 2 of the HSMP-482x diode are placed across the resulting gap. This forces the 0.5 nh lead inductance of leads and 2 to appear as part of a low pass filter, reducing the shunt parasitic inductance and increasing the maximum available attenuation. The 0.3 nh of shunt inductance external to the diode is created by the via holes, and is a good estimate for 0.032" thick material. 50 OHM MIROSTRIP LINS o-planar Waveguide Shunt onnection for HSMP-482x Series o-planar waveguide, with ground on the top side of the printed circuit board, is shown in Figure 7. Since it eliminates the need for via holes to ground, it offers lower shunt parasitic inductance and higher maximum attenuation when compared to a microstrip circuit. See AN050 for details. o-planar Waveguide Groundplane enter onductor Groundplane Figure 3. Internal onnections. Figure 7. ircuit Layout. Figure 4. ircuit Layout. Microstrip Shunt onnections for PA ONNT TO GROUN BY TWO VIA HOLS Figure 5. ircuit Layout, HSMP-482x Limiter..5 nh.5 nh 0.8 pf 0.75 nh Figure 8. quivalent ircuit. 0.8 pf 0.3 nh 0.3 nh Figure 6. quivalent ircuit.

6 6 Assembly Information SOT-323 PB Footprint A recommended PB pad layout for the miniature SOT-323 (S-70) package is shown in Figure 9 (dimensions are in inches). This layout provides ample allowance for package placement by automated assembly equipment without adding parasitics that could impair the performance imensions in inches Figure 9. Recommended PB Pad Layout for Avago s S70 3L/SOT-323 Products. SOT-23 PB Footprint SMT Assembly Reliable assembly of surface mount components is a complex process that involves many material, process, and equipment factors, including: method of heating (e.g., IR or vapor phase reflow, wave soldering, etc.) circuit board material, conductor thickness and pattern, type of solder alloy, and the thermal conductivity and thermal mass of components. omponents with a low mass, such as the SOT-323/-23 package, will reach solder reflow temperatures faster than those with a greater mass. Avago s diodes have been qualified to the time-temperature profile shown in Figure 2. This profile is representative of an IR reflow type of surface mount assembly process. After ramping up from room temperature, the circuit board with components attached to it (held in place with solder paste) passes through one or more preheat zones. The preheat zones increase the temperature of the board and components to prevent thermal shock and begin evaporating solvents from the solder paste. The reflow zone briefly elevates the temperature sufficiently to produce a reflow of the solder. The rates of change of temperature for the ramp-up and cooldown zones are chosen to be low enough to not cause deformation of the board or damage to components due to thermal shock. The maximum temperature in the reflow zone (TMAX) should not exceed 235. These parameters are typical for a surface mount assembly process for Avago diodes. As a general guideline, the circuit board and components should be exposed only to the minimum temperatures and times necessary to achieve a uniform reflow of solder T MAX imensions in inches mm Figure 20. Recommended PB Pad Layout for Avago s SOT-23 Products. TMPRATUR ( ) Preheat Zone Reflow Zone ool own Zone TIM (seconds) Figure 2. Surface Mount Assembly Profile.

7 7 Package imensions Outline SOT-323 (S-70) e Outline 23 (SOT-23) e2 e XXX e L XXX B e L A Notes: XXX-package marking rawings are not to scale A SYMBOL A A B e e L IMNSIONS (mm) MIN. MAX typical.30 typical typical A B Notes: XXX-package marking rawings are not to scale A SYMBOL A A B e e e2 L IMNSIONS (mm) MIN MAX Package haracteristics Lead Material... opper (SOT-323); Alloy 42 (SOT-23) Lead Finish... Tin-Lead 85-5% (Non lead-free option) or Tin 00% (Lead-free option) Maximum Soldering Temperature for 5 seconds Minimum Lead Strength... 2 pounds pull Typical Package Inductance... 2 nh Typical Package apacitance pf (opposite leads) Ordering Information Specify part number followed by option. For example: HSMP - 382x - XXX Bulk or Tape and Reel Option Part Number; x = Lead ode Surface Mount PIN Option escriptions -BLK = Bulk, 00 pcs. per antistatic bag -TR = Tape and Reel, 3000 devices per 7" reel -TR2 = Tape and Reel, 0,000 devices per 3" reel Tape and Reeling conforms to lectronic Industries RS-48, Taping of Surface Mounted omponents for Automated Placement. For lead-free option, the part number will have the character "G" at the end, eg. -TR2G for a 0K pc lead-free reel.

8 8 evice Orientation For Outlines SOT-23/323 RL TOP VIW 4 mm N VIW ARRIR TAP 8 mm AB AB AB AB USR F IRTION OVR TAP Note: "AB" represents package marking code. "" represents date code. Tape imensions and Product Orientation For Outline SOT-23 P P 2 P 0 F W t 9 MAX Ko 8 MAX 3.5 MAX A 0 B 0 AVITY PRFORATION SRIPTION SYMBOL SIZ (mm) SIZ (INHS) LNGTH WITH PTH PITH BOTTOM HOL IAMTR IAMTR PITH POSITION A 0 B 0 K 0 P P ± ± ± ± ± ± ± ± ± ± ± ± ± ARRIR TAP WITH THIKNSS W t ± ± ISTAN BTWN NTRLIN AVITY TO PRFORATION (WITH IRTION) AVITY TO PRFORATION (LNGTH IRTION) F P ± ± ± ± 0.002

9 Tape imensions and Product Orientation For Outline SOT-323 P P 2 P 0 F W t (ARRIR TAP THIKNSS) T t (OVR TAP THIKNSS) An K 0 An A 0 B 0 AVITY PRFORATION ARRIR TAP OVR TAP ISTAN ANGL SRIPTION SYMBOL SIZ (mm) SIZ (INHS) LNGTH WITH PTH PITH BOTTOM HOL IAMTR IAMTR PITH POSITION WITH THIKNSS WITH TAP THIKNSS AVITY TO PRFORATION (WITH IRTION) AVITY TO PRFORATION (LNGTH IRTION) A 0 B 0 K 0 P P 0 P ± ± ± ± ± ± ± 0.0 W 8.00 ± 0.30 t ± ± 0.0 T t ± 0.00 F 3.50 ± ± 0.05 FOR SOT-323 (S70-3 LA) An 8 MAX FOR SOT-363 (S70-6 LA) 0 MAX ± ± ± ± ± ± ± ± ± ± ± ± ± For product information and a complete list of distributors, please go to our web site: Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies, Limited in the United States and other countries. ata subject to change. opyright 2006 Avago Technologies, Limited. All rights reserved. Obsoletes N N August 4, 2006