AUTOMOTIVE GRADE C T STG

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1 AUTOMOTIVE GRADE AUIRFN845 Features Advanced Process Technology Ultra Low On-Resistance 75 C Operating Temperature Fast Switching Repetitive Avalanche Allowed up to Tjmax Lead-Free, RoHS Compliant Automotive Qualified * Description Specifically designed for Automotive applications, this HEXFET Power MOSFET utilizes the latest processing techniques to achieve extremely low on-resistance per silicon area. Additional features of this design are a 75 C junction operating temperature, fast switching speed and improved repetitive avalanche rating. These features combine to make this product an extremely efficient and reliable device for use in Automotive and wide variety of other applications. Applications Electric Power Steering (EPS) Battery Switch Start/Stop Micro Hybrid Heavy Loads DC-DC Converter V DSS R DS(on) typ. max I D (Silicon Limited) I D (Package Limited) HEXFET POWER MOSFET 4V.6m 2.m 87A 95A PQFN 5X6 mm G D S Gate Drain Source Standard Pack Base Part Number Package Type Orderable Part Number Form Quantity AUIRFN845 PQFN 5mm x 6mm Tape and Reel 4 AUIRFN845TR Absolute Maximum Ratings Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only; and functional operation of the device at these or any other condition beyond those indicated in the specifications is not implied. Exposure to absolutemaximum-rated conditions for extended periods may affect device reliability. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Ambient temperature (TA) is 25 C, unless otherwise specified. Parameter Max. Units I T C(Bottom) = 25 C Continuous Drain Current, V V (Silicon Limited) 87 I T C(Bottom) = C Continuous Drain Current, V V (Silicon Limited) 32 I T C = 25 C Continuous Drain Current, V V (Package Limited) 95 A I DM Pulsed Drain Current 67 P A = 25 C Power Dissipation 3.3 P C(Bottom) = 25 C Power Dissipation 36 W Linear Derating Factor.22 W/ C V GS Gate-to-Source Voltage ± 2 V T J Operating Junction and -55 to + 75 Storage Temperature Range C T STG Avalanche Characteristics E AS(Thermally Limited) Single Pulse Avalanche Energy 9 mj E AS (Tested) Single Pulse Avalanche Energy 365 I AR Avalanche Current A See Fig. 4, 5, 22a, 22b E AR Repetitive Avalanche Energy mj HEXFET is a registered trademark of International Rectifier. *Qualification standards can be found at 9/24/28

2 AUIRFN845 Thermal Resistance Symbol Parameter Typ. Max. Units R JC (Bottom) Junction-to-Case. R JC (Top) Junction-to-Case 3 R JA Junction-to-Ambient 44 C/W R JA (<s) Junction-to-Ambient 28 Static Electrical (unless otherwise specified) Symbol Parameter Min. Typ. Max. Units Conditions V (BR)DSS Drain-to-Source Breakdown Voltage 4 V V GS = V, I D = 25µA V (BR)DSS / T J Breakdown Voltage Temp. Coefficient 37 mv/ C Reference to 25 C, I D =.ma R DS(on) Static Drain-to-Source On-Resistance.6 2. m V GS = V, I D = 5A V GS(th) Gate Threshold Voltage V V DS = V GS, I D = µa I DSS Drain-to-Source Leakage Current. V DS = 4V, V GS = V 5 µa V DS = 4V, V GS = V, T J = 25 C I GSS Gate-to-Source Forward Leakage V GS = 2V na Gate-to-Source Reverse Leakage - V GS = -2V R G Internal Gate Resistance 2.4 Dynamic Electrical (unless otherwise specified) Symbol Parameter Min. Typ. Max. Units Conditions gfs Forward Transconductance 45 S V DS = V, I D = 5A Q g Total Gate Charge 78 7 I D = 5A Q gs Gate-to-Source Charge 2 V DS = 2V nc Q gd Gate-to-Drain ("Miller") Charge 25 V GS = V Q sync Total Gate Charge Sync. (Q g - Q gd ) 53 t d(on) Turn-On Delay Time 9.5 V DD = 2V t r Rise Time 3 I D = 5A ns t d(off) Turn-Off Delay Time 58 R G = 2.7 t f Fall Time 33 V GS = V C iss Input Capacitance 542 V GS = V C oss Output Capacitance 758 V DS = 25V C rss Reverse Transfer Capacitance 5 pf ƒ =. MHz C oss eff. (ER) Effective Output Capacitance (Energy Related) 9 V GS = V, V DS = V to 32V C oss eff. (TR) Effective Output Capacitance (Time Related) 94 V GS = V, V DS = V to 32V Diode Characteristics Symbol Parameter Min. Typ. Max. Units Conditions Continuous Source Current 87 MOSFET symbol I S A (Body Diode) showing the Pulsed Source Current 67 integral reverse I SM A (Body Diode) p-n junction diode. V SD Diode Forward Voltage.9.3 V, I S = 5A, V GS = V dv/dt Peak Diode Recovery 5.2 V/ns T J = 75 C, I S = 5A, V DS = 4V t rr Reverse Recovery Time 27 V ns R = 34V, 28 T J = 25 C I F = 5A Q rr Reverse Recovery Charge 6 nc 8 T J = 25 C di/dt = A/µs I RRM Reverse Recovery Current.92 A 2 9/24/28

3 C, Capacitance (pf) V GS, Gate-to-Source Voltage (V) I D, Drain-to-Source Current (A) (Normalized) I D, Drain-to-Source Current (A) I D, Drain-to-Source Current (A) AUIRFN845 VGS TOP 5V V 7.V 6.V 5.5V 5.25V 5.V BOTTOM 4.5V VGS TOP 5V V 7.V 6.V 5.5V 5.25V 5.V BOTTOM 4.5V 4.5V 4.5V 6µs PULSE WIDTH Tj = 25 C. V DS, Drain-to-Source Voltage (V) Fig. Typical Output Characteristics 6µs PULSE WIDTH Tj = 75 C. V DS, Drain-to-Source Voltage (V) Fig. 2 Typical Output Characteristics R DS(on), Drain-to-Source On Resistance 2. I D = 5A V GS = V.6 T J = 75 C.2 V DS = V 6µs PULSE WIDTH V GS, Gate-to-Source Voltage (V) T J, Junction Temperature ( C) Fig. 3 Typical Transfer Characteristics V GS = V, f = MHZ C iss = C gs + C gd, C ds SHORTED C rss = C gd C oss = C ds + C gd C iss Fig. 4 Normalized On-Resistance vs. Temperature 4. I D = 5A 2. V DS = 32V V. DS = 2V 8. C oss C rss V DS, Drain-to-Source Voltage (V) Q G, Total Gate Charge (nc) Fig 5. Typical Capacitance vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage 3 9/24/28

4 Energy (µj) V (BR)DSS, I D, Drain Current (A) I SD, Reverse Drain Current (A) I D, Drain-to-Source Current (A) AUIRFN845 OPERATION IN THIS AREA LIMITED BY R DS (on) T J = 75 C µsec Limited by Package msec V GS = V V SD, Source-to-Drain Voltage (V) Tc = 25 C Tj = 75 C Single Pulse msec DC.. V DS, Drain-to-Source Voltage (V) 2 75 Fig. 7 Typical Source-to-Drain Diode Forward Voltage Limited By Package 5 48 Fig 8. Maximum Safe Operating Area Drain-to-Source Breakdown Voltage (V) Id =.ma T C, Case Temperature ( C) Fig 9. Maximum Drain Current vs. Case Temperature.7 R DS (on), Drain-to -Source On Resistance (m ) T J, Temperature ( C ) Fig. Drain-to-Source Breakdown Voltage VGS = 5.V VGS = 6.V VGS = 7.V VGS = 8.V VGS = V V DS, Drain-to-Source Voltage (V) I D, Drain Current (A) Fig. Typical COSS Stored Energy Fig 2. Typical On-Resistance vs. Drain Current 4 9/24/28

5 E AR, Avalanche Energy (mj) Thermal Response ( Z thjc ) C/W AUIRFN845 D = SINGLE PULSE ( THERMAL RESPONSE ) Notes:. Duty Factor D = t/t2 2. Peak Tj = P dm x Zthjc + Tc. E-6 E t, Rectangular Pulse Duration (sec) Fig 3. Maximum Effective Transient Thermal Impedance, Junction-to-Case Allowed avalanche Current vs avalanche pulsewidth, tav, assuming Tj = 5 C and Tstart =25 C (Single Pulse) Avalanche Current (A) Allowed avalanche Current vs avalanche pulsewidth, tav, assuming j = 25 C and Tstart = 5 C...E-6.E-5.E-4.E-3.E-2.E- tav (sec) TOP Single Pulse BOTTOM.% Duty Cycle I D = 5A Starting T J, Junction Temperature ( C) Fig 5. Maximum Avalanche Energy vs. Temperature Fig 4. Typical Avalanche Current vs. Pulse Width Notes on Repetitive Avalanche Curves, Figures 4, 5: (For further info, see AN-5 at Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long as Tjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 6a, 6b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25 C in Figure 4, 5). tav = Average time in avalanche. D = Duty cycle in avalanche = tav f ZthJC(D, tav) = Transient thermal resistance, see Figures 3) P D (ave) = /2 (.3 BV I av ) = T/ Z thjc I av = 2 T/ [.3 BV Z th ] E AS (AR) = P D (ave) t av 5 9/24/28

6 I RRM (A) Q RR (nc) I RRM (A) Q RR (nc) V GS(th), Gate threshold Voltage (V) AUIRFN845 R DS(on), Drain-to -Source On Resistance (m ) 8 I D = 5A T J = 25 C I D = µa I D =.ma I D =.A V GS, Gate -to -Source Voltage (V) T J, Temperature ( C ) Fig 6. Typical On-Resistance vs. Gate Voltage I F = 3A V R = 34V 8 T J = 25 C 25 2 Fig 7. Threshold Voltage vs. Temperature I F = 3A V R = 34V T J = 25 C di F /dt (A/µs) di F /dt (A/µs) Fig. 8 - Typical Recovery Current vs. dif/dt Fig. 9 - Typical Stored Charge vs. dif/dt 8 I F = 5A V R = 34V T J = 25 C 25 2 I F = 5A V R = 34V T J = 25 C di F /dt (A/µs) Fig. 2 - Typical Recovery Current vs. dif/dt di F /dt (A/µs) Fig. 2 - Typical Stored Charge vs. dif/dt 6 9/24/28

7 AUIRFN845 Fig 22. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET Power MOSFETs Fig 22a. Unclamped Inductive Test Circuit Fig 22b. Unclamped Inductive Waveforms Fig 23a. Switching Time Test Circuit Fig 23b. Switching Time Waveforms Fig 24a. Gate Charge Test Circuit Fig 24b. Gate Charge Waveform 7 9/24/28

8 AUIRFN845 PQFN 5x6 Outline "E" Package Details For footprint and stencil design recommendations, please refer to application note AN-36 at For visual inspection recommendations, please refer to application note AN-54 at PQFN 5x6 Outline "E" Part Marking Note: For the most current drawing please refer to IR website at 8 9/24/28

9 AUIRFN845 PQFN 5x6 Outline "E" Tape and Reel REEL DIMENSIONS TAPE DIMENSIONS CODE Ao Bo Ko W P DESCRIPTION Dimension design to accommodate the component width Dimension design to accommodate the component lenght Dimension design to accommodate the component thickness Overall width of the carrier tape Pitch between successive cavity centers QUADRANT ASSIGNMENTS FOR PIN ORIENTATION IN TAPE Note: All dimension are nominal Package Type Reel Diameter QTY Reel Width Ao Bo Ko P W Pin Quadrant (Inch) W 5 X 6 PQFN Q Note: For the most current drawing please refer to IR website at 9 9/24/28

10 AUIRFN845 Qualification Information Qualification Level Automotive (per AEC-Q) Comments: This part number(s) passed Automotive qualification. IR s Industrial and Consumer qualification level is granted by extension of the higher Automotive level. Moisture Sensitivity Level PQFN 5mm x 6mm MSL Human Body Model Class HC (+/- 2V) AEC-Q- ESD Charged Device Model Class C5 (+/- 2V) AEC-Q-5 RoHS Compliant Yes Qualification standards can be found at International Rectifier s web site: http// Highest passing voltage. Notes: Calculated continuous current based on maximum allowable junction temperature. Bond wire current limit is 95A. Note that current limitations arising from heating of the device leads may occur with some lead mounting arrangements. (Refer to AN-4) Repetitive rating; pulse width limited by max. junction temperature. Limited by TJmax, starting TJ = 25 C, L =.52mH, R G = 5, I AS = 5A, V GS =V. I SD 5A, di/dt 96A/µs, V DD V (BR)DSS, T J 75 C. Pulse width 4µs; duty cycle 2%. Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from to 8%VDSS. Coss eff. (ER) is a fixed capacitance that gives the same energy as Coss while VDS is rising from to 8% VDSS. When mounted on " square PCB (FR-4 or G- Material). For recommended footprint and soldering techniques refer to application note #AN-994: R is measured at TJ approximately 9 C. Pulse drain current is limited at 38A by source bonding technology. 9/24/28

11 AUIRFN845 Revision History Date Comments 9/24/28 Updated datasheet with corporate template Corrected typo on Gate-to-Source Leakage from Ω to na on page 2 Published by Infineon Technologies AG 8726 München, Germany Infineon Technologies AG 25 All Rights Reserved. IMPORTANT NOTICE The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics ( Beschaffenheitsgarantie ). With respect to any examples, hints or any typical values stated herein and/or any information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party. In addition, any information given in this document is subject to customer s compliance with its obligations stated in this document and any applicable legal requirements, norms and standards concerning customer s products and any use of the product of Infineon Technologies in customer s applications. The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of customer s technical departments to evaluate the suitability of the product for the intended application and the completeness of the product information given in this document with respect to such application. For further information on the product, technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies office ( WARNINGS Due to technical requirements products may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies office. Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized representatives of Infineon Technologies, Infineon Technologies products may not be used in any applications where a failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury. 9/24/28