FASTIRFET IRFHE4250DPbF

Transcription

1 Q Q2 V DSS V R DS(on) max (@V GS = 4.5V) m Qg (typical) 3 35 nc FASTIRFET IRFHE4250DPbF HEXFET Power MOSFET I D (@T C = 25 C) A Applications Control and Synchronous MOSFETs for synchronous buck converters Features Benefits Control and synchronous MOSFETs in one package Increased power density Low thermal resistance path to the PCB Increased power density Low thermal resistance path to the top Increased power density Low charge control MOSFET (3nC typical) results in Lower switching losses Low R DSON synchronous MOSFET (<.35m ) Lower conduction losses Intrinsic schottky diode with low forward voltage on Q2 Lower switching losses RoHS compliant, halogen-free Environmentally friendlier MSL2, industrial qualification Increased reliability Base part number Package Type Standard Pack Orderable Part Number Form Quantity IRFHE4250DPbF Dual PQFN 6mm x 6mm Tape and Reel 4000 IRFHE4250DTRPbF Absolute Maximum Ratings Parameter Q Max. Q2 Max. Units V GS Gate-to-Source Voltage ± 6 V I T C = 25 C Continuous Drain Current, V V A I T C = 70 C Continuous Drain Current, V V I T C = 25 C Continuous Drain Current (Source Bonding Technology Limited) I DM Pulsed Drain Current P C = 25 C Power Dissipation W P C = 70 C Power Dissipation Linear Derating Factor.3.3 W/ C T J Operating Junction and C -55 to + 50 Storage Temperature Range T STG Notes through are on page 2 DUAL PQFN 6X6 mm Thermal Resistance Parameter Q Max. Q2 Max. Units R JC (Bottom) Junction-to-Case R JC (Top) Junction-to-Case C/W R JA Junction-to-Ambient R JA (<s) Junction-to-Ambient International Rectifier September 26, 203

2 T J = 25 C (unless otherwise specified) Parameter Min. Typ. Max. Units Conditions BV DSS Drain-to-Source Breakdown Voltage Q 25 V V GS = 0V, I D = 250µA Q2 25 V GS = 0V, I D =.0mA BV DSS / T J Breakdown Voltage Temp. Coefficient Q 23 mv/ C Reference to 25 C, I D =.0mA Q2 2 Reference to 25 C, I D = ma Q V GS = V, I D = 27A R DS(on) Static Drain-to-Source On-Resistance Q m V GS = V, I D = 27A Q V GS = 4.5V, I D = 27A Q V GS = 4.5V, I D = 27A V GS(th) Gate Threshold Voltage Q V Q: V DS = V GS, I D = 35µA Q Q2: V DS = V GS, I D = µa V GS(th) / T J Gate Threshold Voltage Coefficient Q -5.8 mv/ C Q: V DS = V GS, I D = 35µA Q2-7.8 Q2: V DS = V GS, I D =.0mA I DSS Drain-to-Source Leakage Current Q.0 µa V DS = 20V, V GS = 0V Q2 500 V DS = 20V, V GS = 0V I GSS Gate-to-Source Forward Leakage Q/Q2 na V GS = 6V Gate-to-Source Reverse Leakage Q/Q2 - V GS = -6V gfs Forward Transconductance Q 73 S V DS = V, I D = 4A Q2 2 V DS = V, I D = 23A Q g Total Gate Charge Q 3 20 Q Q gs Pre-Vth Gate-to-Source Charge Q 3.6 Q Q2 8.6 V DS = 3V Q gs2 Post-Vth Gate-to-Source Charge Q.3 V GS = 4.5V, I D = 3A Q2 3.8 nc Q gd Gate-to-Drain Charge Q 5.2 Q2 Q2 3 V DS = 3V Q godr Gate Charge Overdrive Q 2.9 V GS = 4.5V, I D = 23A Q2 9.6 Q sw Switch Charge (Q gs2 + Q gd ) Q 6.5 Q2 6.8 Q oss Output Charge Q 4 nc V DS = 6V, V GS = 0V Q2 4 R G Gate Resistance Q 0.5 Q2 0.4 t d(on) Turn-On Delay Time Q Q Q2 7 V DS = 3V V GS = 4.5V t r Rise Time Q 33 I D = 4A, Rg =.8 Q2 54 ns t d(off) Turn-Off Delay Time Q 4 Q2 Q2 24 V DS = 3V V GS = 4.5V t f Fall Time Q 2 I D = 23A, Rg =.8 Q2 6 C iss Input Capacitance Q 735 Q V GS = 0V C oss Output Capacitance Q 493 pf V DS = 3V Q2 577 ƒ =.0MHz C rss Reverse Transfer Capacitance Q 37 Q International Rectifier September 26, 203

3 Avalanche Characteristics Parameter Typ. Q Max. Q2 Max. Units E AS Single Pulse Avalanche Energy 7 48 mj I AR Avalanche Current A Diode Characteristics Parameter Min. Typ. Max. Units Conditions I S Continuous Source Current Q 60 A MOSFET symbol (Body Diode) Q2 60 showing the I SM Pulsed Source Current Q 80 A integral reverse (Body Diode) Q2 525 p-n junction diode. V SD Diode Forward Voltage Q V T J = 25 C, I S = 4A, V GS = 0V Q T J = 25 C, I S = 27A, V GS = 0V t rr Reverse Recovery Time Q 9 29 ns Q T J = 25 C, I F = 30A Q V DD = 3V, di/dt = 200A/µs Q rr Reverse Recovery Charge Q 6 24 nc Q2 T J = 25 C, I F = 30A Q V DD = 3V, di/dt = 200A/µs International Rectifier September 26, 203

4 I D, Drain-to-Source Current (A) I D, Drain-to-Source Current (A) I D, Drain-to-Source Current (A) I D, Drain-to-Source Current (A) I D, Drain-to-Source Current (A) I D, Drain-to-Source Current (A) IRFHE4250DPbF 0 Q - Control FET VGS TOP V 5.0V 4.5V 4.0V 3.5V 3.25V 3.0V BOTTOM 2.75V 0 Q2 - Synchronous FET VGS TOP V 4.5V 4.0V 3.5V 3.25V 3.0V 2.75V BOTTOM 2.5V 2.5V 60µs PULSE WIDTH 2.75V Tj = 25 C 0. 0 Fig. Typical Output Characteristics 60µs PULSE WIDTH Tj = 25 C Fig 2. Typical Output Characteristics 0 VGS TOP V 5.0V 4.5V 4.0V 3.5V 3.25V 3.0V BOTTOM 2.75V 0 VGS TOP V 4.5V 4.0V 3.5V 3.25V 3.0V 2.75V BOTTOM 2.5V 2.75V 2.5V 0 60µs PULSE WIDTH Tj = 50 C 0. 0 Fig 3. Typical Output Characteristics 0 60µs PULSE WIDTH Tj = 50 C 0. 0 Fig 4. Typical Output Characteristics T J = 50 C T J = 50 C T J = 25 C T J = 25 C V DS = 5V 60µs PULSE WIDTH V GS, Gate-to-Source Voltage (V) Fig 5. Typical Transfer Characteristics V DS = 5V 60µs PULSE WIDTH V GS, Gate-to-Source Voltage (V) Fig 6. Typical Transfer Characteristics International Rectifier September 26, 203

5 I D, Drain-to-Source Current (A) I D, Drain-to-Source Current (A) V GS, Gate-to-Source Voltage (V) V GS, Gate-to-Source Voltage (V) C, Capacitance (pf) C, Capacitance (pf) IRFHE4250DPbF 00 Q - Control FET V GS = 0V, f = MHZ C iss = C gs + C gd, C ds SHORTED 000 Q2 - Synchronous FET V GS = 0V, f = MHZ C iss = C gs + C gd, C ds SHORTED C rss = C gd C oss = C ds + C gd C rss = C gd C oss = C ds + C gd C iss 00 0 C oss C iss C oss 0 C rss C rss Fig 7. Typical Capacitance vs. Drain-to-Source Voltage Fig 8. Typical Capacitance vs. Drain-to-Source Voltage I D = 30A V DS = 20V V DS = 3V I D = 30A V DS = 20V V DS = 3V Q G, Total Gate Charge (nc) Q G, Total Gate Charge (nc) Fig 9. Typical Gate Charge vs. Gate-to-Source Voltage 0 OPERATION IN THIS AREA LIMITED BY R DS (on) Limited by package msec µsec msec DC Tc = 25 C Tj = 50 C Single Pulse Fig. Maximum Safe Operating Area Fig. Typical Gate Charge vs. Gate-to-Source Voltage 00 0 OPERATION IN THIS AREA LIMITED BY R DS (on) Limited by package msec msec µsec Tc = 25 C Tj = 50 C DC Single Pulse Fig 2. Maximum Safe Operating Area International Rectifier September 26, 203

6 I SD, Reverse Drain Current (A) I SD, Reverse Drain Current (A) R DS(on), Drain-to-Source On Resistance (Normalized) R DS(on), Drain-to-Source On Resistance (Normalized) IRFHE4250DPbF.6.4 I D = 27A V GS = 4.5V Q - Control FET I D = 27A V GS = 4.5V Q2 - Synchronous FET T J, Junction Temperature ( C) Fig 3. Normalized On-Resistance vs. Temperature T J, Junction Temperature ( C) Fig 4. Normalized On-Resistance vs. Temperature 0 T J = 50 C T J = 50 C T J = 25 C T J = 25 C V GS = 0V V SD, Source-to-Drain Voltage (V) Fig 5. Typical Source-Drain Diode Forward Voltage V GS = 0V V SD, Source-to-Drain Voltage (V) Fig 6. Typical Source-Drain Diode Forward Voltage I D = 23A 3.0 I D = 27A R DS(on), Drain-to -Source On Resistance (m ) T J = 25 C T J = 25 C V GS, Gate -to -Source Voltage (V) R DS(on), Drain-to -Source On Resistance (m ) T J = 25 C T J = 25 C V GS, Gate -to -Source Voltage (V) Fig 7. Typical On-Resistance vs. Gate Voltage Fig 8. Typical On-Resistance vs. Gate Voltage International Rectifier September 26, 203

7 E AS, Single Pulse Avalanche Energy (mj) E AS, Single Pulse Avalanche Energy (mj) V GS(th), V GS(th), Gate threshold Voltage (V) Gate threshold Voltage (V) I D, I D, Drain Current (A) Drain Current (A) IRFHE4250DPbF Q - Control FET 350 Q2 - Synchronous FET 80 Limited By Package Limited By Package T C, Case Temperature ( C) Fig 9. Maximum Drain Current vs. Case Temperature T C, Case Temperature ( C) Fig 20. Maximum Drain Current vs. Case Temperature I D = 35µA.5.0 I D =.0mA T J, Temperature ( C ) T J, Temperature ( C ) Fig 2. Threshold Voltage vs. Temperature Fig 22. Threshold Voltage vs. Temperature I D TOP 8.6A 5A BOTTOM 32A I D TOP 8A 33A BOTTOM 63A Starting T J, Junction Temperature ( C) Fig 23. Maximum Avalanche Energy vs. Drain Current Starting T J, Junction Temperature ( C) Fig 24. Maximum Avalanche Energy vs. Drain Current International Rectifier September 26, 203

8 Thermal Response ( Z thjc ) C/W 0. D = SINGLE PULSE ( THERMAL RESPONSE ) Notes:. Duty Factor D = t/t2 2. Peak Tj = P dm x Zthjc + Tc 0.00 E-006 E t, Rectangular Pulse Duration (sec) Fig 25. Maximum Effective Transient Thermal Impedance, Junction-to-Case (Q) D = Thermal Response ( Z thjc ) C/W 0.00 SINGLE PULSE ( THERMAL RESPONSE ) Notes:. Duty Factor D = t/t2 2. Peak Tj = P dm x Zthjc + Tc E-007 E-006 E t, Rectangular Pulse Duration (sec) Fig 26. Maximum Effective Transient Thermal Impedance, Junction-to-Case (Q2) 0 Avalanche Current (A) Allowed avalanche Current vs avalanche pulsewidth, tav, assuming Tj = 25 C and Tstart =25 C (Single Pulse) Allowed avalanche Current vs avalanche pulsewidth, tav, assuming j = 25 C and Tstart = 25 C. 0..0E-06.0E-05.0E-04.0E-03.0E-02.0E-0 tav (sec) Fig 27. Single Avalanche Event: Pulse Current vs. Pulse Width (Q) International Rectifier September 26, 203

9 0 Avalanche Current (A) Allowed avalanche Current vs avalanche pulsewidth, tav, assuming Tj = 25 C and Tstart =25 C (Single Pulse) Allowed avalanche Current vs avalanche pulsewidth, tav, assuming j = 25 C and Tstart = 25 C..0E-06.0E-05.0E-04.0E-03.0E-02.0E-0 tav (sec) Fig 28. Single Avalanche Event: Pulse Current vs. Pulse Width (Q2) International Rectifier September 26, 203

10 Fig 29. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET Power MOSFETs V (BR)DSS 5V tp V DS L DRIVER R G 20V tp D.U.T I AS V DD A I AS Fig 30a. Unclamped Inductive Test Circuit Fig 30b. Unclamped Inductive Waveforms Fig 3a. Switching Time Test Circuit Fig 3b. Switching Time Waveforms Vds Id Vgs VDD Vgs(th) Qgs Qgs2 Qgd Qgodr Fig 32a. Gate Charge Test Circuit Fig 32b. Gate Charge Waveform International Rectifier September 26, 203

11 Dual PQFN 6x6 Outline Package Details For more information on board mounting, including footprint and stencil recommendation, please refer to application note AN-36: For more information on package inspection techniques, please refer to application note AN-54: Note: For the most current drawing please refer to IR website at International Rectifier September 26, 203

12 Dual PQFN 6x6 Outline Tape and Reel Note: For the most current drawing please refer to IR website at Qualification Information Qualification level Industrial (per JEDEC JESD47F guidelines ) Moisture Sensitivity Level RoHS Compliant DUAL PQFN 6mm x 6mm Yes MSL2 (per JEDEC J-STD-020D ) Qualification standards can be found at International Rectifier s web site Applicable version of JEDEC standard at the time of product release. Notes: Repetitive rating; pulse width limited by max. junction temperature. Starting T J = 25 C, Q: L = 0.4 mh, R G = 50, I AS = 32A; Q2: L = 0.24 mh, R G = 50, I AS = 63A. Pulse width 400µs; duty cycle 2%. R is measured at T J approximately 90 C. When mounted on inch square PCB (FR-4). Please refer to AN-994 for more details: Calculated continuous current based on maximum allowable junction temperature. Current is limited to Q = 60A & Q2 = 60A by source bonding technology. Pulsed drain current is limited to 240A by source bonding technology. IR WORLD HEADQUARTERS: N. Sepulveda Blvd., El Segundo, California 90245, USA To contact International Rectifier, please visit International Rectifier September 26, 203