EE100Su08 Lecture #16 (August 1 st 2008)
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1 EESu8 Lecture #6 (ugust st 28) OUTLINE Project next week: Pick up kits in your first lab section, work on the project in your first lab section, at home etc. and wrap up in the second lab section. USE MULTISIM TO SIMULTE PROJECT (REER TO MULTISIM ILE ONLINE!) HW #3s-#6s: Pick up from lab, regrades: talk to art Introduction to oolean lgebra and Digital Circuits Diode Logic Transistor introduction (MOSETs) Transistor logic circuits Reading Reader: Chapter 2, Chapter 4 and 5 (for transistors, just concentrate on logic applications). EE Summer 28 Slide
2 EE Summer 28 Slide 2
3 nalog vs. Digital Signals Most (but not all) observables are analog think of analog vs. digital watches but the most convenient way to represent & transmit information electronically is to use digital signals think of a computer! EE Summer 28 Slide 3
4 Digital Signal Representations inary numbers can be used to represent any quantity. Counting: EE Summer 28 Slide 4
5 Digital Signal Representations inary numbers can be used to represent any quantity. Counting: EE Summer 28 Slide 5
6 Decimal Numbers: ase Digits:,, 2, 3, 4, 5, 6, 7, 8, 9 Example: 327 = (3x 3 ) + (2x 2 ) + (7x )+ (x ) This is a four-digit number. The left hand most number (3 in this example) is often referred as the most significant number and the right most the least significant number ( in this example). EE Summer 28 Slide 6
7 Numbers: positional notation Number ase symbols per digit: ase (Decimal):,, 2, 3, 4, 5, 6, 7, 8, 9 ase 2 (inary):, Number representation: d 3 d 3... d d is a 32 digit number value = d d d + d inary:, (In binary digits called bits ) = = = 26 Here 5 digit binary # turns into a 2 digit decimal # EE Summer 28 Slide 7
8 Hexadecimal Numbers: ase 6 Hexadecimal:,, 2, 3, 4, 5, 6, 7, 8, 9,,, C, D, E, Normal digits + 6 more from the alphabet Conversion: inary Hex hex digit represents 6 decimal values 4 binary digits represent 6 decimal values hex digit replaces 4 binary digits EE Summer 28 Slide 8
9 Decimal-inary Conversion Decimal to inary Repeated Division y 2 Consider the number 267. Subtraction if you know your 2 N values by heart. inary to Decimal conversion 2 = x2 5 +x2 4 +x2 3 +x2 2 + x2 + x2 = = 49 = 4x + 9x EE Summer 28 Slide 9
10 Example Possible digital representation for the sine wave signal: nalog representation: Digital representation: mplitude in µv inary number EE Summer 28 Slide
11 inary Representation N bit can represent 2 N values: typically from to 2 N - 3-bit word can represent 8 values: e.g.,, 2, 3, 4, 5, 6, 7 Conversion Integer to binary raction to binary (3.5 =. 2 and.392 =. 2 ) Octal and hexadecimal EE Summer 28 Slide
12 Logic gates Logic Gates Combine several logic variable inputs to produce a logic variable output Memory Memoryless: output at a given instant depends the input values of that instant. Memory: output depends on previous and present input values. EE Summer 28 Slide 2
13 oolean algebras lgebraic structures "capture the essence" of the logical operations ND, OR and NOT corresponding set for theoretic operations intersection, union and complement named after George oole, an English mathematician at University College Cork, who first defined them as part of a system of logic in the mid 9th century. oolean algebra was an attempt to use algebraic techniques to deal with expressions in the propositional calculus. Today, oolean algebras find many applications in electronic design. They were first applied to switching by Claude Shannon in the 2th century. EE Summer 28 Slide 3
14 oolean algebras The operators of oolean algebra may be represented in various ways. Often they are simply written as ND, OR and NOT. In describing circuits, NND (NOT ND), NOR (NOT OR) and XOR (exclusive OR) may also be used. Mathematicians often use + for OR and for ND (since in some ways those operations are analogous to addition and multiplication in other algebraic structures) and represent NOT by a line drawn above the expression being negated. EE Summer 28 Slide 4
15 Logic unctions, Symbols, & Notation TRUTH NME SYMOL NOTTION TLE NOT = OR = + ND = EE Summer 28 Slide 5
16 Slide 6 EE Summer 28 Logic unctions, Symbols, & Notation 2 NOR = + NND = XOR (exclusive OR) = +
17 EE Summer 28 Slide 7
18 EE Summer 28 Slide 8
19 oolean lgebra NOT operation (inverter) i = ND operation OR operation + = i = i = i= i = i ( i) ic = i( ic) + = + = + = + = + ( + ) + C = + ( + C) EE Summer 28 Slide 9
20 oolean lgebra Distributive Property i( + C) = i+ ic ( + ) ic = ( + ) i( + C) De Morgan s laws + = i i = + n excellent web site to visit EE Summer 28 Slide 2
21 Circuit Realization: Three input adder with carry EE Summer 28 Slide 2
22 Diode Logic: ND Gate Diodes can be used to perform logic functions: ND gate output voltage is high only if both and are high V cc Inputs and vary between Volts ( low ) and V cc ( high ) etween what voltage levels does C vary? R ND C EE Summer 28 Slide 22
23 Diode Logic: Incompatibility and Decay Diode Only Gates are asically Incompatible: ND gate output voltage is high only if both and are high OR gate output voltage is high if either (or both) and are high V cc R ND C ND R OR C OR C ND High want R ND >> R OR C ND Low want R ND << R OR Signal Decays with each stage (Not regenerative) EE Summer 28 Slide 23
24 MOSETs: Detailed outline OUTLINE The MOSET as a controlled resistor MOSET ID vs. VGS characteristic NMOS and PMOS I-V characteristics Simple MOSET circuits Reading Reader: Chapters 4 and 5 EE Summer 28 Slide 24
25 MOSET NMOS: Three regions of operation V DS and V GS normally positive valus V GS <V t :cut off mode, I DS = for any V DS V GS >V t :transistor is turned on V DS < V GS -V t : Triode Region V DS > V GS -V t : Saturation Region oundary v V = v GS t DS i = K 2( v V ) v v 2 id = K 2( vgs Vt) 2 D GS t DS DS WKP K = L 2 EE Summer 28 Slide 25
26 MOSET PMOS: Three regions of operation (interchange > and < from NMOS) V DS and V GS Normally negative values V GS >V t :cut off mode, I DS = for any V DS V GS <V t :transistor is turned on V DS > V GS -V t : Triode Region V DS < V GS -V t : Saturation Region oundary v V = v GS t DS i = K 2( v V ) v v 2 id = K 2( vgs Vt) 2 D GS t DS DS WKP K = L 2 EE Summer 28 Slide 26
27 MOSET Operating Regions NMOS Cut-off Saturation Triode V to v DS + V to v GS PMOS Triode Saturation Cut-off v DS + V to V to v GS EE Summer 28 Slide 27
28 Inverter = NOT Gate V in V out Ideal Transfer Characteristics V out V/2 V V in EE Summer 28 Slide 28
29 NMOS Resistor Pull-Up Circuit: V DD R D Voltage-Transfer Characteristic v OUT i D i D + v IN + v DS = v OUT v IN = V DD V DD V T V DD v IN V DD /R D v GS = v in V T V DD increasing v GS = v IN > V T v DS EE Summer 28 Slide 29
30 Disadvantages of NMOS Logic Gates Large values of R D are required in order to achieve a low value of V OL keep power consumption low Large resistors are needed, but these take up a lot of space. One solution is to replace the resistor with an NMOSET that is always on. EE Summer 28 Slide 3
31 The CMOS Inverter: Intuitive Perspective CIRCUIT SWITCH MODELS V DD V DD V DD G S D R p V IN V OUT V OUT V OUT D V OL = V V OH = V DD G S R n Low static power consumption, since one MOSET is always off in steady state EE Summer 28 V IN = V DD Slide 3 V IN = V
32 eatures of CMOS Digital Circuits The output is always connected to V DD or GND in steady state ull logic swing; large noise margins Logic levels are not dependent upon the relative sizes of the devices ( ratioless ) There is no direct path between V DD and GND in steady state no static power dissipation EE Summer 28 Slide 32
33 NMOS NND Gate Output is low only if both inputs are high V DD R D Truth Table EE Summer 28 Slide 33
34 NMOS NOR Gate Output is low if either input is high V DD R D Truth Table EE Summer 28 Slide 34
35 N-Channel MOSET Operation n NMOSET is a closed switch when the input is high X Y X Y Y = X if and Y = X if or NMOSETs pass a strong but a weak EE Summer 28 Slide 35
36 P-Channel MOSET Operation PMOSET is a closed switch when the input is low X Y X Y Y = X if and = ( + ) Y = X if or = () PMOSETs pass a strong but a weak EE Summer 28 Slide 36
37 Pull-Down and Pull-Up Devices In CMOS logic gates, NMOSETs are used to connect the output to GND, whereas PMOSETs are used to connect the output to V DD. n NMOSET functions as a pull-down device when it is turned on (gate voltage = V DD ) PMOSET functions as a pull-up device when it is turned on (gate voltage = GND) V DD input signals 2 N Pull-up network PMOSETs only (, 2,, N ) 2 N Pull-down network NMOSETs only EE Summer 28 Slide 37
38 CMOS NND Gate V DD EE Summer 28 Slide 38
39 CMOS NOR Gate V DD EE Summer 28 Slide 39
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