A-data new-a. Data here. B-data new-b. Digital Circuits V CC. ECGR2181 Chapter 3 Notes 3-1. Logic System Design I

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1 Data here -data new- -data new- Digital Circuits V CC ECGR28 Chapter 3 Notes S ogic System Design I 3-

2 What is a digital system? It is a organized collecti of digital elements which is designed to perform specified operatis a set of digital inputs and to generate a set of digital respses. digital system can be as simple as a block of combinatial logic or as complex as a microprocessor. ogic System Design I 3-2

3 Characteristics of Digital Systems What are the characteristics of a digital system? Coordinate and sequence its internal operatis. Data processing and storage. Cooperate in transferring data to & from itself. Sequences operatis of external entities. ogic System Design I 3-3

4 Overview of a digital system Inputs Digital System Outputs Data Ctrol Sequencing Processing Storage Data Ctrol ogic System Design I 3-4

5 Input & Output Signals Data: Multi-bit: values Single-bit: decisi-making / informati Ctrol: {generally single-bit signals} Sequencing operatis of system Coordinating operatis with external units ogic System Design I 3-5

6 Introducti to Digital Systems Nomenclature: (Terms to know.) Word: group of binary bits. Typically represents some element of data. The number of bits in a word is indeterminate unless specified. [Example: 24-bit word ] yte: n 8-bit word. Nibble: 4-bit word. ogic System Design I 3-6

7 Introducti to Digital Systems Structure of digital systems: system vs. module digital system can be created as a molithic structure. Complex systems often need to be partitied into some number of subsystems -- modules For small systems which can be cveniently designed molithically the terms system and module may be used interchangeably. ogic System Design I 3-7

8 Introducti to Digital Systems Single module system: System data in ctrol module data out ctrol ogic System Design I 3-8

9 Introducti to Digital Systems Multiple module system: System data in ctrol data in ctrol module module module data out ctrol ogic System Design I 3-9

10 Examples of digital systems Data Selector: Route input data to e of two outputs. Data Cverter: Inputs a 32-bit data word and outputs it as 4 bytes. Message Generator: Outputs a fixed message when a start command is received Communicatis uffer: Receives and stores a block of data. When the block is complete, it resends the stored data. Microprocessor: Does everything! ogic System Design I 3-

11 first look at the design process. Understand the functial specificati. 2. Create a block diagram from the external viewpoint. 3. Fill in the major internal compents. 4. Determine the sequence of operatis which must occur within the module ogic System Design I 3-

12 Data Selector Route input data to e of two outputs. Specificati: When a new data word arrives at the input, the module inspects the state of the most significant bit and routes the data to output if the bit is true and to if the bit is false. The last value sent to either output is retained until replaced. Data here -data new- -data new- ogic System Design I 3-2

13 Data Cverter Inputs 32-bit data word and outputs it as 4 bytes. Specificati: When a new data word arrives at the input, the module accepts it and then outputs the word as 4 bytes. IN ready R E G OUT new ogic System Design I 3-3

14 Message Generator Outputs a fixed message when a start command is received. Specificati: When a start command is received, the module retrieves the bytes of a message stored in an internal ROM and outputs them sequentially. start ROM Memory DOUT new ogic System Design I 3-4

15 Communicatis uffer Receives and stores a block of data. When the block is complete, it resends the data. Specificati: The module receives a series of data bytes and stores them in an internal memory. Intake of data stops when a byte of all s is received. Then it resends the message with pairs of bytes packed in 6-bit words. IN here RM Memory OUT new ogic System Design I 3-5

16 Digital ogic inary system -- &, OW & IG, negated and asserted. asic building blocks -- ND, OR, NOT (a) X Y X ND Y X Y (b) X Y X OR Y X + Y (c) X NOT X X X Y X ND Y X Y X OR Y X NOT X Copyright 2 by Prentice all, Inc. Digital Design Principles and Practices, 3/e ogic System Design I 3-6

17 NND and NOR (a) X Y X X NND Y (b) X NOR Y Y (X Y) (X + Y) X Y X NND Y X Y X NOR Y Copyright 2 by Prentice all, Inc. Digital Design Principles and Practices, 3/e ogic System Design I 3-7

18 Truth Tables X Y X Y X Y X Y F X Y + X Y X Y XY X Y X +Y + F ogic System Design I 3-8

19 More Practice X Y F ogic System Design I 3-9

20 Many representatis of digital logic Transistor-level circuit diagrams V CC S ogic System Design I 3-2

21 Truth tables ogic diagrams Table - Truth table for the multiplexer functi. S S SN SN S ogic System Design I 3-2

22 ogic levels 5. V ogic (IG) 3.5 V undefined logic level.5 V ogic (OW). V Switching threshold varies with voltage, temp, process, etc. need noise margin Operating closer to the tolerances requires an increase in attenti to analog behavior. ogic voltage levels decreasing with process 5 -> 3.3 -> 2.5 ->.8 V Copyright 2 by Prentice all, Inc. Digital Design Principles and Practices, 3/e ogic System Design I 3-22

23 MOS Transistors V IN Voltage-ctrolled resistance Copyright 2 by Prentice all, Inc. Digital Design Principles and Practices, V gs 3/e + PMOS gate source drain Voltage-ctrolled resistance: decrease V gs ==> decrease R ds Note: normally, V gs NMOS gate + V gs Copyright 2 by Prentice all, Inc. Digital Design Principles and Practices, 3/e drain source Voltage-ctrolled resistance: increase V gs ==> decrease R ds Note: normally, V gs Copyright 2 by Prentice all, Inc. ogic Digital System Design Design Principles I and Practices, 3/e 3-23

24 CMOS Inverter (a) V DD = +5. V Copyright 2 by Prentice all, Inc. Digital Design Principles and Practices, 3/e Q2 (p-channel) V OUT (b). 5. V IN () () Q Q2 V OUT 5.. () () V IN Q (n-channel) (c) IN OUT ogic System Design I 3-24

25 lternate transistor symbols V DD = +5. V Q2 (p-channel) when V IN is low V OUT V IN Q (n-channel) when V IN is high Copyright 2 by Prentice all, Inc. Digital Design Principles and Practices, 3/e ogic System Design I 3-25

26 Switch model (a) V DD = +5. V (b) V DD = +5. V V IN = V OUT = V IN = V OUT = Copyright 2 by Prentice all, Inc. Digital Design Principles and Practices, 3/e ogic System Design I 3-26

27 (a) CMOS NND Gates Use 2n transistors for n-input gate V DD Copyright 2 by Prentice all, Inc. Digital Design Principles and Practices, 3/e Q2 Q4 (b) Q Q2 Q3 Q4 Q Q3 (c) ogic System Design I 3-27

28 CMOS NND -- switch model V DD (a) (b) (c) V DD (b) (c) V DD ( = = = = = = = 2 by Prentice all, Inc. n Principles and Practices, 3/e Copyright 2 by Prentice all, Inc. Digital Design Principles and Practices, 3/e Copyright 2 by Prentice all, Inc. Digital Design Principles and Practices, 3/e ogic System Design I 3-28

29 CMOS NND -- more inputs (3) (a) V DD (b) C Q Q2 Q3 Q4 Q5 Q6 Q2 Q4 Q6 Q Q3 (c) C Q5 C Copyright 2 by Prentice all, Inc. Digital Design Principles and Practices, 3/e ogic System Design I 3-29

30 CMOS NOR Gates ike NND -- 2n transistors for n-input gate (a) V DD Q2 (b) Q Q2 Q3 Q4 Q4 Q Q3 (c) Copyright 2 by Prentice all, Inc. Digital Design Principles and Practices, 3/e ogic System Design I 3-3

31 (a) NND vs. NOR PMOS transistors have higher resistance than NMOS transistors. NND V DD V Copyright 2 by Prentice DD all, Inc. Digital Design Principles and Practices, 3/e (a) NOR Q2 Q Q4 (b) Q Q2 Q3 Q2 Q4 Q4 (b) Q3 (c) Q Q3 (c) Result: NND gates are preferred in CMOS. Copyrig Digital De ogic System Design I 3-3

32 dditial Terms Sinking/Sourcing Current (sect , p. 6) current entering/leaving the output of a device. Fanout (sect ) how many gate inputs can a particular device drive and still maintain digital logic characteristics. Unused Inputs (sect ) always cnect unused inputs to either power supply rail (V cc or Gnd.) Static cditis may appear to be stable, Dynamic cditis could be unstable Makes circuit behavior unpredictable. ESD Electro-Static Discharge. (sect ) ESD involves the discharge of static electricity and is the deadly enemy of electric circuits, especially, CMOS devices. (a) ESD damage can be avoided with the use of ESD straps and rubber mats. Transiti Time (b) (sect. 3.6.) time required for signal to transit the abnormal regi. The time to transit the abnormal regi may be different for traversing the regi in different directis. t r t f (c) IG OW V Imin V Imax t r t f Copyright 2 by Prentice all, Inc. Digital Design Principles and Practices, 3/e ogic System Design I 3-32

33 More Terms Propagati Delay (sect ) time required for a change the input to produce a change the output. Current Spikes (sect ) typically seen the power rails. Produced when many outputs change at the same time. Switching Power Supplies often produce these effects. {t/s note: check frequency to help find source} Decoupling Capacitors (sect ) distributes the filtering the board and aids in the reducti of noise the power rails. Ground ounce (sect ) read the text. {describe how it looks an o scope} Three-state Outputs (sect ) devices whose outputs are e of three states, high, low and high impedance. Used to drive an output from multiple, mutually exclusive sources (or devices.) Different types of ogic Families: TT Transitor-Transitor ogic CMOS Complementary Metal Oxide Semicductor EC Emitter-Coupled ogic Take extreme care when interfacing TT and CMOS logic devices ogic System Design I 3-33