A 0.7 V-to-1.0 V 10.1 dbm-to-13.2 dbm 60-GHz Power Amplifier Using Digitally- Assisted LDO Considering HCI Issues

Transcription

1 A 0.7 V-to-1.0 V 10.1 dbm-to-13.2 dbm 60-GHz Power Amplifier Using Digitally- Assisted LDO Considering HCI Issues Rui Wu, Yuuki Tsukui, Ryo Minami, Kenichi Okada, and Akira Matsuzawa Tokyo Institute of Technology, Japan

2 Outline Background 60-GHz field is attractive Hot-Carrier-Induced Issues HCI influence on circuit reliability Variable-Supply-Voltage PA using Digitally-assisted LDO Circuit design & Measurement results Conclusions 1

3 Background 9-GHz unlicensed bandwidth Several Gbps wireless communication e.g. IEEE c QPSK 3.5 Gbps/ch 16QAM 7 Gbps/ch [1] 2

4 HCI Issues are Emerging at 60 GHz 60-GHz power amplifier 2.4-GHz power amplifier Thick oxide Standard Standard High f max, suitable for 60-GHz amplifier Bad HCI performance Good HCI performance Low f max, can t be used for 60-GHz amplifier 3

5 Hot-Carrier-Induced (HCI) Effects Gate SiO 2 Source n+ Oxide damage P-Substrate I sub I g n+ Impact ionization Drain Degrade V th, g m, drain current, and lifetime 4

6 Lifetime t (s) 65 nm NMOSFET DC Stress Lifetime Lifetime is the time drain current decreases by 10% 1E Stress condition 1E V DS 1E V GS E E+02 V V DS V GS = 0.8 V E /V DS (1/V) t [2] E. Takeda et al., IEDL

7 I DSat (%) 65 nm NMOSFET RF Stress Lifetime 100 Freq.=100 MHz, P o =11 dbm Stress condition V ds 10 V gs V ds V gs V 1E E E E Time (s) [3] L. Negre et al., JSSC V t 6

8 Hot-Carrier Damage Mechanism [4] Single Vibrational Excitation (SVE) is related to high energetic carrier that has enough energy to break Si-H bond; (High energy) Electron Electron Scattering (EES) is caused by one carrier promotes the other into higher energy and allows Si-H breaking; (Medium energy) Multiple Vibrational Excitation (MVE) is due to a series of low energetic carriers that accumulate enough energy to break Si-H bond. (Low energy) [4] C. Guerin et al., JAP

9 Hot-Carrier Physical Model [3] I DS (t) is the time-varying drain current which is a function of V GS (t) and V DS (t); K and a are damage mode dependent constants; m and n are process-related constants. [3] L. Negre et al., JSSC

10 Conventional Solutions Cascode [5] Power combining [7] Low V dd [6] Better lifetime Degraded output power, efficiency, and linearity [5] A. Siligaris et al., JSSC 2010 [6] M. Tanomura et al., ISSCC 2008 Better lifetime, output power, and linearity Sensitive to process variations [7] J. Chen et al., ISSCC

11 Application Scenario Single Carrier (SC) Mode of IEEE c Mod 1+MCS 8 Mod 1+MCS 1 & Mod 2+MCS m 1 m d Mod1 low power Mod2 high power MCS identifier 8 1 Data rate 2640 Mb/s 412 Mb/s Rx sensitivity -56 dbm -61 dbm Required CNR 17.5 db 12.5 db Distance 0.56 m 1 m 1 m Required P out 5 dbm 10 dbm 5 dbm *NF=8 db; Thermal noise=-81.5 dbm; Antenna gain=2 dbi; Implementation loss=-2 db; freq.=60 GHz 10

12 Lifetime estimation 11

13 Time-Division Duplex (TDD) Operation TDD operation can eliminate the stringent requirement of filtering and extend the available bandwidth for transceivers. TX SIFS ACK RX SIFS TX... Time Time In IEEE ad, short inter-frame space (SIFS) is indicated to be 3ms... 12

14 The Proposed Power Amplifier 13

15 14 Transient Operation of the LDO βv ref V refd V PA Record Restore βv ref V refd Record Restore Time Training Awaking Sleep Awaking

16 V PA (V) Transient Simulation Result ms CLK=200 MHz C L =86 pf Time (ms) 15

17 Differential PA Topology RF in+ MIM TL TL M 1 M 2 M 3 RF out- C c1 V g1 V g2 V g3 V dd C c2 V dd V PA C c1 C c2 RF in- M 4 M5 M 6 RF out+ The cross-coupling capacitor technique is adopted to improve the stability and power gain 16

18 700 mm Die Micro-photograph C L LDO PA 800 mm 17

19 Measured Small-Signal S-parameter 18

20 P sat and P 1dB (dbm) PAE max (%) PA Performance vs V GHz P sat 25 9 P 1dB PAE max V PA (V) 5 19

21 I DSat (%) Measured Lifetime of the PA V PA =1.00 V, P out =10 dbm V PA =1.00 V, P out =5 dbm V PA =0.75 V, P out =5 dbm E+001.E+021.E+041.E+061.E+081.E Time (s) 20

22 Magnitude (db) Magnitude (db) Measured Output Spectrum IEEE c Spectrum mask Centered Freq. (GHz) (a) Centered Freq. (GHz) (b) Spectrum centered at GHz for QPSK modulation (a) V PA =1.0 V, P out =4 dbm; (b) V PA =0.7 V, P out =3 dbm 21

23 EVM (db) Measured EVM for QPSK Modualtion -15 Pout = 5 dbm -16 Pout = 7 dbm Pout = 10 dbm V PA (V) 22

24 60 GHz CMOS PA Performance Comparison Ref. [5] Process 65 nm SOI [6] 90 nm Vdd (V) Only for the last stage V PA P 1dB (dbm) P sat (dbm) PAE max (%) Lifetime (year) N/A > 10 5 * > 10* [7] 65 nm N/A [8] 65 nm > 10* This work 65 nm > > 0.2 * Non-measured results [5] A. Siligaris et. al, JSSC 2010 [7] J. Chen et. al, ISSCC 2011 [6] M. Tanomura et. al, ISSCC 2008 [8] W. L. Chan et. al, JSSC

25 24 Conclusions The lifetime of the proposed PA can be improved dramatically by dynamic operation. The tunable supply offers a possibility to meet different linearity, efficiency, output power and lifetime requirements in actual applications. The PA is insensitive to the process variations thanks to the tunable supply voltage.

26 Thank you for your attention! 25

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28 Output Power Distribution [5] [5] A. Siligaris et. al, JSSC

29 MAG (db) Transistor Measurement Data [9] Q. Bu et. al, SSDM 2012 Cascode CS Frequency (GHz) 28

30 Power Consumption V PA I Digital I Analog I PA 1.0 V 64 ma 312 ma 130 ma 0.7 V 64 ma 312 ma 120 ma 29

31 Lifetime Improvement of the PA A(t) 1/n A f (t) 1/n A 1 (t) 1/n A 2 (t) 1/n 1/n A 3 (t) A d (t) 1/n Fixed Dynamic t t 1 t 2 t 3 t d-1 t d Age function 30

32 The Flow Chart of Dynamic Operation Sleep mode? No Bias on Yes Bias off Bias and output power maintain No Control frame received? Yes Bias and output power change 31

33 32 Spectrum Measurement Setup AWG Parameter Analyzer Spectrum Analyzer 60-GHz TX Board ATT PA ATT Power Meter Signal Generator

34 33 EVM Measurement Setup AWG Parameter Analyzer Osci. 60-GHz TX Board ATT PA ATT 60-GHz RX Board Power Meter

35 Dynamic Comparator Schematic [9] V dd V dd D i- D i+ Clk V o+ V o- V i+ V i- V b (a) First stage D i- D i+ (b) Second stage [9] M. Miyahara et. al, ASSCC

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37 Lifetime t (s) 65 nm NMOSFET DC Stress Lifetime E E+09 1E E E E+05 1E E+03 1E E E+00 [2] E. Takeda et al., IEDL 1983 V GS =0.8 V V DS =1.2 V V DS =2.0 V /V DS (1/V) 36

38 I DSat (%) 65 nm NMOSFET RF Stress Lifetime 100 V DS =1.2 V, V GS =0.8 V Freq.=100 MHz, P out =11 dbm E E E E [3] L. Negre et al., JSSC 2012 Time (s) 37

39 CMOS PA Performance Comparison Ref. [5] Process 65 nm SOI Freq. (GHz) 60 [6] 90 nm 60 Only for the last stage V PA Vdd (V) P 1dB (dbm) P sat (dbm) PAE max (%) [7] 65 nm [8] 65 nm This work 65 nm [5] A. Siligaris et. al, JSSC 2010 [7] J. Chen et. al, ISSCC 2011 [6] M. Tanomura et. al, ISSCC 2008 [8] W. L. Chan et. al, JSSC

40 CMOS PA Performance Comparison Ref. [5] Process 65 nm SOI [6] 90 nm Vdd (V) Only for the last stage V PA P 1dB (dbm) P sat (dbm) PAE max (%) Lifetime (year) N/A > 10 5 * > 10* [7] 65 nm N/A [8] 65 nm > 10* This work 65 nm > > 0.2 * Estimation results [5] A. Siligaris et. al, JSSC 2010 [7] J. Chen et. al, ISSCC 2011 [6] M. Tanomura et. al, ISSCC 2008 [8] W. L. Chan et. al, JSSC