High PSRR Full On-Chip CMOS Low Dropout Voltage Regulator for Wireless Applications

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1 Interntionl Journl of omuter litions ( ) Volume 7 No.8 June 03 Hih PSRR Full On-hi MOS ow Droout Volte Reultor for Wireless litions Zred Kl Eletril Enineerin Dertment Fulty of Sienes nd Tehnoloy B.P 0 Fez V.N Moroo Qjid Hssn Dertment of Physis Fulty of Sienes Dhr El- Mehrz Zouk Mohine Eletril Enineerin Dertment Fulty of Sienes nd Tehnoloy B.P 0 Fez V.N Moroo BSTRT This er resents hih PSRR full on-hi nd re effiient low droout volte reultor (DO) exloitin the nested miller omenstion tehnique with tive itor (NM) to eliminte the externl itor. novel tehnique is used to boost the imortnt hrteristi for wireless litions reultors PSRR. The ide is lied to stbilize the ow droout reultor. The roosed reultor DO works with suly volte s low s.8 V nd rovides lod urrent of 50 m with droout volte of 00 mv. It is desined in 0.8 µm MOS tehnoloy nd the tive re on hi mesures 4 87 µm. Simultion results show tht the PSR of DO is - 60 db t frequeny of 60 KHz nd -4.7 db t frequeny of MHz. Keyword ow Droout Reultor (DO); MOSP; NM; tive feedbk; hih PSR; system on hi.. INTRODUTION Over the lst dede ower nement in interted iruits hs beome n inresinly imortnt desin onsidertion for numerous roduts eseilly those relyin on bttery ower. omlitin the ower nement sitution s more fetures et interted into roduts the number of required volte sulies inrese. Utilizin multile lol on-hi volte reultors is very romisin roh in system-on-hi develoment [] [3]. Eseilly where the ower onsumtion redution is required the ltest enertion of low dro-out liner reultors(do) offer the otil nswer for owerin iruitry in ny of the ortble devie litions suh s ell hones PDs ers notebooks mers nd other hndheld ortble systems. In ft they n rovide reulted nd urte suly voltes for noise-sensitive nlo bloks nd they re often rrned in series to swith reultors to remove the inherent noise rodued by the swithin tivity [5 8]. This dvnte kes DO widely used in ortble systems eseilly in RF iruitry to inrese bttery life nd rejet the rile in suly volte of different RF iruits. In onventionl DO s shown in fi. lre off-hi itor (0.47 µf to 4.7 µf) t outut is neessry to lote the dominnt ole t very low frequeny to hieve the frequeny omenstion nd rovide ood dynmi erforne [] 4 9]. The lre off-hi itor ouies lre hi re nd it is diffiult to interte multile DOs on sinle hi. In order to desin full on-hi DO reultor the number of omenstin itors must be minimized [3 6] nd [8]. Fiure.. Sheti of onventionl MOS DO Different methods hve been introdued reently to imrove the erforne of full on-hi DO. The nested Miller omenstion (NM) tehnique resented in [4] hs trde-off between the d loo in nd dmin ftor. In [5] the roosed DO utilize the NMR tehnique to ontrol the dmin ftor nd the non-dominnt omlex oles. The reultor is bsed on multiste mlifier nd rovides n outut volte of.8 V ximum outut urrent of 50 m nd 08 mv of line reultion; however the overshoot t the outut of DO roosed in [5] is too lre (900 mv) t no lod itne nd the settlin time is bout 5 µs. It is not reommended for So litions. In [7] the roosed struture hieves ood stbility hih d loo in but roblems still rein in this desin. The overshoot is bout 350 mv the PSRR t 0 KHz is -35 db in se this reultor is imlemented to suly the wireless system on-hi nd the rile rejetion is not ood. Moreover the omlited Miller frequeny omenstion is needed [7]. In [8] sll on- hi itor (30 F) stbilizes the roosed desin with ood hse rin but t the exense of the low d-in nd low PSRR (ower suly rejetion rtio). To void these onstrints one of the ossible solutions is the use of MOS itor [5]. In this roh the te oxide is thin ored to MIMs. MOS itors lled MOSPs hve lrer itne er unit re [5 6]. The in roblem in lrely used MOSPs in nlo litions is due to linerity issues. This is beuse of different reions of MOSFET exerienes when its te-bulk volte vries. For sll bis voltes the trnsistor is workin in deletion reion thereby levin the itor funtion of the te-bulk volte. This derdes overll erforne nd mostly dds omlexity to the desin of nlo iruits [6 7]. In the sturtion reion of MOS trnsistor the vrition itne of the MOSP with VBS=0 is neleted [5 6]. In this er we resent modified NM with NMOS in ste t PMOS trnsistor te to hre ridly the te ower 7

2 Interntionl Journl of omuter litions ( ) Volume 7 No.8 June 03 PMOS itne nd imrove hih PSRR. The MOS itor (MOSP) is used s miller itor insted of MIMs (Metl-Insultor-Metl) itors or MOM (Metl- Oxide-Metl) itors to redue the re ouied by the Miller itne without influenin stbility nd relize the full on-hi itor DO. lso n tive resistor feedbk is used to redue more hi re nd imrove ower effiieny.. PROPOSED DO The roosed DO shown in Fi. () is omosed of two in stes ower PMOS trnsistor nd the feedbk resistor network. The first ste is the error mlifier (E). The seond is NMOS in ste. m m re the on-hi tive MOS itnes. Rf nd Rf onstrut the tive feedbk resistive network. R nd model the equivlent lod resistne nd lod itne t the outut of DO. is the interonnetion lines rsiti itor nd tyilly u to 00 F. The n-well resistor hs hih vlue for its volte oeffiient whih ffet the ury in the Is [5]. Wek inversion reion MOS trnsistors re used s feedbk network resistor insted of onventionl n-well resistors in order to lowers quiesent urrent nd sve silion re... Error mlifier The desin of error mlifier (E) is more omlex when hih erforne is required to urntee the stbility nd trnsient resonse seifi tooloy is neessry. To move the dominnt ole t the outut of E. to low frequenies low outut imedne is desined. To hre ridly the itne seen t the te of ss trnsistor (y be s lre s 50 F) E must rovide suffiient outut urrent [9 0]. On the ontrry the E itself should rovide very low ower dissition nd its bis urrents must be ket s low s ossible. In this er the roosed E is the folded sode mlifier whih offers better erfornes suh s hih in enouh lod urrent to drive the ower trnsistor PMOS nd imroved PSRR hrteristi of DO... MOSP omenstion network In the full on-hi DO the lod itor modelled t drin of ss trnsistor is determined by the interonnetion lines nd tyilly u to 00 F. This itive vlue is too sll to set dominnt ole t the outut node of on-hi DO [9 nd ]. Therefore the omenstion must be hieved throuh the miller effet. In [8] the Miller omenstion tehnique is lied to omenste two-ste O m. s result the dominnt ole is led t the outut of first ste nd moved to low frequenies. The seond ole is moved wy from the oriin of the omlex frequeny lne. Due to the feedforwrd th throuh the Miller itor n undesirble zero ours on the ositive rel xis of the omlex frequeny lne. nother tehnique used in [8] to remove the zero resultin from feedforwrd throuh the omenstion itne is to insert nullin resistor in series with Miller itor. In this tehnique the nullin resistor must be set equl to the inverse of outut trnsondutne of the seond ste to remove the RHP zero. The roblem is while there is fst vrition in outut lod urrent the trnsondutne of in ste inreses. In this se it is diffiult to desin the neltion tehnique of the RHP zero. With this roh to ensure hse rin bout 60 the outut ole must be led bout. times hiher thn GB. s result the rtio of lod itor nd omenstion itor must be reter thn 0.. These rohes require lre omenstion itor nd hih in of seond ste to ensure stbility. Moreover it is diffiult to interte lre itor on-hi DO. In the reent desin of the system on-hi litions it is very desirble to interte the nlo ortion of lre mixed-sinl system in stndrd diitl MOS tehnoloies with no nlo fetures. However in order to imlement onstnt itors for nlo litions seond oly or extr metl lyers re introdued into the roess resultin in sinifint inrese in fbrition ost. Furthermore lthouh vilble metl lyers in mixed-sinl tehnoloies n be utilized for MOM (metloxide-metl) itors due to the reltively lower slin rte of the oxide between these lyers the ouied hysil re is notieble [3]. To void these onstrints one of the ossible solutions is to emloy the MOS te juntions s itor. The roblem with exloitin MOSPs in nlo litions is due to the linerity issues [5].This is beuse of different reions MOSFET exerienes when its te-bulk volte vries. In the roosed struture the te-bulk volte of MOSP is ontrolled nd determined by the desiner s demonstrted in eq. (). The MOSP is workin in the umultion reion where the itne is not deendent on the te bulk volte. The D otentil t the te nd bulk of MOSP m re iven by V V m bm B 4 N B 4 V bm V out B V 4 out N B 4 For keein the vlue of itor m indeendent to its tebulk volte the followin ondition must be reseted by the desiner. V out B B 4 N Sme s in eq. () the te-bulk volte of omenstion itor m is ontrolled by the followin ondition B 3 V 0.74 out B N Where B B nd B3 re the urrent in of urrent mirrors M4-M4 nd M7-M8 resetively nd β4 β β nd β4 re the trnsondutne rmeters of trnsistors M4 M M n M4 resetively. Ibis is the strt-u urrent of the iruit. From eq. () the te-bulk volte is indeendent of the lod in the reultion mode. In the worst se when Ilod inreses instntneously from eq. () the bulk volte of ss element dros in time or the lod itor nd omenstion itor MOSP dishrers to suly the extr urrent dended t the outut. s result the urrent in of urrent mirror M4-M4 is deresed nd the te volte of MOSP dros verifyin the ondition of the te-bulk volte V bm >0.74V s iven in eq. (). 8

3 The roblem of this tehnique reins when the suly volte dros under. V..3. Stbility nlysis The omenstion tehnique used in this struture les the dominnt ole t low frequenies nd moves the rsiti oles to hih frequenies. The HP zero is reted by the omenstion itne nd imroves the hse rin in time when the RHP zero is led t hih frequenies. The sll sinl of the roosed DO is in Fi. (b). m m m6 m8 m0 nd m3 reresent the trnsondutne of trnsistors MP M M M6 M8 M0 nd M3 resetively. ds ds ds4 nd ds3 reresent the ondutne of trnsistors MP M M4 nd M3 resetively. r r ds r ds4 r ds6 r ds8 nd r ds0 re the resistne of trnsistors MP M M4 M6 M8 nd M0 resetively. R O nd R O re the outut itors nd resistors of E nd NMOS in ste. ssumin tht << m nd m m nd >> I E the sll sinl loo in is iven by. T T 0 bs bs s T 0 * s S 3dB S R R R ( F ) F F R m m3 m O O OUT R R Interntionl Journl of omuter litions ( ) Volume 7 No.8 June 03 nd m b b m m m R m m m m m m ssumin tht is sll nd the non-dominnt oles re widely sed then the roots of the seond-order olynomil in the denomintor in eq. (4) re rewritten s P nd R m m m nd m Where the dominnt ole is t 3dB mmro RoROUTm ) 9

4 Interntionl Journl of omuter litions ( ) Volume 7 No.8 June 03 b) Fiure.. Proosed DO ) sheti of MOS DO b) sll sinl of roosed DO In the NM DO the dominnt ole is unhned but the non-dominnt oles re ushed to hih frequenies. From the olynomil in the numertor of eq. (4) nd ssumin tht the roxition in eq. (7) the two zero re exressed s Z HP m mm m Z RHP m m Inresin the lod urrent the RHP zero nd non-dominnt ole formed t the outut of DO move to hiher frequenies while the HP zero is indeendent of the lod urrent nd moved to hih frequenies by inresin the urrent in the NMOS te ste. From Eq. (7 9) the dmin ftor is derived s R m m m m m m In the NMR DO sll enhnes the dmin ftor without influenin the d loo in nd without inresin m. the dmin ftor is ontrolled by insted of m. From eq. (7) with (W/) =5 the Z HP is led t MHz s resented in fi Power suly rejetion rtio Power suly rejetion is the DO bility to suress ower suly noise from its outut. Reently there is lot of fous on desinin hih erforne eseilly low noise nd hih PSRR. Moreover the intertion level of ower nement is roortionlly inresed in time or the dimension of roess is deresed ridly nd the rsiti itnes re u to ten F. In ddition the omenstion itor dros to few F (0.8 F) in [3]. In [6] full on-hi DO is relized usin novel tehnique to boost the PSRR to -37 db t MHz. Furthermore most literture fous in nlyti of PSRR on rmeters nd devies trnsmit nd ontrol the rile from the suly to the outut on the PMOS rsiti itne neletin the effet of the rsiti itnes t the outut of error mlifier nd its hih outut ste in. In this work the error mlifier is three in ste nd the rsiti itne is in order of ten ff (bout 50 ff). In this nlysis ll soures of erturbtion re tken into onsidertion nd new tehnique is roosed to boost nd ontrol the PSRR. The PSRR erforne n be hieved with the insertion of NMOS in ste t the outut of E. The sll sinl model of PSRR is shown in fi. 3. sll sinl inut volte v dd will indue n outut volte v out. The PSRR n be seen to be m ds S ds S ds3 Ss 3 S S S PSRR Where r 0 3 m3 ds3 ds rds R OE R II s3 s d m d E k k R m o r r // r // m6 ds6 ds4 ds R II m8rds 8r R ds0 II ds ds4 k r nd m6 ds6 R 0 m E m3 m3 ds3 0

5 Interntionl Journl of omuter litions ( ) Volume 7 No.8 June 03 3 P R d m 0 E m P Where r ds4 rds4 // rds // r R ds B m R m3 R ds E s3 R s d m d 0 m mp d m R E ds 0 P m E m P nd RII RB r R m6 ds6 II m 8 ds8 ds 0 ssumin tht E >>R m 3 the d in of PSRR n be exressed s PSRR r r m ds ds ds3 D m Em3 s n be seen from eq. (5) the d in of PSRR is ontrolled by the NMOS in ste erforne. t low frequeny in low lod ondition m dereses nd lso the in of E dereses. Fiure. 3. Sll sinl model of PSRR From eq. (5) m in numertor nd denomintor hene PSRR D is not hevily ffeted by the trnsondutne vrition of ower trnsistor nd is ontrolled by the in of M3 nd M. t full lod ondition n inrese in m nd in of E enhne the PSRR D s iven in eq. (5). In se of hvin the te of MP trnsistor onneted to the outut of the E without the NMOS in ste s in [6]; PSRR D n be exressed s: m PSRR D R s the lod urrent dereses lso the trnsondutne of MP dereses the in of PSRR nd the erforne of DO is ffeted. In se of hvin PMOS in ste t outut of E s in [7]. The trnsondutne rtio of the NMOS tive inverter t te ower trnsistor is bout for the stbility onditions. The PSRR is enhned only by the oen loo in. From eq. () the PSRR dros t two brekoints Z nd Z. ssumin tht Z <<Z ds3 << m is bout 4 F nd is bout 5 F t moderte frequeny the derdtion in of PSRR is strtin t brekoint zero (Z ) nd iven by:

6 Interntionl Journl of omuter litions ( ) Volume 7 No.8 June 03 nd Z m Z P ds3 s ds s From eq. (7) the first brek oint Z t moderte frequeny is not influened by different lod onditions nd n be ushed to hih frequeny by inresin the trnsondutne of trnsistor M 3 M or deresin the in of divider NMOS M-M t te Power PMOS trnsistor. s n be seen from eq. (8) the netive time onstnt formed by m nd s is subtrted from the time of the seond zero. onsequently the seond zero moves to hiher frequenies resultin in hiher roll-off PSRR..5. Trnsient resonse nlysis In lod reultion when the lod urrent suddenly stes from low lod to its ximum vlue the inbility of the ss trnsistor to rovide the dended urrent fores the lod itor to suly the extr urrent nd the itor volte dros. The tive feedbk trnsmits the vrition in outut volte of DO to the E whih in turn downs the te volte of the ss element thus inresin V SGP nd rovidin the outut urrent dended by the outut lod. In this struture the omenstion itor forms the feed-forwrd th to injet hres in the lod itor nd dereses the dro of outut volte. The injetion of the hres stored in the itors m m d nd is exressed s i out imp i im im i R is the leke urrent in lod resistne. i R From eq. (8) the different itors ontribute to rovide the required urrent I OD by the outut lod t lod trnsient nd the dro of the outut volte of DO will be sll. Moreover when the lod urrent dereses instntneously the over urrent of the ower PMOS trnsistor hres the ll itors t outut of DO. s result the overshoot of the outut volte will be sll. In the line reultion the rile on the ower suly is trnsmitted to the outut in onventionl DO by miller itor nd te drin rsiti itor of ower PMOS. In the roosed desin the vrition in the suly volte inreses the outut imedne of the NMOS in ste t the te of ower trnsistor. s result the th from te MP to the outut of DO is lmost turned off t low frequeny. This result is imroved by the hih PSRR of the roosed DO. 3. SIMUTION RESUTS The roosed reultor DO hs been relized in 0.8 µm MOS tehnoloy. The lyout of the I DO is shown in Fi. 9 with n tive hi re of 4 µm 87 µm whih is dominted by Power MOS trnsistor. The on-hi MOS itors ouy sll re on hi. The simultion of the roosed DO ws erformed with Setre. The loo-in simultion hs been erformed with totl on-hi omenstion itor totl =4 F nd the outut itor (u to 00 F). The roosed DO is stble with ood hse rin of roxitely 8 t full lod s shown in Fi. 4. t low lod the loo s in dros to the low vlue of -39 db nd hse rin is of 67. Fi. 5 Shows the simultion of PSRR t 50 m lod urrent. The imedne inserted t the te of ower MOS trnsistor by the NMOS in ste nd trnsistor M enhnes the PSRR nd its vlue is -60 db in the rne of [0-60KHz]. s deited in Fi. 5 when simle NMOS in ste is inserted t te of ower trnsistor the PSRR t MHz is bout -34 db nd when the novel tehnique is lied the PSRR t MHz is -4.7 db. The line reultion simultion of the roosed DO is shown in Fi. 6. Fi 6() shows the line reultion for suly volte hne from to.5 V. The line reultion is bout 4 mv with settlin time of µs. Fi 6(b) shows the trnsient resonse simultion of the roosed DO with lod urrent swithin between 00 µ nd 50 m. The vrition of outut is bout 0 mv with settlin time of 3 µs for 0.005% ury. nother imortnt hrteristi of DO is the D lod reultion s shown in Fi. 8(b) when the lod urrent oes from 0 m to 50 m the vrition of the outut volte is 0.6 mv/m. In the worst se (od urrent inreses from 0 to 50 m) the outut volte vrition is bout 67 mv.

7 Interntionl Journl of omuter litions ( ) Volume 7 No.8 June 03 Fiure 4. Simulted results of roosed DO frequeny resonse. Fiure 5. Simulted PSRR erforne of the full on-hi DO. b) Fiure 6. Trnsient resonse of roosed DO ) line reultion b) lod reultion. ) 3

Interntionl Journl of omuter litions (0975 8887) Volume 7 No.8 June 03 Fi. 9. yout of the roosed full on-hi MOS DO Fi. 7. Simulted of D line reultion. Fiure 8. Simulted of D line reultion. Tble.

8 Interntionl Journl of omuter litions ( ) Volume 7 No.8 June 03 Fi. 9. yout of the roosed full on-hi MOS DO Fi. 7. Simulted of D line reultion. Fiure 8. Simulted of D line reultion. Tble.Perfornes nd orison with other works Prmeter [8] [4] [6] This work MOS Tehnoloy (µm) VIN (V) VOUT (V) Dro-out (mv) 00 N/ omenstion (F) 0.8 N/ 4 4 Ix (m) ine reultion (mv/m) -3. N 0.04% 0.6 od reultion (mv/m) 0.7 mv/4 m 0.6 Settlin time (µs) <0 N/.6 PSSR(dB) <4 tive hi re (mm ). line reultion lod reultion KHz MHz (N ) 3 (D ) Hz

9 Interntionl Journl of omuter litions ( ) Volume 7 No.8 June ONUSION In this er full on hi MOS DO usin modified NM tehnique hs been resented. The reultor iruit desin fetures n tive omenstion tehnique whih urntees the stbility throuh the full lod urrent re with hih PSRR of -60 db u to 00 KHz nd -4 db t MHz. The hih erforne is indeendent of the off-hi itor. The detiled nlysis of the roosed struture is reveled to justify the erforne of the tehnique utilized. The simultions rove the results theory. The roosed DO is ble of rovidin 50 m with dro-out volte of 00 mv t VDD of.8 V. The stbility is hieved by usin the MOSP omenstion itor in the umultion reion. The tive re is redued by 40 % ored to the stteof the-rt desins usin tehnoloies with the sme feture size. The roosed reultor is inly used s reultin ower soure for wireless litions RFID nd hre ums. 5. REFERENES [] G.. Rino-Mor nd P.E llen Otimized frequeny- Shin iruit Tooloies for DO s IEEE trns. iruits sys.ii Vol. 45 no. 6 Jun [] G.. Rinon-Mor tive itor multilier in milleromensted iruits IEEE J. Solid-Stte iruits Vol. 35 no Jn [3] Si Kit u Phili K.T.Mok nd K Nn eun ow- Droout Reultor for So With Q-Redution IEEE Journl Of Solid-Stte iruitsvo.4 NO.3 MRH 007. [4] Gbriel. Rinon-Mor Philli E. llen ow-volte ow Quiesent urrent ow Dro-Out Reultor IEEE Journl Of Solid-Stte iruitsvo.33 NO. JNURY 998. [5] W.-J. Hun S.-I. iu itor free low dorout reultors usin nested Miller omenstion with tive resistor nd -bit rormble itor rry IET iruits Devies Syst. 008 Vol [6] Robert J. Milliken Jose Silv-Mrtínez Full On-hi MOS ow-droout Volte Reultor IEEE Trnstions On iruits nd Systems I: Reulr Pers Vol. 54 No. 9 Setember 007. [7] M Hifen Zhou Fen Full on-hi nd re-effiient MOS DO with zero to ximum lod stbility usin dttive frequeny omenstion Journl of Semiondutors Vol. 3. No. Jnury 00. [8] -. Wn -. Hun nd U. F. hio liner DO reultor with modified NMF frequeny omenstion indeendent of off-hi itor nd ESR nlo Inter ir Si Proess (00) 63: [9] Ginlu Giustoli Getno Plumbo nd Ester Sitle. 50 m -nf ow Volte ow Droout Volte reultor for So litions. ERTI journl Vol. 3 Nunber 4 uust 00. [0] K. N. eun nd P. K. T. Mok itor-free MOS low-droout reultor with dmin-ftor-ontrol frequeny omenstion IEEE J. Solid-Stte iruits vol. 37 no Ot [] h. K. hv J. Silv-Mrtinez Freqeny omenstion Sheme fo DO Volte Reultors IEEE Trnstions on iruits nd Systems_I: Reulr ers VO. 5 NO. 6 June 004. [].-. hen W.-J. Hun nd S.-I iu MOS low droout reultor with dynmi zero omenstion Eletronis letrres 5 th July 007 Vol. 43 No. 4. [3] Go eishen Zhou Yumei Wu Bin nd Jin Jinhu. full on hi MOS low droout volte reultor with VS omenstion. Journl of Semiondutors Vol. 3 No. 8 uust 00. [4] Milliken R. J. Silv-Mrtinez J. & Snhez-Sinenio E. (009). Full on-hi low-droout volte reultor. IEEE Trnstions on iruits nd System 54(9) [5] H. minzdeh R. otfi nd K. Mfinezhd re-effiient ow-ost ow-droout Reultors Usin MOS itors IEEE /08/$ [6] V. Mjidzdeh K. Mitht Sily. Shmid. Dehollin nd Y. eblebii fully on-hi DO volte reultor with 37 db PSRR t MHz for remotely owered biomedil imlnts nlo Inter ir Proess (0) 67: DOI 0.007/s [7] Q. Wu W. i N. i nd J. Ren. V 70 m ow Droout Volye Reultor in 0.3 µm MOS Proess IEEE (0) //$ [8] Phili E. llen Douls R. Holber MOS nlo iruit Dedin seond edition 00(OXFORD UNIVERSITY PRESS NEW YORK). IJ TM : 5

Robust Full On-Chip CMOS Low Dropout Voltage Regulator with Active Compensation

Robust Full On-Chip CMOS Low Dropout Voltage Regulator with Active Compensation obust Full On-hip MOS ow Dropout Volte eultor with Ative oenstion Zred Kml Eletril Enineerin Deprtment Fulty of sienes nd tehnoloy Fez, Moroo zredk@hotmil.om Qjid Hssn Deprtment of Physis Fulty of sienes