A novel High Bandwidth Pulse-Width Modulated Inverter

Transcription

1 Proceedings of the 10th WSEAS International onference on IRUITS, Vouliagmeni, Athens, Greece, July 101, 006 (8085) A novel High Bandwidth PulseWidth Modulated Inverter J. HATZAKIS, M. VOGIATZAKI, H. RIGAKIS, M. MANITIS, E. ANTONIDAKIS Deartment of Electronics Technological Educational Institute of rete Romanou 3, Halea, GR73133 hania GREEE Abstract: The bandwidth of PWM inverters is limited by the outut demodulating filter. In order to synthesize comlex waveforms and modulate low distortion and high frequency sinewaves the cutoff frequency of the filter must be increased and consequently the switching frequency of the ower semiconductors and the losses must be increased also. The outut ower stage of a singlehase singlesuly PWM inverter very often consists of ower switches, imlemented with an adequate number of arallelconnected semiconductor switches. The searation of the arallelconnected semiconductor switches, that are often used, into grous (or the slit of single high ower semiconductors in more lower ower semiconductor grous) with different drive can roduce a multilevel PWM resulting a significant bandwidth increment, reduction of harmonic distortion and weight of the outut filter. This aer describes a method that roduces a fivelevel (linetoline) Sinusoidal Pulse Width Modulation (SPWM). Results show that if the inverter outut THD that is caused from the SPWM carrier is reduced by 6dB, then a double bandwidth system is resulted. Furthermore a half weight outut filter can be used to imlement a higher ower density system. The inverter outut internal resistance is also reduced u to four times comared to the conventional design, when the inverter uses negative feedback. Keywords: Modulated inverters, Pulse width modulation, Harmonics elimination 1 Introduction Power switches used in Pulse Width Modulation (PWM) systems very often consist of a number of arallelconnected semiconductor switches. This can reduce the final cost, since lower ower semiconductors are roduced in greater quantities, and thus cost less. Moreover, the characteristics of the ower system can be otimized, because aralleling ower semiconductors may achieve low ON resistance and better fit the semiconductor s current rating to the required value. ow inut voltage PWM inverters are tyical alications of arallel semiconductor switches oeration. In this aer a new way to design a singlehase inverter and to roduce a linetoline multilevel SPWM is described. Multilevel PWM schemes aroaches the sinusoidal signal more closely and thus imroving harmonic distortion [1]. The generation of a multilevel PWM by using series combination of switches, or voltage sources, is articularly suitable for high voltage and ower alications. In low and medium ower alications the multile voltage sources increase the system comlexity and the seriesconnected switches decrease the efficiency. In revious work in the field, it can be seen that adding two oosite carriers modulated with the same signal, results harmonic elimination around the carrier frequency. onsequently, arallel oeration of inverters for multilevel linetoline voltage outut and harmonics cancellation [] is most suitable for low and medium ower systems. This is alicable for current mode inverters. The use of slit inductors [3] for current sharing increases the inverter comlexity and cost. Negative feedback is ossible to be roved very beneficial in waveform synthesizing inverter systems and none of the above designs uses it. A small change in a conventional SPWM system can result harmonics elimination around the SPWM carrier. This can be achieved with the addition of two oosite carriers that are modulated

2 Proceedings of the 10th WSEAS International onference on IRUITS, Vouliagmeni, Athens, Greece, July 101, 006 (8085) with SPWM with the same signal. This aroach can be generalized in voltage mode singlehase inverters. This way, the distortion, caused by the harmonics that the modulation introduces, is reduced. Outut THD, that is caused from the SPWM carrier, is reduced by 6dB, a half weight outut filter can be used, and this is ossible to reduce the inverter outut internal resistance u to four times comared to the conventional design, if the inverter is using negative feedback. In section, of this aer the derivation of the toology and its relation with the conventional SPWM toology is resented. In section 3, the simulation results hel the comarison between the SPWM and the multilevel SPWM characteristics. The benefits of the roosed method are discussed in section 4. Finally the exerimental results of a rototye inverter are resented in section 5. Derivation of the toology In this aer a generic voltage source inverter is assumed, that utilizes a demodulating second order filter. Since the system comlexity is critical in a system that has to manage four PWM signals to roduce two SPWM signals, it will be assumed an inverter that uses SPWM, roduced from two searated comonents, one of high and one of low frequency, as described in [4]. This aroach allows the addition of the two SPWM signals by adding only the high frequency comonents. This method minimizes the changes on the conventional SPWM system and finally it coules higher frequency signals through the coils. The block diagram of the conventional SPWM system is shown in Fig.1. Inverting ircuit Inut ow Frequency Fig. 1. onventional SPWM Inverter. A Outut In the conventional SPWM system, a sinewave carrier is modulated by a triangular wave whose frequency is half the carrier frequency. Each MOSFET in Fig. 1 may reresent a number of arallelconnected semiconductor switches. To make the differences of the roosed system visible, the conventional SPWM system is converted into an equivalent circuit, shown in Fig.. In Fig., the arallelconnected semiconductor switches of the high frequency side have been searated in two grous that have the same drive. The oututs of the two grous are couled with two searate coils, which have been derived from coil of the conventional SPWM system as was shown in Fig. 1. Since this searation results in an equivalent system, all electrical stresses in Fig. are equal to those of Fig. 1. Inverting ircuit Inut ow Frequency A Outut Fig.. Equivalent circuit of a SPWM Inverter. The roosed system is based on the system of Fig. with the difference that the two searate grous on the high frequency side have different drives. The roosed system is shown in Fig. 3. o 90 φ Inverting ircuit Inut ow Frequency Fig. 3. The Proosed Inverter System A Outut The roosed system has two SPWM modulators, each of which modulates the same signal on a carrier. The two resulted SPWM carriers are generated of two triangular waves with a hase shift of 90 o. Because the carriers of the SPWM signals are chosen to have twice the frequency of the triangular wave, the 90 o hase shift of the triangular waves results in two SPWM signals with oosite carriers (180 o hase shift). The summing of the oosite carriers eliminates their main comonents and results a modulation with double carrier frequency of the oosite carriers. The resulting system may have half the coil and half the caacitor of the outut filter and acts exactly the same as a conventional SPWM system. The method can be easily used generic voltage source inverters. In the case of motor drive inverters, or other inductive load inverters that use the inductive nature of the load to demodulate the current waveform, the method will roduce a reactive current in the demodulating coils. This current will roduce additional stress to the ower comonents. The benefit of the roosed system with the addition of the oosite carriers is the cancellation of the harmonics around the carrier. By removing the caacitor without adding a load, the form of the

3 Proceedings of the 10th WSEAS International onference on IRUITS, Vouliagmeni, Athens, Greece, July 101, 006 (8085) outut voltage of the system, as simulation and exerimental results show, will be a more advantageous modulation tye than the conventional three levels SPWM. A five (5) level (multilevel) SPWM with double carrier frequency of each SPWM comonent is the result of the harmonics cancellation around the carrier. The harmonic sectrum of this modulation is in the order of a three level SPWM with the half amlitude and double the frequency of each SPWM comonent. The Total Harmonic Distortion (THD) and the first (Eq. 1) and second (Eq. ) order Distortion Factors are reduced significant it using this technique. All the distortion factors remain lower of those of the conventional system even with a half and a half outut filter. The reduction of the outut filter results a higher bandwidth and higher ower density system. 3 Simulation Results In order to verify the outut waveform and the modulation harmonics rofile, the Sice comuter rogram was used. The frequency of the triangular wave was chosen to be ten times the frequency of the modulated sinewave (Normalized arrier Frequency, F nc =10), because the low normalized carrier frequency roduces clear searated ulses and easily visible waveforms. The multilevel SPWM for m f =1 are shown in Fig. 4.The harmonic sectrum of the waveforms of the SPWM comonent are shown in Fig. 5 (a). The harmonic sectrum of the waveforms of the Multilevel SPWM of Fig. 4 is shown in Fig. 5 (b). SPWM is relaced from a threelevel SPWM, with double the frequency and half the amlitude of the SPWM comonents. The modulation factor of this signal is consequently twice the modulation factor of the SPWM comonents. 100,00% 90,00% 80,00% 70,00% 60,00% 50,00% 40,00% 30,00% 0,00% 10,00% 0,00% 100,00% 90,00% 80,00% 70,00% 60,00% 50,00% 40,00% 30,00% 0,00% 10,00% 0,00% (a) (b) Fig. 5. Harmonic sectrum of (a) the SPWM comonent and (b) the multilevel SPWM (F nc =10, m f =1) Y1 in Volts M 1.0M 0.0M 8.0M 36.0M WFM.1 Y1 vs. TIME in Secs Fig. 4. The Multilevel SPWM (F nc =10, m f =1) The five levels SPWM has double the carrier frequency (4 F nc = 40) as shown in Fig. 5b and about half the amlitude on the main harmonics of its SPWM comonents (Fig. 5a). If the modulation factor (m f ) is less than 0.5, then the fivelevel 1 m f h F nc ± F nc ± F nc ± F nc ± F nc ± F nc ± F nc ± F nc ± F nc ± F nc ± F nc ± Table 1. The normalized Fourier coefficients of the fivelevel SPWM.

4 Proceedings of the 10th WSEAS International onference on IRUITS, Vouliagmeni, Athens, Greece, July 101, 006 (8085) A comuter rogram was develoed, to be able to analyze multilevel waveforms. This rogram can calculate the Fourier coefficients with more accuracy. The five levels SPWM harmonic sectrum contains sideband clusters around the carrier harmonics (4 F nc ). The calculated normalized Fourier coefficients of the five levels SPWM are listed in Table 1. For m f =1 the dominant harmonic (d) of the fivelevel SPWM is d = 4 F nc 5. This is more than twice the frequency of the dominant harmonic of the three level SPWM (d = F nc 3). The normalized Fourier coefficients of the fivelevel SPWM dominant harmonic are about the one half of those of the threelevel SPWM. 4 Benefit Analysis The roosed method gives the exected results using an asymmetrical SPWM system, with one high and one lowfrequency side. This is an unbalanced system with all the switching losses on the HF side. The incremented losses will also increase the oerating temerature of the ower semiconductor switches, and the value of R DSON if the switches are ower MOSFETs. Higher temerature oeration of ower semiconductors will shorten their life significantly. This is the main disadvantage of the roosed method. If slower and cheaer semiconductors are used in the F side and faster and bettercooled semiconductors in the HF side, and thus it is ossible to reduce the roblem and the total cost of the inverter. Another disadvantage of the roosed method is the increase of the ower circuit comonents that comes from the slitting of the outut filter coil in two coils. Firstly we assume that the coils have a value of. The outut filter coil is usually wound around a ferromagnetic core that determines the weight and the cost of the coil. The eak energy that the coil stores is given by: I E = (1) This energy is stored in the coil core material and determines the core mass. Each of the derived coils has value of and oerates with half outut current. Thus, the stored energy in each derived coil is given by: I E I = E = (). 4 Each of the derived coils stores half the energy of the initial filter coil. It is concluded that the roosed method does not increase the mass of the coil material and thus the total inverter cost. On the other hand, slitting the filter coil gives a better weight distribution on the rinted circuit board (PB) and it is often the only way to make highower ferrite core coils using the standard ferrite cores. Sharing the filter coil resistance and inductance imroves the current sharing also, and thus the roosed method gives an advantage for using IGBTs in the HF. The amount of the total inductance in a PWM inverter is deended on the inverter alication. onstant load inverters may use only a coil for the PWM demodulation. In this case the maximum inverter outut current rile determines the minimum value of the inductance : Vs = (3) f I o where: V S is the inverter suly voltage f is the PWM carrier frequency and is the current rile IO Voltage source inverters usually oerate for long eriods without load, or under low loading. In this case low noload ower dissiation is acquired and an filter is needed in order to achieve an accetable distortion in the outut waveform. The desired attenuation of the PWM determines the exact filter toology [5]. Usually a single and a single, filter is enough and it is referred because it gives the minimum HF reactive loading. The filter cutoff frequency is roerly determined to roduce the desirable PWM carrier attenuation. The filter reactive current is minimized as the inductance is increased and the caacitance is reduced. This way the constant ower consumtion of the inverter is also minimized, but on the other hand, the inverter outut internal resistance is increased due to the significant imedance of the coil, at the low frequency (50Hz). The use of negative feedback reduces the inverter outut internal resistance and is a good choice for these tyes of inverters. Using the roosed method, the harmonic distortion, which is roduced from the carrier sidebands at the inverter outut, is reduced by 6dB because of the half carrier amlitude. The carrier

5 Proceedings of the 10th WSEAS International onference on IRUITS, Vouliagmeni, Athens, Greece, July 101, 006 (8085) frequency doubling can further reduce the harmonic distortion by 6dB if a first order filter demodulation is assumed or by 1dB if a second order filter is assumed. The decrease of the inverter outut distortion ermits the inverter outut filter to be redesigned. Even if the filter cutoff frequency is doubled, the HF comonent is still reduced by 6dB. The outut filter cutoff frequency is: 1 f0 = (4) π Doubling the outut filter cutoff frequency can be achieved by reducing to one half the values of the filter coil and the filter caacitor. The reduction of the filter coil will increase roortionally the reactive HF current at the HF half bridges. This disadvantage can be overcomed by the reduction of the low frequency reactive current. Thus, the coil reduction is ossible to increase the stress at the ower comonents of the HF side half bridges. However, the increment of this stress is not usually significant comared to the maximum outut load stress and will not necessary affect the ower semiconductors size. It must be noted that the roosed method results in a significant reduction of the HF current in the F half bridge. The reduction of the outut filter coil to the one half reduces the coil mass to the one half resulting in a higher ower density system. Also it decreases almost roortionally the inverter internal resistance while maintaining the double filtering cutoff frequency under any load. This is a significant benefit for inverters that use negative feedback, the effective feedback higher frequency is doubled and the feedback gain at the outut sinewave frequency (50Hz) can be also doubled. Doubling the feedback gain will in turn, reduce to one half the inverter outut internal resistance. onsequently, if the inverter uses negative feedback, the roosed method could achieve reduction u to ¼ in the inverter internal resistance. modulator is used. A air of double frequency (rectified) triangular waves is comared with the rectified sinewave to roduce the SPWM comonents. This results a reduction of comarators and logic gates. The exerimental inverter modulator block diagram is shown in Fig. 6. The exerimental design uses onecycle control [6], in order to be immunized of inut voltage variations and to have a stable oen loo gain and thus to have the ability to be controlled of a highseed feedback loo. The effect of using onecycle control and fast negative feedback in PWM inverters reduces the outut internal resistance and the outut harmonic distortion significantly [4,7].. f o 180 φ Inut ow Frequency Fig. 6. The exerimental inverter modulator block diagram. A Outut The sulying inverter voltage is about 350V. The HF bridge sides use fast IGBTs. The imroved current sharing of the roosed method allows their mutual contribution without oversizing them. On the other hand, IGBTs are of lower cost and higher efficiency when working in high temerature, comared to ower MOSFETs. This way the HF oeration losses do not affect the inverter efficiency significantly. The minimum measured ower consumtion of the rototye inverter was less than 15W and the efficiency was more than 93% for resistive loads in the range from 400W to 650W. The outut voltage dro from no load to 650W was negligible (less than 0.5V RMS ). 5 aboratory Imlementation and Exerimental Results In order to verify the theoretical redictions and address the roblems that aear in a real system, an exerimental singlehase, three level hase voltage and fivelevel SPWM linetoline voltage rototye inverter was constructed and tested in the laboratory. Since the system comlexity is critical and there is need to minimize the high number of comonents needed to have a wellcontrolled outut waveform, an equivalent of the above Fig.7. The five levels SPWM voltage waveform at the inverter outut without filtering.

6 Proceedings of the 10th WSEAS International onference on IRUITS, Vouliagmeni, Athens, Greece, July 101, 006 (8085) Disconnecting the caacitor of the outut filter it is ossible to obtain the waveform of the five levels SPWM shown in Fig. 7. The feedback loo that is used is minimumtime (Otye) and the loo gain is 4.7 comensated through a single ole at 50Hz. The loo gain, even though low, results a low outut internal resistance and a stable feedback under almost any ossible tye of load. The outut waveform under 600W load is shown in Fig. 8. The result is very close to ure sinewave and the most distorted art is around the zero crossings. This crossoverlike distortion is caused from the deadtime and the slightly different zero levels of the triangular waves and the rectified sinewave. This zero level difference is caused from the onecycle control circuitry. The half bridge driver integrated circuits have a constant deadtime of 500nSec. The low loo gain and the limited feedback bandwidth that is used, are the reason that the feedback does not imrove significantly this kind of distortion. Fig. 8. The inverter outut waveform with 600W load. 6 onclusions A method was develoed that roduces a multilevel linetoline outut high bandwidth inverter, with multile carrier frequency and reduced carrier amlitude. The high bandwidth of this method makes it suitable for high voltage and high ower waveform synthesizing. In an SPWM inverter the main comonents of weight and cost are the demodulating filter coil. The filter used in this method can be imlemented with a much smaller coil. The reduction of the outut filter coil is beneficial for the weight, the cost and the erformance of the inverter. When feedback is used, the multile carrier frequency also allows higher feedback gainbandwidth roduct. The rototye inverter constructed in the laboratory had high efficiency and showed excellent erformance, validating the theoretical analysis. Acknowledgments This work is cofunded by the Euroean Social Fund (75%) and National Resources of Greece (5%) through the framework of Archimedes II rogram with title Electrical aliance testing latform for testing the endurance and behavior of electrical aliances in fluctuations of their inut voltage signal by the General Secretary of Research and Technology of Greece. The authors thank Prof. Dr. David Perreault and the aboratory for Electromagnetic and Electronic Systems of the Massachusetts Institute of Technology for taking measurements and testing the ower electronics circuitry of the Testing Platform. The authors also thank Prof. Dr. Stefanos Manias and the laboratory of aboratory of Electric Machines and Power Electronics of the National Technical University of Athens. References [1] M. Razzaghi, J. Nazarzadeh, K. Y. Nikravesh, A blockulse domain technique of harmonics elimination in multilevel ulsewidth modulated inverters, Electric Power Systems Research, 46 (1998) [] G. O Sullivan, Fuell ell Inverters for Utility Alications, Power Electronics Secialists onference, 000, [3] V. G. Agelidis, H.. Goh, owdistortion variablelevel PWM technique, IEE Proceedings on Electric Power Alications, Vol. 145, No. (1998), [4] J. hatzakis, K. Kalaitzakis and N.. Voulgaris, A New Method for the Design of a lassd D to A Inverter, Proc. of the 31st Universities Power Engineering onference, 1996, 3, [5] PWM low ass filtering, Alication Note 3, APEX Microtechnology ororation. [6] K. Smedley, S. uk, Oneycle control of switching converter, Power Electronics Secialists onference, 1991, [7] E. Koutroulis, J. hatzakis, K. Kalaitzakis and N.. Voulgaris, A New Bidirectional, HighFrequency Inverter Design, IEE Proceedings on Electric Power Alications, Vol. 148, No. 4 (001)