International Journal of Advance Engineering and Research Development HIGH EFFICIENCY AND HIGH DENSITY AC-DC FLYBACK CONVERER

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1 Scientific Journal of mact Factor(SJF):.14 nternational Journal of dvance Engineering and Research Develoment Volume,ssue 5, May -015 e-ssn(o): SSN(P): HGH EFFCENCY ND HGH DENSTY C-DC FLYBCK CONVERER Keyur Dhimmar 1, Prof. Rakesh Patel 1 PG Student, G. H. Patel College of Engineering & Technology Professer, G. H. Patel College of Engineering & Technology BSTRCT: The increasing demand for distributed ower systems, lead to a focus in the imlementation of a high efficiency, high ower DC-DC converters. The continuous decrease of the outut voltage requirements from (.V, 1.5V, 1.V, 0.8V etc.) and increased outut current has laced more challenges on the ower designer. The task becomes even more challenging for high efficiency converters, wherein high ower density is required. the Flyba ck converter is widely used because of its simlicity and low cost. But the diode in the outut rectifier stage is the biggest reason because of which the ower loss occurs. The commonly used schottky diode also have a relatively large voltage dro and the refore results in a large ower loss in such low outut voltage alications. Hence, as a remedy, low voltage MOSFET s with a very low on state resistance can be used to relace the diodes in the outut stage. Hence, relacing the diode with the low on state resistance MOSFET incurs the voltage dro and as a result of which we can obtain the low voltage without any tye of ower loss. So high efficient scheme of synchronous flyback converter with synchronous rectification MOSFET was aroached and low voltage dro, less ower losses and high efficiency was achieved. Keywords: Flyback converter, schottk y diode, MOSFET 1. NTRODUCTON The conduction loss of diode rectifier contributes significantly to the overall ower loss in a ower suly, esecially in low outut voltage alications. The rectifier conduction loss is roortional to the roduct of its forward -voltage dro, VF, and the forward conduction current, F [1]. Fig -1: Forward-voltage comarison between synchronous rectifier and diode rectifier. saving by using synchronous rectifiers [1]. area has conduction loss On the other hand, oerating in the MOSFET quadrant, a synchronous rectifier resents a resistive i-v characteristics, as shown in Fig.1. Under certain current level, the forward-voltage dro of a synchronous rectifier can be lower than that of a diode rectifier, and consequently reduces the rectifier conduction loss. Due to the fact that synchronous rectifiers are active devices, the design and utilization of synchronous rectification need to be roerly addressed.. SYNCHRONOUS RECTFCTON FLYBCK CONVERTER Generally, in low-outut-voltage ower sulies, the conduction loss of the diode rectifier due to its forward voltage dro is the dominant loss comonent. n ower sulies with the outut voltage not too many times higher than the rectifier forward voltage dro, the diode rectifier loss accounts for more than 50% of the total ower loss.[]the forward-voltage dro of the diode is characteristically 0.5V for Schottky diodes and 0.75V for standard junction diodes. This large forward voltage dro leads to relatively high conduction losses in the diode and a substantial ower limit in converter.[] The rectification loss can be reduced by relacing the diode rectifier with a synchronous rectifier (SR), i.e., with a low-on resistance MOSFET. Synchronous rectification is most often alied to the buck and buck-derived isolated toologies, which are suitable for ste-down, low-outut voltage ll rights Reserved 158

2 nternational Journal of dvance Engineering and Research Develoment (JERD) Volume,ssue 5, May -015, e-ssn: , rint-ssn: Figure.1 Schematic of C-DC Flyback Converter using Synchronous Rectification flyback converter with the SR is shown in Figure For roer oeration of the converter, conduction eriods of rimary switch SW and secondary-side switch SR must not overla. To avoid the simultaneous conduction of the SW and the SR, a delay between the turn-off instant of switch SW and the turn-on instant of the SR as well as between the turn-on instant of the SW and turn-off instant of the SR must be introduced in the gate-drive waveforms of the switches. With roerly designed gate drives, the oeration of the circuit shown in Figure is identical to that with a conventional diode rectifier. Namely, during the time switch SW is turned on, energy is stored in the transformer magnetizing inductance and transferred to the outut after SW is turned off. Figure. waveforms of CCM flyback converter with SR Figure. waveforms of DCM flyback converter with ll rights Reserved 159

3 nternational Journal of dvance Engineering and Research Develoment (JERD) Volume,ssue 5, May -015, e-ssn: , rint-ssn: FLYBCK TRNFORMER DES GN.1 nut caacitor selection Because of the limited sace, to decrease the volume of inut electrolytic bulk caacitor, we assume the minimum voltage of the inut caacitor is 60% of the eak voltage; the minimum and maximum inut caacitor voltage can be calculated as below vcamax 0 5.6V vcamin V The inut electrolytic bulk caacitor will be charged when inut voltage is higher than the minimum bulk voltage and will rovide energy after the voltage reaches maximum voltage. The conduction angle can be calculated as v 180 ca min 90 asin vca max sin With an inut C line frequency of 50Hz, the discharge time of inut caacitor can be calculated as below 1 Tdis 1 f 180 T dis line T 7.01ms dis The inut bulk caacitor needs to rovide energy during the discharge time. ssuming the converter s efficiency is The maximum inut ower can be calculated as below P in Po 17 0w 0.85 The inut bulk caacitance can be calculated as below Cin C in V 4.14F Pin Tdis ca max Vca min. Transformer Design..1 Turns ratio: To calculate the turn ratio of transformer, it is assumed that the converter oerates at transition mode at the minimum inut voltage and full outut load, and the maximum duty cycle is defined as 0.5. The turn s ratio for the Flyback s transformer can be calculated as below equation Vca min Dmax n V 1 D o max n n Core selection...1primary and Secondary RMS Current Calculation The rimary eak and RMS Current is calculated as below Po in avg V in avg ca ll rights Reserved 1540

4 nternational Journal of dvance Engineering and Research Develoment (JERD) Volume,ssue 5, May -015, e-ssn: , rint-ssn: in k in avg inavg Dmax in k 0.5 in k inrms ink D inrms inrms s for secondary RMS current calculation, the secondary conduction duty cycle can be calculated as below D sec o ink n max 0.5 Dsec Dsec So the secondary winding RMS current can be calculated as below n srms ink D sec srms srms nductance selection To trade off the core s size and efficiency, the normal oeration frequency is set to 100 khz at full outut load, and the rimary inductance of transformer can be calculated as below equation L L L L Po ink f mH 80H s... Core selection Because the adater oerates in a sealed case without the advantages of an oen frame in regards to thermal dissiation, the current density should not be too high in order to avoid an excessive high temerature rise. n this case, the current density is chosen to be 6/mm. ssuming the core s fill factor K to be 0. to ensure adequate winding room and the Bmax to be 0mT, the below equation should be considered L N B ink max e N s N rms. srms k w j N From the equation above, we can derive the area roduct (P) as ll rights Reserved 1541

5 nternational Journal of dvance Engineering and Research Develoment (JERD) Volume,ssue 5, May -015, e-ssn: , rint-ssn: e L N B ink max Bmax 0mT b m L 80 H H j 6 mm. e w L ink rms n k j B max srm G 6 wb wb m m b Based on the above value, the core of an E is chosen for this 17W/5.6V adater roject design. So the number of turns can be calculated as below: N L B max ink wb N wb m N 7.58 e m 6 N 7 N 7 Ns.09 n 4.85 For the uxiliary winding turns for 1 V, the turn ration can be calculated by, Vca min Dmax n V 1 D UX max n NP NPUX n 7 NPUX N 5 PUX Choose the current density to be 6/mm based on thermal considerations. The wire can be selected as ll rights Reserved 154

6 nternational Journal of dvance Engineering and Research Develoment (JERD) Volume,ssue 5, May -015, e-ssn: , rint-ssn: S S s rms mm j 6 srms mm j 6 To get better erformance, we need to choose the wire no less than twice of the skin deth. The skin deth can be calculated as below cm 0.4mm f s From the result, the wire diameter should be less than 0.48mm. So, W G 5 wire is chosen S 5 =0.164mm S S s S S s For the rimary winding, we can choose WG 5 or thinner wire and the secondary winding needs to use 6 wires in arallel, of 5 W G.[4][5] 4. LOSS ES ND EFFCENCY 4.1For Schottky Diode: Let us consider the examle of a 17 W notebook adater. This is a flyback converter working in continuous mode. The outut voltage V 0 is 5.6 V and the maximum outut current is. The rectifier diode is an ST ower Schottky STPS0M100S. Figure shows the ideal waveforms of the diode: min =, max = 11.8 Figure 4.1C DC Flyback Converter with STPS0M100S Diode The first ste is the calculation of the average and rms currents. The forward average current is the outut current F ( V ) load Figure 4.Wave form of Current and Voltage by using ll rights Reserved 154

7 nternational Journal of dvance Engineering and Research Develoment (JERD) Volume,ssue 5, May -015, e-ssn: , rint-ssn: s illustrated in waveform, the forward current has a traezoidal shae. The formula to calculate the rms current of traezoidal waveform is given F ( RMS ) F ( RMS ) Max Min Max Min (11.8) () (11.8) () From the datasheets, To evaluate the conduction losses use the following equation P Now the Efficiency is calculated by F ( V ) F ( RMS ) P So the Schottky Diode have the efficiency of 91%. 4. For SR Mosfet: (6.06) 1.64 V0 0 ( V0 0) P (5.6) 1.64 Now assume the CSD16407Q5C is used with Vo = 5. V at, the data sheet does rovide an efficiency at the 5-V at 4- efficiency is 9.78%. total ower loss for the 5-V outut PD V W Calculate the MOSFET total conduction loss 1 Vin Pmos srms Rdson Qg Vcc fs d Vf td fs sk V0 tr f n P mos Calculate the other losses Calculate the total ower dissiated Coss Other _ Losses V in nv0 f (4.85) W P P Other _ losses W D mos Now the Efficiency is calculated by V 0 0 ( V0 0) PD (5.6) 0.91 So with the Mosfet we get the efficiency of 94%. So the efficiency is increased u to % by using synchronous Rectification ll rights Reserved 1544 s W 5. Modeling and simulation W

8 Figure 5. Simulation model of Flyback Converter in MTLB nternational Journal of dvance Engineering and Research Develoment (JERD) Volume,ssue 5, May -015, e-ssn: , rint-ssn: Simulation model of Flyback Converter in MTLB Outut Voltage Waveform of Flyback Converter in ll rights Reserved 1545

9 nternational Journal of dvance Engineering and Research Develoment (JERD) Volume,ssue 5, May -015, e-ssn: , rint-ssn: Figure 5. Outut Voltage Waveform of Flyback Converter in MTLB 5.1.Outut Current Waveform of Flyback Converter in MTLB Figure 5. Outut Current Waveform of Flyback Converter in ll rights Reserved 1546

10 Figure 5.4 Simulation model of Flyback Converter with Synchronous Rectification nternational Journal of dvance Engineering and Research Develoment (JERD) Volume,ssue 5, May -015, e-ssn: , rint-ssn: Simulation model of Flyback Converter with Synchronous Rectification in ll rights Reserved 1547

11 nternational Journal of dvance Engineering and Research Develoment (JERD) Volume,ssue 5, May -015, e-ssn: , rint-ssn: Outut Voltage waveform of Flyback Converter with SR in MTLB Figure 5.5 Outut Voltage waveform of Flyback Converter with SR in MTLB 5.. Outut Current waveform of Flyback Converter with SR in MTLB Figure 5.6 Outut Current waveform of Flyback Converter with SR in MTLB 5. Comarison Conventional Flyback Converter Flyback Converter With Synchronous Rectification Voltage 4.8 V 6. V Current Efficiency The efficiency is also increase to % of Flyback with Synchronous rectification comare to Conventional Flyback Converter 5. CONCLUS ON This roosed toology of Flyback Converter uses the Synchronous rectification MOSFET instead of Diode on secondary side. So we can minimizes diode conduction losses. The design of 100KHz frequency isolating transformer is done. The calculations for schottky diode STPS0M100S and synchronous rectification mosfet CSD16407Q5C is done, and we get % higher efficiency. The simulations of both toologies in MTLB and PSim software is done and there we also achieve % higher efficiency and get higher density oututs. mlementation of hardware is comleted and from testing we achieve higher efficiency and higher current oututs by comaring with the conventional flyback converter. ll rights Reserved 1548

12 nternational Journal of dvance Engineering and Research Develoment (JERD) Volume,ssue 5, May -015, e-ssn: , rint-ssn: [1]. li Emadi, lireza Khaligh, Zhong Nie, Young Joo Lee, ntegrated Power Electronic Converters and Digital Control, CRC Press, 009. [].Halder, T. "Study of rectifier diode loss model of the Flyback converter" npower Electronics, Drives and Energy Systems (PEDES), 01 EEE nternational Conference on, EEE, 01 []. Zhang, Michael T., Milan M. Jovanovic, and Fred CY Lee. "Design considerations and erformance evaluations of synchronous rectification in flyback converters" Power Electronics, EEE Transactions on 1, no. (1998): [4]. lication Reort High-Efficiency Synchronous Rectifier Flyback for High-Density C/DC dater Literature Number: SLU604 ugust 011 [5]. Xianhun zhang "nalysis and Design of the Flyback Transformer" The 9th nnual Conference of the EEE, ndustrial Electronics Society, 00. ECON ll rights Reserved 1549