High-Frequency Isolated DC/DC Converter for Input Voltage Conditioning of a Linear Power Amplifier

Transcription

1 High-Frequency solated DC/DC Converter for nut oltage Conditioning of a inear ower Amlifier Guanghai Gong, Hans Ertl and Johann W. Kolar Swiss Federal nstitute of Technology (ETH) urich ower Electronic Systems aboratory ETH entrum, ET/H CH-89 urich, Switzerland Tel.: Tel.: gong@lem.ee.ethz.ch kolar@lem.ee.ethz.ch Abstract Conventional linear ower amlifiers show a high outut voltage quality but are characterized by high ower losses and/or low ower density. Therefore, there is a growing interest in increasing the efficiency of linear ower amlifiers, e.g. for the realization of high ower testing voltage sources. n this aer a high-frequency isolated DC/DC converter system is roosed for the conditioning of the inut voltage of a linear ower amlifier. The outut voltage of the DC/DC converter is varied according to the outut voltage to be formed by the linear ower amlifier so that the voltage dro occurring across the ower amlifier outut transistors is reduced to low values which results in a significant increase of the total system efficiency. The control design of the DC/DC converter is for fast outut voltage resonse according to the high large bandwidth of the linear ower amlifier. The three-level inut stage of the roosed system does allow a direct connection to the outut of a three-hase three-level WM rectifier ensuring low effects on the sulying mains. The oerating rincile of the roosed system is described and the design of the outut voltage control is treated in detail. The resulting dynamic behavior of the system is analyzed by digital simulation. Finally, the theoretical considerations are verified by measurements on a.5kw laboratory rototye.. NTRODUCTON Conventional linear ower amlifiers, as schematically shown in Fig.(a), are widely emloyed in industry alications because of high outut voltage quality and excellent dynamic behavior. As shown in Fig,(b) conventional linear ower amlifiers are usually sulied with constant voltage. The time behavior of the current, voltage and instantaneous ower of the outut ower transistor T of a linear amlifier are shown in Fig.(c) for class-ab oeration. High losses occurring in the transistors do resulting in an extremely low efficiency, esecially in case of sulying reactive loads. This constitutes a serious roblem esecially for high ower systems which tend to be very bulky and exensive because of the large heat sinks required and the large ower consumtion. Consequently, there is a growing interest in increasing the efficiency of high ower linear ower amlifier systems. A very efficient way for avoiding the aforementioned drawbacks is the conditioning, i.e. variation of the suly voltage of the linear ower amlifier by a DC/DC converter according to the voltage to be generated at the linear amlifier outut [],[]. With this, the voltage dro across the linear amlifier ower transistors could be reduced considerably resulting in a corresonding reduction of the amlifier ower losses. n [] two buck converters which series connected outut voltages are roosed for achieving a variable amlifier suly voltage. However, no isolation of the outut voltage is rovided which would however be required for high ower testing systems []. Technical University ienna Det. of Electrical Drives and Machines ower Electronics Section Gusshausstrasse 7/7, A-4 ienna, Austria Tel.: j.ertl@tuwien.ac.at + CC - CC + CC - CC i T OAD b ) T v T i T v T T T ωt a ) nut ωt ωt c ) e ) Fig.: Conventional linear ower amlifier (a); basic waveforms for constant suly voltage (b); current, voltage and instantaneous ower loss of transistor T for constant suly voltage (c); variation of the suly voltage according to the time behavior of the voltage to be generated by the linear ower amlifier (d); current, voltage and instantaneous ower loss of transistor T for controlled suly voltage (e). n this aer, a new isolated DC/DC converter toology for controlling the suly voltage of a linear ower amlifier according to Fig.(d) is roosed [4]. n rincile, a DC/DC converter as shown in Fig.(a), could be emloyed for realizing a variable suly voltage. There, the inut stage is formed by a three-level DC/DC converter toology [4] i T T a d ) v T ωt //$7. EEE 99

2 which does reduce the blocking voltage stress on the rimary side ower transistors as comared to a conventional full-bridge toology. Therefore, the concet is esecially advantageous for high inut voltage alications. The system outut stage is formed by two buck converters with series connected oututs. The control of the ower amlifier suly voltages could be imlemented with underlying current control. However, the system shows a high realization effort as a center-taed transformer, four inductors and four caacitors are emloyed on the secondary side. Another drawback is the limitation of the maximum rate of change of the outut voltage by the outut filter. The roosed boost-tye toology [4] deicted in Fig.(b) is characterized by a comarably low realization effort. Only a single inductor and two caacitors are required at the secondary side. n this toology, a control loo is rovided for imressing the secondary inductor current; based on this, a tolerance band control of the suly voltages of the linear amlifier is erformed by roer gating of the ower transistors and where an excellent dynamic behavior of the voltage control can be achieved. C C C C D D D D T T T T 4 T T T T 4 D D 4 D 5 D 6 D D 4 D 5 D 6 C 4 a ) C OAD inear ower Amlifier b ) Fig.: DC/DC converter toologies for conditioning the suly voltage of a linear ower amlifier; (a) conventional realization; (b) roosed system [4]. C5 C 6 OAD inear ower Amlifier. TRANSSTOR OSSES OF A NEAR OWER AMFER FOR DFFERENT NUT OTAGE CONDTONS For the following calculations we assume the outut voltage of the linear ower amlifier v = sinωt () o resulting for the linear load in an outut (load) current io = sin( ωt ) () where is the magnitude of the load imedance and φ (,+) is the hase angle of the load current. The outut ower of the linear amlifier then is given by o =. () For a linear ower amlifier oerating in class-ab mode, the quiescent current is neglected. Therefore, the losses resulting for transistor T (cf. Fig.(c)) are nut nut T_ lin = + = ( cc ( ) cc sinωt) sin( ωt ) dωt. (4) n case the class-ab ower amlifier is sulied by the roosed converter we have for the ower losses of transistor T (cf. Fig.(e)) and φ (, +) + T_ ro = sin( ω ) ω ( sinω ) a t d t + a t (5) sin( ω ) ω [ t d t = a + ( sin )] where a = cc denotes the voltage remaining across a conducting ower transistor. For φ (, ), the ower losses in transistor T are T_ ro = ( sinω ) sin( ω ) ω a t t d t +.(6) + sin( ω ) ω = [ + a t d t a ( sin )] Combining (5) and (6) there results for φ (, +). ( T _ ro = a + sin ). (7) in T o η in T o a ) b ) Fig.: Deendency of the normalized transistor losses (normalization with reference to as defined in (8)), inut ower, outut ower and efficiency of a linear class-ab ower amlifier on the load hase angle for constant suly voltage (a) and for the roosed varying suly voltage (b). n Fig. the normalized transistor losses, the inut ower, the outut ower and the efficiency of the linear class-ab ower amlifier are given for different load conditions for the following oerating arameters: cc =, a =, =, = Ω. Here, the normalization basis of the ower is defined as = ; (8) T denotes the losses of a ower transistor. For emloying the roosed concet the transistor ower losses can be significantly reduced in comarison to constant suly voltage what does result.5 η 9

3 in a significant imrovement of the amlifier efficiency (in Fig., the efficiency is only shown for assive loads, i.e., for hase angle values φ ( /,+/)). n Fig.4 the normalized transistor ower losses are deicted in deendency on the normalized outut voltage amlitude; the oerating arameters are identical to Fig.. The reduction of the losses due to the conditioning of the suly voltage is immediately obvious. T cos =.7 cos = cos = =.7 = T o o a ) b ) cos = cos =.7 cos = =.7 = Fig.4: Deendency of the normalized transistor ower losses on the normalized amlifier outut voltage amlitude for constant suly voltage (a) and for suly voltage conditioning (b) according to Fig.(d).. CONERTER CONTRO FOR NUT OTAGE COND- TONNG OF THE NEAR OWER AMFER The control structure of the roosed converter is shown in Fig.5. The converter is formed by a three-level buck-tye inut stage and a three-level boost-tye outut stage. The inut stage outut current is controlled to a constant value where constant-frequency average current-mode control and a feed-forward of the local average value of the voltage across the ower transistors is emloyed. For controlling the boost-stage outut voltages a tolerance band control is rovided in order to achieve high dynamics at low realization effort. C C D D T T T T 4 WM D D 4 D 5 D 6 Fig.5: Control scheme of the roosed converter [4]. i Offset oltage D inear ower 7 C Amlifier v nut S + o v o OAD u S - nv Offset oltage The conduction states of the outut stage are shown in Fig.6 for ositive load current. There, the buck-tye inut stage is considered by a current source i. For realizing the control of the suly voltages of the linear ower amlifier according to Fig.5, is remaining in the on-state in case C is lower than the reference value. When the ositive suly voltage C+ due to the current consumtion of the linear amlifier reaches the corresonding reference value, is turned off (cf. Fig.6(a)) and the current i commutates into and does recharge the outut caacitor C 5. f on the other hand the voltage C+ reaches the uer boundary of the tolerance band, is turned on, accordingly diode blocks (cf. Fig.6(b)), and i free-wheels through and. i C OAD i C OAD a ) b ) Fig.6: Simlified equivalent circuit of the roosed converter and conduction states of the outut stage for ositive load current. For controlling the outut current of the buck-stage to a constant value according to the maximum load current and the maximum charging current of the caacitors C and a highly dynamic control of the linear amlifier suly voltage is achieved, however higher conduction losses do occur. n order to reduce the conduction losses, an inductor current control as deicted in Fig.7 could be emloyed [4]. There, the current reference value i is formed by the rectified linear amlifier load current i O, the charging current of C and/or deendent on the rate of change of the linear amlifier outut voltage reference value v O, and by an offset which guarantees a sufficient control margin. n case the duty cycle of or reaches values lower than % the offset is increased so that the control margin is maintained also for inaccurate re-control of the amlifier load current and/or caacitor charging current. S + S -. SMUATON AND DMENSONNG n the following the current stresses on the ower semiconductor devices is calculated and verified by digital simulation. There, the three-level isolated DC/DC converter inut stage is relaced by a basic buck stage for the sake of simlicity (cf. Fig.8). Furthermore, constant outut current of the buck-stage is assumed. U in i C T i T C D i i D D T T i T D i i D C C i C i C+ OAD inear ower Amlifier Fig.8: Simlified circuit diagram of the roosed converter for relacing the isolated inut stage by a basic buck converter. A Constant inductor current Fig.7: Schematic circuit of the buck stage outut current reference value generation. The required maximum value max of the inductor current (which occurs for caacitive loading of the amlifier) can be calculated as nut 9

4 max = + Co ω, (9) where C o is the outut caacitor of DC/DC converter. With resect to roviding a modulation margin for T and T, (cf. Fig.8) the constant inductor current is set to =. max. () B Current stress on the comonents For the calculation of the current stresses all comonents are assumed ideal, consequently the outut ower of the system is equal to the inut ower. With this, we have for the average and rms value of the current through transistor T o + T_ ro T_ =, () in T_ T _ rms =. () Furthermore, we receive for diode D =, () D_ T_ D_ D _ rms =. (4) The average and rms value of the current through D and D is + D,_ = sin( ωt ) dωt = (5) D,_ =. (6) D,_ rms Finally, we have for the average and rms value of the current through the boost transistors T and T = (7) T,_ D,_ T,_ T,_ rms =. (8) The calculated current stress on the comonents are comiled in Tab. for different load conditions with equal load imedance magnitude and 5 khz linear amlifier outut frequency. For the oerating arameters in =, a =, =, = Ω has been assumed. Furthermore, simulation results are given which show a very good corresondence to the calculated values. TABE CACUATED AND SMUATED COMARSON OF COMONENTS STRESS T D T, D, Current [A] Resistive load, Ω Current [A] nductive load,.6mh Current [A] Caacitive load,.6uf Calculated Simulated Calculated Simulated Calculated Simulated rms rms rms rms C Simulation Results Characteristic voltage and current waveforms as gained by digital simulation for ohmic, inductive and caacitive load behavior are shown in Fig.9 for in =, a =, =, and = Ω; the width of the tolerance band is set to, the linear amlifier outut frequency is set to 5 khz. n case of caacitive load (cf. Fig.9(c)) the converter outut voltages and/or the suly voltages C+ and C- of the linear amlifier cannot follow the reference value because there is no current for discharging the caacitor C or C. However, this does not affect the losses of the linear ower amlifier as the corresonding transistors do not carry any current. + C+ + C+ + C+ - C- - C- - C-..4 Time (ms)..4 Time (ms)..4 Time (ms) (a) (b) (c) Fig. 9: Simulation of the converter system shown in Fig.8 for in =, a =, =, and = Ω; (a) ohmic load; (b) inductive load; (c) caacitive load. 9

5 v c+ v c+ v c+. ms/div. ms/div. ms/div (a) (b) (c). ms/div. ms/div. ms/div (d) (e) (f) Fig. : Exerimental results for different loads; linear ower amlifier sinusoidal outut voltage amlitude:, khz outut frequency; ohmic load, 7Ω (a),(d); inductive load, 7Ω + mh in series (b),(e); caacitive load, 7Ω + µf in series (c),(f). Suly voltages show in (a),(b),(c) measured at the inut of the low-ass filter (cf. Fig.), and v CF shown in (d),(e),(f) are the actual suly voltages of the linear ower amlifier.. EXERMENTA RESUTS For verifying the theoretical considerations a.5kw rototye of the DC/DC converter shown in Fig.8 has been realized for feeding a kw linear ower amlifier (cf. Fig.4). The main comonents emloyed in the DC/DC converter are listed in Tab.. TABE ST OF OWER COMONENTS OF THE DC/DC CONERTER Name Denomination Tye Electrolytic Caacitor C 47µF/ DC CoolMOS T SWN6C ower Diode D RHRG6 nductor µh, E 4//8 CoolMOS T, T SW47N6C ower Diode D, D S9R56 Film Caacitor C, C.47µF/75 AC The exerimental verifications has been erformed for three different loads, i.e., ohmic load, 7Ω, ohmic-inductive load, 7Ω+mH in series, and ohmic-caacitive load, 7Ω+µF in series (cf. Fig.) for the following oerating arameters: inut voltage of DC/DC converter outut voltage amlitude of linear ower amlifier outut frequency of linear ower amlifier in = = f = khz. Remark: Due to switch-mode DC/DC converter oeration the linear amlifier suly voltages and v C would show a significant triangular-shaed rile comonent (cf. Fig.9). Without additional means this rile would result in a distortion of the linear amlifier outut voltage due to the non-ideal ower suly rejection ratio of the linear ower amlifier. Accordingly, as shown in Fig. a low-ass C filter in combination with a RC daming network connected in arallel to the filter caacitor is inserted in between the switch-mode DC/DC converter and the linear ower amlifier. The time behavior of the converter outut voltage and of the linear amlifier suly voltage and outut voltage is shown in Fig. for ohmic and ohmic-reactive loads. U in DC/DC Converter ow ass Filter and Daming uh uh.uf.uf 47 Ω.47uF.47uF 47 Ω OAD inear ower Amlifier nut Fig.: nsertion of a low-ass filter (including RC-daming) in between switch-mode DC/DC converter and linear amlifier inut. As the outut current of the buck inut stage (cf. Fig.8) is controlled to a constant value the variation of the linear ower amlifier suly voltage can be with high dynamics. The exerimental results for oeration of the linear amlifier at 5 khz outut frequency and outut voltage amlitude are deicted in Fig.. The excellent transient behavior of the system is also clearly shown in Fig. where a sawtooth-shaed outut with a sloe of the trailing 9

6 v c+ A/div 5µs/div (a) v CFi CF+ A/div 5µs/div (b) Fig.: Exerimental results for generating a sinusoidal 5kHz linear amlifier outut v O; (a) waveforms at the inut of the suly voltage low-ass filter (cf. Fig.), (b) after low-ass filtering. v c+. ms/div (a). ms/div (b) Fig. : Exerimental results for generating a sawtooth-shaed khz linear amlifier outut v O; ratio of rise-time to fall time is :; (a) waveforms at the inut of the suly voltage low-ass filter (cf. Fig.), (b) after low-ass filtering. edge of /µs is generated and the switch-mode system does accordingly adjust the suly voltage still leaving some voltage margin so that no distortion of the linear amlifier outut does occur. A rototye of the roosed DC/DC converter and of the linear ower amlifier is shown in Fig. 4 where the comarably low volume (overall dimensions: cm 9cm cm) of the novel switch-mode converter should be ointed out. results taken from a.5kw laboratory rototye do verify the high dynamics of the linear amlifier suly voltage control which makes the roosed system alicable for linear amlifiers generating large amlitude outut s in the khz range. n the course of further research the exerimental hardware will be extended to the toology shown in Fig.(b), i.e. an isolated threelevel buck-tye DC/DC converter will be emloyed as inut stage. The efficiency of this system including the ower amlifier will be comared to a conventional linear ower amlifier with assive ower suly and/or constant suly voltage. Furthermore, the current control scheme deicted in Fig.7 will be imlemented in the DC/DC converter rototye in order to further reduce the system losses. REFERENCES. CONCUSONS Fig. 4 Exerimental hardware. A new DC/DC converter toology for conditioning the suly voltages of a linear ower amlifier has been roosed which does allow to reduce the voltage dro across the linear amlifier ower transistors to low values what does considerably reduce the amlifier ower losses, esecially in case of sulying reactive loads. The current stresses on the active comonents of the roosed system are calculated analytically what does rovide an excellent basis for the converter design. Digital simulations and exerimental [] Kashiwagi, S., A High-Efficiency Audio ower Amlifier Using a Self-Oscillating Switching Regulator, EEE Trans. ndustry Alications, ol.4,. 96-9, 985. [] Jeong, J.H., Kim, G.H., Min, B.R., et al., A high efficiency class A amlifier accomanied by class D switching amlifier, Record of the 8th EEE ower Electronics Secialists Conference, ol.,. - 6, 997. [] Taylor, B.E., The High ower Amliverter, Tomorrow s High Efficiency Audio ower Amlifier, roc. of the ower Conversion Conf., Nuremberg, Germany , 994. [4] Kolar, J.W., and Gong, G, orrichtung zur otentialtrennung und ausgangsabhängigen Führung der ersorgungssannungen eines inear-eistungsverstärkers, Swiss atent Alikation, filed Aril. [5] inheiro, J.R., and Barbi,., The three-level S-WM DC-to-DC converter, EEE. Trans. ower Electronics, ol.8, ,