1.2 Power MOSFET and IGBT

Transcription

1 Most alications for currents of some 10A use transistors with silicon chis that are integrated in otentialfree ower modules. These modules contain one or several transistor systems, diodes adated to the transistors (freewheeling diodes) and, if required, assive comonents and intelligence, see chater Desite the disadvantage of oneside cooling, ower modules are maintaining their hold in highower electronics against the meanwhile also available disccells with IGBTs and diodes, which are able to dissiate about 30 % more of the heat losses by twoside cooling. This is mainly due to integrated, tested isolation of the chis to the heatsink, ossible combinations of different comonents in one module and low costs due to batch roduction, aart from their easy assembly. IGBTmodules esecially, are going through a ermanently successful rocess of market enetration accomanied by increased efficiency, withstanding the new and further develoment of other cometitive ower semiconductors. Today IGBTmodules are roduced managing a forward blocking voltage of 6.5 kv, 4.5 kv, 3.3 kv and 2.5 kv, e.g. 3.3 kv/2.4 ka [192], [196]. IGBT converters (multilevelswitch and IGBTs in series connection) for the MWrange u to more than 6 kv suly voltage can already be roduced now. MOSFETs, on the other hand, are being develoed for even higher frequency alications; also in the high current range more than 500 khz can be roduced with the corresonding wirings and assembly toologies. Aart from the small ower alication range, for which chionchi solutions are gaining more and more imortance, IGBT and MOSFETmodules are the basic comonents for the integration of comlete electronic and also mechatronic systems in future. 1.2 Power MOSFET and IGBT Different structures and functional rinciles In the following descritions we restrict ourselves to nchannelenhancement ower MOSFETs and IGBTs (enhancement transistors), reresenting the majority of transistors used in ower modules. If a ositive control voltage is alied, a conducting channel with electrons as charge carriers (majority carriers) is generated within the existing conducting silicon. Without alying a control voltage, these comonents would block (selfblocking). Other designs, which will not be dealt with any further in this chater, are channelenhancement transistors (induction of a ositively charged channel within silicon by alying negative control voltage/selfblocking) and n and channel deletion tyes (deletion transistors), which turn on without alied control voltage (selfconducting). In these transistors, the control voltage generates a sace charge zone that cuts off the channel and interruts the main current flow. In most alications the vertical structures shown in Figure 1.2 and Figure 1.4 are used, where gate and source (MOSFET) or emitter (IGBT) are located on to of the chi, whereas the chi bottom serves as drain (MOSFET) or collector connection. The load current is conducted vertically through the chi outside the channel. The ower MOSFETs and IGBTs shown in the sections have a lanar gate structure, i.e. a lateral (horizontal) conductive channel is generated in case of onstate. The lanar gate, which has been further develoed to the doubleimlanted gate in modern highdensity transistors, is the dominating gate structure for ower MOSFETs and IGBTs still today. 14

2 However, recently develoed transistors have a trenchgatestructure, with the gates integrated vertically to the structure. During onstate, a vertical channel is generated on both sides of the gate. These and other new develoments not dealt with any further in this chater will be discussed in chater The lateral MOSFET and IGBTstructures taken over from microelectronics also have their drain or collector layer allocated on their chi surface as n(mosfet) or well. Load current is conducted horizontally through the chi. Since the nzone can be isolated to the ICsubstrate by an oxide layer, several isolated MOSFETs or IGBTs may be integrated together with other structures on one chi. Due to the fact that lateral transistors are only able to generate a current density of about 30 % of that in vertical structures and, thus, require more sace on the assembly, they are used referably in comlex, monolithic circuits. The structural design of the ower MOSFET (Figure 1.2) as well as the IGBT (Figure 1.4) consists of a siliconmicrocellular structure of u to 820,000 cells er cm 2 (latest hightech 60 VMOSFETs) or about 100,000 cells er cm 2 (highvoltageigbts) distributed over a chi surface of cm 2. The cellsections show the analogue structure of the MOSFET and IGBT control zones. The n zone has to take u the sace charge zone during offstate and accommodates charged wells with a low marginal ( ) and a high central ( ) doing. These wells also include n siliconlayers which are connected to the aluminium metallized source (MOSFET) or emitter (IGBT) electrode. A control zone (gate) consisting, for examle, of n olysilicon is embedded in a thin isolation layer of SiO 2 above the n areas. By alying a sufficient ositive control voltage between gate and source (MOSFET) or emitter (IGBT), an inversion layer (nconducting channel) is generated in the area below the gate. Electrons may be conducted from source or emitter to the n driftarea via this channel. In contrast to the identical structure of MOSFET and IGBT including the n zone, there are differences regarding the third electrode, which will determine all further functions. 15

3 PowerMOSFET [277] B A D Drain SiO 2 d n G S D Drain G n n n n B A Drain a) b) S AB: wide of elementary cell d: length of channel Figure 1.2 PowerMOSFET (SIPMOS Siemens) a) MOSFETcell with charge flow during onstate b) Common switch symbols Figure 1.2 exlains the structure and function of a vertical nchannelenhancement ower MOSFET with lanar gate structure. The MOSFET s layer structure described above results from eitaxial, imlantation and diffusion rocesses on a substrate of n conductive silicon material with a drain contact on its reverse side. The electrons flowing in the electrical voltage field between drain and source are attracted by the drain connection, thus absorbing the sace charge zone; consequently, the drainsource voltage will decrease and the main current (drain current) will be able to flow. Since the electrons are conducting current by 100 % and are majority charge carriers in the n drift area, the highly resistive n zone will not be flooded by biolar charge carriers; the MOSFET is a uniolar comonent. Whereas the drainsource onresistance of lowvoltage MOSFETs is comosed of single cellular resistances about 5 % to 30 %, 95 % of the R DS(on) of high reverse voltage MOSFETs result from the n eitaxial area resistance. Therefore, onstate voltage dro V DS(on) = I R with I D : drain current and D DS(on) R DS(on) k V (BR)DS 9 A 1 = with k: material constant, e.g. k = for a chi surface of 1 cm 2 ; V (BR)DS : Drainsource forward breakdown voltage as a theoretical limit value of the actually available MOSFETs is always higher for MOSFETs from about V offstate voltage than for comarable biolar comonents and the current 16

4 carrying caacity is lower. Recently develoed structures with imroved arameters will be dealt with in chater On the other hand, there are no storage effects because the majority charge carriers are exclusively resonsible for charge transortation. Very short switching times may be roduced however, requiring rather high control currents for changing the internal caacitances in the case of extensive comonents (high voltage/ high current) with about 0.3 µc er cm 2 chi surface. The caacitances resulting from the hysical structure of the MOSFETs are the most imortant arasitic elements in Figure 1.3; their influence on the characteristics of comonents will be described in the corresonding chaters. C GS R G SiO 2 D (Drain) n R W C GD R D C DS C GD C DS R D n n n n G () R G C GS R W "Inverse Diode" Drain S () a) b) Figure 1.3 PowerMOSFETcell with the most imortant arasitic elements a) Parasitic elements within the cellular structure b) Equivalent circuit with arasitic elements The follwing table exlains causes and designations of the arasitic caacitances and resistances in Figure 1.3: Symbol Designation C GS source caacitance Overlaing gate and source metallization; deendent on gatesource voltage; indeendent of drainsource voltage C DS Drainsource caacitance Junction caacitance between n drift zone and well; deendent on cell surface, drainsource breakdown voltage and drainsource voltage G GD drain caacitance Miller caacitance; generated by overlaing of gate and n drift zone R G resistance (internal) Polysilicongate resistance; in modules with several transistor chis often additional series resistors are needed to minimize oscillations between chis R D Drain resistance Resistance of n zone; often main art of MOSFETonstateresistance R W Lateral resistance of well Baseemitter resistance of arasitic nn biolar transistor 17

5 IGBT [278] B B A A SiO 2 n n d n G G C E C E AB: wide of elementary cell a) d: length of channel b) Figure 1.4 IGBT with NPTstructure a) IGBTcell with charge distribution during onstate b) Common switch symbols Figure 1.4 exlains structure and function of a vertical nchannelenhancement IGBT with lanar gate and NPT(NonPunchThrough)structure. In contrast to MOSFETs, IGBTs are equied with a conductive area with connection to the collector below the nzone. After having assed the n drift area, the electrons enter the area, thus arranging for ositive charge carriers (holes) to be injected from the zone to the n zone. The injected holes will flow directly from the driftarea to the emittercontact as well as laterally to the emitter assing the MOSchannel and the nwell. In this way the n drift area will be flooded with charge carriers which are conducting the main current (collector current); this charge enhancement will lead to a sace charge reduction and, consequently, to a reduction of the collectoremitter voltage. though, comared to the ure ohmic onstate behaviour of the MOSFET, the IGBT has an additional threshold voltage at the collector njunction layer, the onstate voltage of highvoltage IGBTs (from about 400V) is lower than that of MOSFETs because of the enhancement of minority carriers in the highly resistive n zone. In comarison to MOSFETs, IGBTs may be designed for considerably higher voltages and currents for similar chi surfaces. On the other hand, the surlus storage charge Q S that has not been extracted during the collector voltage increase eriod has to recombine in the n zone during turnoff. Q s has an almost linear characteristic in the lowcurrent range and rises roortionally to the forward current in the rated current and overcurrent range according to a radical law. [282]: Q s I in the lowload forward current range Q s I 0.5 in the rated current and overcurrent range Q s V (BR)CE 18

6 Storage charge enhancement and deletion rocesses cause switching losses, a delay time (storage time) and a collector tailcurrent during turnoff. (see chater 1.2.3). Aart from the NonPunchThrough structure (NPT) shown in Figure 1.3, the Punch Through (PT)structure is also alied in IGBTs today. It was the concetional basis for the first IGBTs. Basically, the two structures differ in the PTIGBT s highlydoed n layer (buffer layer) between n and zone and in the manufacturing rocess. Whereas the n and n layers in a PTIGBT are usually generated on a substrate by an eitaxial rocedure, the basis of the NPTIGBT is a thin, hardly doed nwafer, at the reverse side of which the collector zone is generated by imlantation. The MOScontrol zones on to of both IGBTs are identical in their lanar structure. Figure 1.5 comares both IGBTstructures and their electrical field characteristics during offstate. E n n n n A x n n a) E n n n x n b) Figure 1.5 IGBTstructures and offstate electrical field characteristics [193] a) PTIGBT b) NPTIGBT 19

7 The sace charge zone in a PTIGBT or IGET (E: eitaxial structure) sreads over the whole n area during offstate. In order to kee the eitaxial layer as thin as ossible for high offstate voltages also, the electrical field is reduced by the highly doed n buffer at the end of the n drift area. The n drift area in an NPTIGBT or IGHT (H: homogeneous structure) is dimensioned large enough so that the electrical field can be comletely discharged within the n drift area during offstate at maximum offstate voltage. The electrical field cannot sread over the whole n zone (unch through) within the ermissible oeration range. For further exlanations on IGBTfunctions and the deviating characteristics of PT and NPTcomonents it is, first of all, necessary to study the equivalent circuit resulting from the IGBTstructure (Figure 1.6b). C GE R G C () SiO 2 n R W C GC R D C GC C CE C CE R D G () R G C GE R W n n a) b) E () Figure 1.6 IGBTcell (NPTstructure) with the most imortant arasitic elements a) Parasitic elements in the cellular structure b) Equivalent circuit with arasitic elements Causes and designations of the arasitic caacitances and resistances in Figure 1.6 are analogous to Figure 1.3. Symbol Designation C GE emitter caacitance Overlaing gate and source metallization; deendent on gateemitter voltage; indeendent of collectoremitter voltage C CE emitter caacitance Junction caacitance between n drift zone and well; deendent on cell surface, drainsource G GC breakdown voltage and drainsource voltage collector caacitance Millercaacitance: generated by overlaing of gate and n drift zone R G resistance (internal) Polysilicongate resistance; in modules with several transistor chis often additional series resistors are needed to minimize oscillations between chis R D Drift resistance Resistance of n zone (base resistance of a ntransistor) 20

8 Symbol Designation R W Lateral resistance of well Baseemitter resistance of the arasitic nnbiolar transistor Aart from internal caacitances and resistances, the equivalent circuit of the IGBT also shows features of the ideal MOSFET and the arasistic nntransistor: n emitter zone (emitter)/ well (base)/ndrift zone (collector) with the lateral well resistance below the emitters as baseemitter resistance R W. In addition to that a ntransistor may be generated by sequence of collector (emitter)/ n drift (base)/ well (collector), which reresents together with the nntransistor thyristor circuit. Latchu of this arasitic thyristor may haen basically during onstate (when a critical current density is exceeded, which decreases with rising chi temerature) and also during turnoff (dynamic latchu due to the increased hole current comared to onstate oeration), as soon as the following latchu reconditions are met: ( α α ) 1 M nn n = with α, α = α γ n nn T E M: multilication factor; α nn, α n : current gain of the single transistors in base circuit; α T : base transortation factor; γ E : emitter efficiency This will lead to a loss of controllability of the IGBT and, therefore, to its destruction. The following design measures will reliably revent latchu in modern IGBTs under all ermissible static and dynamic oeration conditions; the turnoff current density of dynamic latchu, for examle, is about 15 times the rated current density. At first, the baseemitter resistance R W of the nntransistor is reduced by means of high doing of the well directly below the nemitters, and shortening of the nemitters to such an extent, that the threshold voltage of the nntransistor baseemitter diode will not be reached in any ermissible state of oeration. Furthermore, the hole current (nntransistor base current) is ket on a minimum level by a low current amlification in the ntransistor. However, switching behaviour and ruggedness have to be otimized with the onstate characteristics which also deend considerably on the ntransistor design. This has been roduced for PT and NPTIGBTs in different ways [278]. For PTIGBTs, the efficiency (emitter efficiency) of hole injection of the zone into the n drift area is very high, since the substrate is very thick and highly doed. The ncurrent amlification may only be lowered with the hel of the base transortation factor (n drift zone, n buffer), imlementing additional recombination centres (e.g. by gold doing or electron beam radiation) to reduce charge carrier life time in the n zone. The hole current adds u to % of the total current. In case of NPTIGBTs the emitter zone generated at the collector by imlantation is much thinner than the PTIGBTsubstrate. Therefore, the doing material concentration can be exactly dimensioned during wafer roduction. The very thin layer guarantees a low emitter efficiency (γ E = 0,5) of the ntransistor, so that it is not necessary to lower the base transortation factor by reducing charge carrier life time. The hole current sums u to % of the total current. 21