ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems. Today. MOSFET Ids vs. Vgs, Vds MOSFET. Preclass. MOSFET I vs.
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1 ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 2: September 7, 2012 Transistor Introduction Today MOSFET Capacitive and resistive loads Zero-th order transistor model Good enough for [what?] Diagnostic Quiz (12:40pm) 1 2 MOSFET MOSFET Ids vs. Vgs, Vds Vgs = Vg-Vs Vds = Vd-Vs Metal Oxide Semiconductor Field Effect Transistor New device Primary active component for the term Three terminal device Voltage at gate controls conduction between two other terminals (source, drain) I DS 3 4 MOSFET I vs. Vgs, Vds Will dig into understanding during term Today: simple ways to reason about gross behavior Static/DC Preclass What voltage do the cases converge to? 5 6 1
2 Conclude? DC/Steady-State Ignore the capacitors Quasistatic Static inputs (and circuit) unchanging, how does it settle? Dynamic what happens when things change Quasi-Static inputs transition, circuit responds, and settles Dynamic transition to roughly static states
3 Quasistatic Relevance? How relevant to a combinational digital circuit? How relevant to a clocked digital circuit? Zero-th Order MOSFET Ideal Switch Vgs > Vth conducts Vgs < Vth does not conduct Vth threshold voltage Gate draws no current from input Loads input capacitively Zero-th Order MOSFET N-Type, P-Type MOSFET I DS N negative carriers electrons Switch turned on positive Vgs P positive carriers holes Switch turned on negative Vgs Vthp<0 Vgs<Vthp to to conduct Vgs = Vg-Vs Symmetry Symmetry Device is symmetric Doesn t know source from drain Think of it as a resistor: Also doesn t know difference between two ends Which way does current flow? N-type: Electrons are carriers Electrons charged? negative Electrons flow from src drain From which voltage? Lowest voltage highest Drain is? most positive terminal 17 Device is symmetric Doesn t know source from drain Think of it as a resistor: Which way does current flow? P-type: Holes are carries Holes charged how? positively Holes flow from src drain From which voltage? Highest voltage lowest Drain is? most negative terminal 18 3
4 Zero-th Order MOSFET Why zero-order useful? I DS n Vgs = Vg-Vs 21 Vgs=Vg-Vs=Vdd > Vthn 22 Vgs=Vdd > Vth 23 Vgs=Vdd > Vth 24 4
5 25 26 Vgs=0 < Vthn 27 Vgs=0 < Vthn 28 Vgs=-Vdd < Vthp Vin=0<Vth Vout=Vdd Vgs=0 < Vthn 29 Work on board 30 5
6 Vin=0<Vth What function? Buffer Vin=Vdd Vout=Vdd Vin=0 Vout=0 V2=Vdd Vout= Why Zeroth Order Useful? Why adequate? Allows us to reason (mostly) at logic level about steady-state functionality of typical gate circuits Make sure understand logical function (achieve logical function) before worrying about performance details 33 Static analysis can ignore capacitors Capacitive loads resistances don t matter Feed forward for gates don t generally have loops can work forward from known values Logic drive rail-to-rail Don t have to reason about intermediate voltage levels 34 Delay Dynamics Behavior if not What not tell us? Capacitively loaded Acyclic (if there are Loops) Rail-to-rail drive Admin HW1 out Can begin reasoning through pr 1 from today s lecture Gate design next week One more piece of advice: Should be thinking about this course every day
7 Big Ideas MOSFET Transistor as switch Purpose-driven simplified modeling Aid reasoning Diagnostic Quiz Sanity check Simplify design Turnin Quiz and feedback before leaving (do not turnin preclass keep that)
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