NCP3337. Ultra High Accuracy, Low Iq, 500 ma with Power Good Low Dropout Regulator

Transcription

1 Ultra High Accuracy, Low Iq, 5 ma with Power Good Low Dropout Regulator The NCP3337 is a high performance, low dropout regulator. With accuracy of ±.9% over line and load and ultra low quiescent current and noise it encompasses all of the necessary features required by today s consumer electronics. This unique device is guaranteed to be stable without a minimum load current requirement and stable with any type of capacitor as small as 1. F. The NCP3337 also comes equipped with sense and noise reduction pins to increase the overall utility of the device. The NCP3337 offers reverse bias protection. Features High Accuracy Over Line and Load (±.9% at 5 C) Ultra Low Dropout oltage at Full Load (6 m typ) No Minimum Output Current Required for Stability Low Noise (33 rms w/ nf C nr and 5 rms w/out C nr ) Low Shutdown Current (< 1 ma) Reverse Bias Protected.9 to 1 Supply Range Thermal Shutdown Protection Current Limitation Requires Only 1. F Output Capacitance for Stability Stable with Any Type of Capacitor (including MLCC) Available in 1.8,.5, 3.3, 5. and Adjustable Output oltages Power Good Output These are Pb Free Devices Applications PCMCIA Card Cellular Phones Camcorders and Cameras Networking Systems, DSL/Cable Modems Cable Set Top Box MP3/CD Players DSP Supply Displays and Monitors 1 MARKING DIAGRAM P3337 xxx ALYW DFN MN SUFFIX CASE 485C Pin 1,. out 3. Sense / ADJ 4. GND 5. PWRG 6. NC 7. NR 8. SD 9,. in EP, GND xxx = Specific Device Marking A = Assembly Location L = Wafer Lot Y = Year W = Work Week = Pb Free Package (Note: Microdot may be in either location) ORDERING INFORMATION See detailed ordering, marking and shipping information in the package dimensions section on page 15 of this data sheet. Semiconductor Components Industries, LLC, 11 September, 11 Rev. 1 1 Publication Order Number: NCP3337/D

2 OFF in C in 1. F ON R1 k 6 NC SD IN IN PWRG EP 7 NR SENSE 5 EP 4 C nr (Optional) OUT OUT GND 3 1 C out 1. F + out PWRG Figure 1. Typical Fixed ersion Application Schematic OFF ON 8 6 NC SD 7 NR C nr (Optional) ADJ 3 R 9 IN OUT R3 in C in 1. F + R1 k IN PWRG EP 5 EP 4 OUT GND 1 C out 1. F + out PWRG Figure. Typical Adjustable ersion Application Schematic

3 Comp. PWRG in SD Enable Block oltage Reference NR Current and Thermal Protection Circuit Error Amplifier Series Pass Element with Reverse Bias Protection out NCP3337 Adjustable ADJ GND Figure 3. Block Diagram, Adjustable Output ersion Comp. PWRG in SD Enable Block oltage Reference NR Current and Thermal Protection Circuit Error Amplifier Series Pass Element with Reverse Bias Protection out SENSE NCP3337 Fix GND Figure 4. Block Diagram, Fixed Output ersion 3

4 PIN FUNCTION DESCRIPTION Pin No. Pin Name Description 1, out Regulated output voltage. Bypass to ground with C out 1. F 3 SENSE/ADJ For output voltage sensing, connect to Pins 1 and.at Fixed output oltage version Adjustable pin at Adjustable output version 4 GND Power Supply Ground 5 PWRG Power Good 6 NC Not Connected 7 NR Noise Reduction Pin. This is an optional pin used to further reduce noise. 8 SD Shutdown pin. When not in use, this pin should be connected to the input pin. 9, in Power Supply Input oltage EPAD EPAD Exposed thermal pad should be connected to ground. MAXIMUM RATINGS Rating Symbol alue Unit Input oltage in.3 to +16 Output oltage out.3 to in +.3 or * PWRG Pin oltage PWRG.3 to +16 Shutdown Pin oltage sh.3 to +16 Junction Temperature Range T J 4 to +15 C Storage Temperature Range T stg 5 to +15 C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. NOTE: This device series contains ESD protection and exceeds the following tests: Human Body Model (HBM) JESD A114 B Machine Model (MM) JESD A115 A *Which ever is less. Reverse bias protection feature valid only if ( out in ) 7. THERMAL CHARACTERISTICS Characteristic Test Conditions (Typical alue) Min Pad Board (Note 1) 1 Pad Board (Note 1) Junction to Air, JA C/W Junction to Pin, J L C/W 1. As mounted on a 35 x 35 x 1.5 mm FR4 Substrate, with a single layer of a specified copper area of oz (.7 mm thick) copper traces and heat spreading area. JEDEC 51 specifications for a low and high conductivity test board recommend a oz copper thickness. Test conditions are under natural convection or zero air flow. Unit 4

5 ELECTRICAL CHARACTERISTICS 5 ( out = 5. typical, in = 5.4, T A = 4 C to +85 C, unless otherwise noted, Note ) Characteristic Symbol Min Typ Max Unit Output oltage (Accuracy) in = 5.4 to 7.3, I load =.1 ma to 5 ma, T A = 5 C out.9% % 5.45 Output oltage (Accuracy) in = 5.4 to 7.3, I load =.1 ma to 5 ma, T A = C to +85 C out 1.4% % 5.7 Output oltage (Accuracy) in = 5.4 to 7.3, I load =.1 ma to 5 ma, T A = 4 C to +15 C Line Regulation in = 5.4 to 1, I load =.1 ma Load Regulation in = 5.4, I load =.1 ma to 5 ma out 1.5% % 5.75 Line Reg.4 m/ Load Reg.4 m/ma Dropout oltage (See Application Note) I load = 5 ma I load = 3 ma I load = 5 ma I load =.1 ma DO Peak Output Current (See Figure 14) I pk ma Short Output Current (See Figure 14) in < 7, T A = 5 C I sc 93 ma Thermal Shutdown / Hysteresis T J 16/ C Ground Current In Regulation I load = 5 ma (Note 4) I load = 3 ma (Note 4) I load = 5 ma I load =.1 ma In Dropout in = 3., I load =.1 ma In Shutdown SD = Output Noise C nr = nf, I load = 5 ma, f = Hz to khz, C out = F C nr = nf, I load = 5 ma, f = Hz to khz, C out = F Power Good oltage Low Threshold Hysteresis High Threshold I GND I GNDsh noise elft Power Good Pin oltage Saturation (I ef = 1. ma) efdo m Power Good Pin Leakage I efleak 1 Power Good Blanking Time (Note 3) t ef 5 s Shutdown Threshold oltage ON Threshold oltage OFF SD SD Input Current, SD = to.4 or SD =. to in I SD.7 1 Output Current In Shutdown Mode, out = I OSD m ma rms % of out Reverse Bias Protection, Current Flowing from the Output Pin to GND ( in =, out_forced = 5 ) I OUTR. Performance guaranteed over the operating temperature range by design and/or characterization, production tested at T J = T A = 5 C. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible. 3. Can be disabled per customer request. 4. T A must be greater than C. 5

6 ELECTRICAL CHARACTERISTICS 3.3 ( out = 3.3 typical, in = 3.7, T A = 4 C to +85 C, unless otherwise noted, Note 5) Output oltage (Accuracy) in = 3.7 to 7.3, I load =.1 ma to 5 ma, T A = 5 C Characteristic Symbol Min Typ Max Unit Output oltage (Accuracy) in = 3.7 to 7.3, I load =.1 ma to 5 ma, T A = C to +85 C Output oltage (Accuracy) in = 3.7 to 7.3, I load =.1 ma to 5 ma, T A = 4 C to +15 C Line Regulation in = 3.7 to 1, I load =.1 ma Load Regulation in = 3.7, I load =.1 ma to 5 ma Dropout oltage (See Application Note) I load = 5 ma I load = 3 ma I load = 5 ma I load =.1 ma out out out.9% % % % % % 3.35 Line Reg.4 m/ Load Reg.4 m/ma DO Peak Output Current (See Figure 14) I pk ma Short Output Current (See Figure 14) in < 7, T A = 5 C I sc 9 ma Thermal Shutdown / Hysteresis T J 16/ C Ground Current In Regulation I load = 5 ma (Note 7) I load = 3 ma I load = 5 ma I load =.1 ma In Dropout in = 3.7, I load =.1 ma In Shutdown SD = Output Noise C nr = nf, I load = 5 ma, f = Hz to khz, C out = F C nr = nf, I load = 5 ma, f = Hz to khz, C out = F Power Good oltage Low Threshold Hysteresis High Threshold I GND I GNDsh noise elft Power Good Pin oltage Saturation (I ef = 1. ma) efdo m Power Good Pin Leakage I efleak 1 Power Good Blanking Time (Note 6) t ef 5 s Shutdown Threshold oltage ON Threshold oltage OFF SD SD Input Current, SD = to.4 or SD =. to in I SD.7 1 Output Current In Shutdown Mode, out = I OSD.7 1 Reverse Bias Protection, Current Flowing from the Output Pin to GND ( in =, out_forced = 3.3 ) 1.4 m ma rms % of out I OUTR 5. Performance guaranteed over the operating temperature range by design and/or characterization, production tested at T J = T A = 5 C. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible. 6. Can be disabled per customer request. 7. T A must be greater than C. 6

7 ELECTRICAL CHARACTERISTICS.5 ( out =.5 typical, in =.9, T A = 4 C to +85 C, unless otherwise noted, Note 8) Characteristic Symbol Min Typ Max Unit Output oltage (Accuracy) in =.9 to 6.5, I load =.1 ma to 5 ma, T A = 5 C out.9% %.53 Output oltage (Accuracy) in =.9 to 6.5, I load =.1 ma to 5 ma, T A = C to +85 C out 1.4% %.535 Output oltage (Accuracy) in =.9 to 6.5, I load =.1 ma to 5 ma, T A = 4 C to +15 C out 1.5% %.538 Minimum Input oltage inmin.9 Line Regulation in =.9 to 1, I load =.1 ma Load Regulation in =.9, I load =.1 ma to 5 ma Line Reg.4 m/ Load Reg.4 m/ma Dropout oltage (See Figure ) I load = 5 ma (Note 9) I load = 3 ma (Note 9) I load = 5 ma I load =.1mA DO Peak Output Current (See Figures 14 and 18) I pk ma Short Output Current (See Figure 14) in < 7, T A = 5 C I sc 9 ma Thermal Shutdown / Hysteresis T J 16/ C Ground Current In Regulation I load = 5 ma (Note 9) I load = 3 ma (Note 9) I load = 5 ma I load =.1 ma I GND m ma In Dropout in =.4, I load =.1 ma 5 In Shutdown SD = Output Noise C nr = nf, I load = 5 ma, f = Hz to khz, C out = F C nr = nf, I load = 5 ma, f = Hz to khz, C out = F Power Good oltage Low Threshold Hysteresis High Threshold I GNDsh noise elft Power Good Pin oltage Saturation (I ef 1. ma) efdo m Power Good Pin Leakage I efleak 1. Power Good Blanking Time (Note ) t ef 5 s Shutdown Threshold oltage ON Threshold oltage OFF SD. S D Input Current, SD = to.4 or SD =. to in I SD.7 1. Output Current In Shutdown Mode, out = I OSD rms rms % of out Reverse Bias Protection, Current Flowing from the Output Pin to GND ( in =, out_forced =.5 ) I OUTR 8. Performance guaranteed over the operating temperature range by design and/or characterization, production tested at T J = T A = 5 C. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible. 9. T A must be greater than C.. Can be disabled per customer request. 7

8 ELECTRICAL CHARACTERISTICS 1.8 ( out = 1.8 typical, in =.9, T A = 4 C to +85 C, unless otherwise noted, Note 11) Characteristic Symbol Min Typ Max Unit Output oltage (Accuracy) in =.9 to 5.8, I load =.1 ma to 5 ma, T A = 5 C out.9% % Output oltage (Accuracy) in =.9 to 5.8, I load =.1 ma to 5 ma, T A = C to +85 C out 1.4% % 1.86 Output oltage (Accuracy) in =.9 to 5.8, I load =.1 ma to 5 ma, T A = 4 C to +15 C out 1.5% % 1.87 Minimum Input oltage inmin.9 Line Regulation in =.9 to 1, I load =.1 ma Load Regulation in =.9, I load =.1 ma to 5 ma Line Reg.4 m/ Load Reg.4 m/ma Dropout oltage (See Figure 9) I load = 5 ma (Notes 1, 13) I load = 3 ma (Notes 1, 13) I load = 5 ma (Notes 1, 13) DO Peak Output Current (See Figures 14 and 17) I pk ma Short Output Current (See Figure 14) in < 7, T A = 5 C I sc 9 ma Thermal Shutdown / Hysteresis T J 16/ C Ground Current In Regulation I load = 5 ma (Note 1) I load = 3 ma (Note 1) I load = 5 ma I load =.1 ma I GND m ma In Dropout in =., I load =.1 ma 5 In Shutdown SD = Output Noise C nr = nf, I load = 5 ma, f = Hz to khz, C out = F C nr = nf, I load = 5 ma, f = Hz to khz, C out = F Power Good oltage Low Threshold Hysteresis High Threshold I GNDsh noise elft Power Good Pin oltage Saturation (I ef 1. ma) efdo m Power Good Pin Leakage I efleak 1. Power Good Blanking Time (Note ) t ef 5 s Shutdown Threshold oltage ON Threshold oltage OFF SD. SD Input Current, SD = to.4 or SD =. to in I SD.7 1. Output Current In Shutdown Mode, out = I OSD rms rms % of out Reverse Bias Protection, Current Flowing from the Output Pin to GND ( in =, out_forced = 1.8 ) I OUTR 11. Performance guaranteed over the operating temperature range by design and/or characterization, production tested at T J = T A = 5 C. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible. 1.T A must be greater than C. 13.Maximum dropout voltage is limited by minimum input voltage in =.9 recommended for guaranteed operation. 8

9 ELECTRICAL CHARACTERISTICS ADJUSTABLE ( out = 1.5 typical, in =.9, T A = 4 C to +85 C, unless otherwise noted, Note 14) Characteristic Symbol Min Typ Max Unit Reference oltage (Accuracy) in =.9 to out +4., I load =.1 ma to 5 ma, T A = 5 C Reference oltage (Accuracy) in =.9 to out + 4., I load =.1 ma to 5 ma, T A = C to +85 C Reference oltage (Accuracy) (Note 18) in =.9 to out + 4., I load =.1 ma to 5 ma, T A = 4 C to +15 C Line Regulation in =.9 to 1, I load =.1 ma Load Regulation in =.9 to 1, I load =.1 ma to 5 ma Dropout oltage (See Application Note) ( out =.5 ) I load = 5 ma (Note 16) I load = 3 ma I load = 5 ma I load =.1 ma ref ref ref.9% % % % % % 1.69 Line Reg.4 m/ Load Reg.4 m/ma DO Peak Output Current (See Figure 14) I pk ma Short Output Current (See Figure 14) in < 7, T A = 5 C out 3.3 out > 3.3 I sc 9 93 Thermal Shutdown / Hysteresis T J 16/ Ground Current In Regulation I load = 5 ma (Note 16) I load = 3 ma (Note 16) I load = 5 ma I load =.1 ma In Dropout in = out +.1 or.9 (whichever is higher), I load =.1 ma In Shutdown SD = Output Noise C nr = nf, I load = 5 ma, f = Hz to khz, C out = F C nr = nf, I load = 5 ma, f = Hz to khz, C out = F Power Good oltage Low Threshold Hysteresis High Threshold I GND I GNDsh noise elft Power Good Pin oltage Saturation (I ef = 1. ma) efdo m Power Good Pin Leakage I efleak 1 Power Good Pin Blanking Time (Note 15) t ef 5 s Shutdown Threshold oltage ON Threshold oltage OFF SD Input Current, SD = to.4 or SD =. to in in 5.4 in > 5.4 SD 1.4 SD Output Current In Shutdown Mode, out = I OSD.7 1 Reverse Bias Protection, Current Flowing from the Output Pin to GND ( in =, out_forced = out (nom) 7 ) (Note 17) m ma C ma rms % of out I OUTR 1 14.Performance guaranteed over the operating temperature range by design and/or characterization, production tested at T J = T A = 5 C. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible. 15. Can be disabled per customer request. 16.T A must be greater than C. 17.Reverse bias protection feature valid only if out in For output current capability for T A < C, please refer to Figures 17 and 18. 9

10 OUT, OUTPUT OLTAGE () IN =.9 I OUT = OUT = OUT, OUTPUT OLTAGE () IN =.9 I OUT = OUT = Figure 5. Output oltage vs. Temperature 1.8 ersion Figure 6. Output oltage vs. Temperature.5 ersion OUT, OUTPUT OLTAGE () IN = 3.7 I OUT = OUT = Figure 7. Output oltage vs. Temperature 3.3 ersion OUT, OUTPUT OLTAGE () IN = 5.4 I OUT = OUT = Figure 8. Output oltage vs. Temperature 5. ersion 9 4 DO, DROPOUT OLTAGE (m) ma 5 ma 5 ma DO, DROPOUT OLTAGE (m) ma 5 ma 5 ma Figure 9. Dropout oltage vs. Temperature 1.8 ersion Figure. Dropout oltage vs. Temperature.5 ersion

11 4 35 DO, DROPOUT OLTAGE (m) ma 5 ma 5 ma DO, DROPOUT OLTAGE (m) ma 3 ma 5 ma Figure 11. Dropout oltage vs. Temperature 3.3 ersion Figure 1. Dropout oltage vs. Temperature 5. ersion I pk (ma), I sc (ma) I sc IN =.9 OUT = 1.8 I pk Figure 13. Peak and Short Current vs. Temperature.97 out out () I out (ma) I pk I sc (For specific values of I pk and I sc, please refer to Figure 13) Figure 14. Output oltage vs. Output Current I GND, GROUND CURRENT (ma) ma 3 ma 5 ma IN =.9 OUT = Figure 15. Ground Current vs. Temperature I GND, GROUND CURRENT (ma) IN =.9 OUT = 1.8 T A = 5 C I OUT, OUTPUT CURRENT (A) Figure 16. Ground Current vs. Output Current 11

12 NCP C.7 C IOUT, OUTPUT CURRENT (A) IOUT, OUTPUT CURRENT (A) C 4 C.4.3. IN =.9 OUT = Iout =.5 A 5 4 Iout =.5 A 3 IN = PP Modulation OUT = 1.5 TA = 5 C 1k k k F, FREQUENCY (Hz) 7 IN = PP Modulation OUT =.5 TA = 5 C 6 Iout = 5 ma NOISE DENSITY (n/ HZ) 5 Cnr = nf 3 Cnr = nf IN =.9 OUT = 1.5 TA = 5 C 1k k k 1k k k F, FREQUENCY (Hz) 1M Figure 1. PSRR vs. Frequency.5 ersion 6 Iout =.5 A 6 4 Iout =.5 A 3 1M.7 5 Figure. PSRR vs. Frequency Adjustable ersion NOISE DENSITY (n/ HZ) Iout = 5 ma IN =.9 OUT =.5 Figure 18. Output Current Capability for the.5 ersion PSRR, RIPPLE REJECTION (db) PSRR, RIPPLE REJECTION (db).3 Figure 17. Output Current Capability for the 1.8 ersion 7 4 C C.4 IN, INPUT OLTAGE () 8.5 IN, INPUT OLTAGE () 9 C C.7 1M 4 Cnr = nf 3 Cnr = nf IN =.9 OUT =.5 TA = 5 C 1k k k 1M F, FREQUENCY (Hz) F, FREQUENCY (Hz) Figure. Output Noise Density Adjustable ersion Figure 3. Output Noise Density.5 ersion 1

13 Figure 4. Power Good Activation Figure 5. Power Good Inactivation 15 3 in at Data Sheet Test Conditions, 5 C, 1 F Capacitance 5 MAXIMUM ESR ( ) 5. Unstable Area Stable Area 3 OUTPUT CURRENT (ma) 4 Figure 6. Stability with ESR vs. Output Current 5 JA ( C/W) 15 5 oz CF 1 oz CF COPPER HEAT SPREADING AREA (mm ) Figure 7. DFN Self Heating Thermal Characterstics as a Function of Copper Area on the PCB NOTE: Typical characteristics were measured with the same conditions as electrical characteristics. 13

14 APPLICATIONS INFORMATION Reverse Bias Protection Reverse bias is a condition caused when the input voltage goes to zero, but the output voltage is kept high either by a large output capacitor or another source in the application which feeds the output pin. Normally in a bipolar LDO all the current will flow from the output pin to input pin through the PN junction with limited current capability and with the potential to destroy the IC. Due to an improved architecture, the NCP3337 can withstand up to 7. on the output pin with virtually no current flowing from output pin to input pin, and only negligible amount of current (tens of ) flowing from the output pin to ground for infinite duration. Input Capacitor An input capacitor of at least 1. F, any type, is recommended to improve the transient response of the regulator and/or if the regulator is located more than a few inches from the power source. It will also reduce the circuit s sensitivity to the input line impedance at high frequencies. The capacitor should be mounted with the shortest possible track length directly across the regular s input terminals. Output Capacitor The NCP3337 remains stable with any type of capacitor as long as it fulfills its 1. F requirement. There are no constraints on the minimum ESR and it will remain stable up to an ESR of 5.. Larger capacitor values will improve the noise rejection and load transient response. Noise Reduction Pin Output noise can be greatly reduced by connecting a nf capacitor (C nr ) between the noise reduction pin and ground (see Figure 1). In applications where very low noise is not required, the noise reduction pin can be left unconnected. Dropout oltage The voltage dropout is measured at 97% of the nominal output voltage. temperature is exceeded. This feature provides protection from a catastrophic device failure due to accidental overheating. This protection feature is not intended to be used as a substitute to heat sinking. The maximum power that can be dissipated, can be calculated with the equation below: PD T J(max) TA (eq. 1) R JA For improved thermal performance, contact the factory for the DFN package option. The DFN package includes an exposed metal pad that is specifically designed to reduce the junction to air thermal resistance, R JA. Adjustable Operation The output voltage can be set by using a resistor divider as shown in Figure with a range of 1.5 to. The appropriate resistor divider can be found by solving the equation below. The recommended current through the resistor divider is from to. This can be accomplished by selecting resistors in the k range. As result, the I adj * R becomes negligible in the equation and can be ignored. out 1.5 * (1 R3 R) I adj *R (eq. ) Power Good Operation The Power Good pin on the NCP3337 will produce a logic Low when it drops below the nominal output voltage. Refer to the electrical characteristics for the threshold values at which point the Power Good goes Low. When the NCP3337 is above the nominal output voltage, the Power Good will remain at logic High. The external pullup resistor needs to be connected between in and the Power Good pin. A resistor of approximately k is recommended to minimize the current consumption. No pullup resistor is required if the Power Good output is not being used. The Power Good does not function during thermal shutdown and when the part is disabled. Thermal Considerations Internal thermal limiting circuitry is provided to protect the integrated circuit in the event that the maximum junction 14

15 ORDERING INFORMATION Device Nominal Output oltage Marking Package Shipping NCP3337MN18RG 1.8 P DFN (Pb Free) 3 / Tape & Reel NCP3337MN5RG.5 P DFN (Pb Free) NCP3337MN33RG 3.3 P DFN (Pb Free) NCP3337MN5RG 5. P DFN (Pb Free) NCP3337MNADJRG Adj P3337 ADJ DFN (Pb Free) 3 / Tape & Reel 3 / Tape & Reel 3 / Tape & Reel 3 / Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD811/D. *Please contact factory for other voltage options. 15

16 PACKAGE DIMENSIONS DFN, 3x3,.5P CASE 485C 1 ISSUE B PIN 1 REFERENCE D ÇÇÇ ÇÇÇ X.15 C TOP IEW X.15 C DETAIL B (A3). C X.8 C SIDE IEW D X L e 1 5 A B E A1 A DETAIL A C L1 MOLD CMPD SEATING PLANE DETAIL A Bottom iew (Optional) A1 EDGE OF PACKAGE ÉÉÉ DETAIL B Side iew (Optional) EXPOSED Cu A3 SOLDERING FOOTPRINT*.616 NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN.5 AND.3 MM FROM TERMINAL. 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. 5. TERMINAL b MAY HAE MOLD COMPOUND MATERIAL ALONG SIDE EDGE. MOLD FLASHING MAY NOT EXCEED 3 MICRONS ONTO BOTTOM SURFACE OF TERMINAL b. 6. DETAILS A AND B SHOW OPTIONAL IEWS FOR END OF TERMINAL LEAD AT EDGE OF PACKAGE. MILLIMETERS DIM MIN MAX A.8 1. A1..5 A3. REF b.18.3 D 3. BSC D.4.6 E 3. BSC E e.5 BSC K.19 TYP L L1..3 X K E C.5 C 6 X b A B BOTTOM IEW NOTE 3 X.5651 X.38.5 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. Micro8 is a trademark of International Rectifier. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 817 USA Phone: or Toll Free USA/Canada Fax: or Toll Free USA/Canada orderlit@onsemi.com N. American Technical Support: Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: Japan Customer Focus Center Phone: ON Semiconductor Website: Order Literature: For additional information, please contact your local Sales Representative NCP3337/D