NCP ma, Dual Rail Ultra Low Dropout Linear Regulator

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4 ma, Dual Rail Ultra Low Dropout Linear Regulator The NCP467 is a CMOS Dual Supply Rail Linear Regulator designed to provide very low output voltages.

1 4 ma, Dual Rail Ultra Low Dropout Linear Regulator The NCP467 is a CMOS Dual Supply Rail Linear Regulator designed to provide very low output voltages. The Dual Rail architecture which separates the power for the LDO control circuitry (provided via the Vbias pin) from the main power path (Vin) offers ultra low dropout performance, allowing the device to operate from input voltages down to.9 V and to generate a fixed high accuracy output voltage as low as.6 V. The NCP467 offers excellent transient response with very low quiescent currents. The family is available in a variety of packages: SC 7, SOT23 and a small, ultra thin.2 x.2 x.4mm XDFN. Features Bias Supply Voltage Range : 2.4 V to 5.25 V (V OUT <.8 V) Set V OUT +.6 V to 5.25 V (V OUT.8 V) Power Input Voltage Range :.9 V to V BIAS (V OUT <.8 V) Set V OUT +. V to V BIAS (V OUT.8 V) Output Voltage Range:.6 to.5 V (available at. steps) Very Low Dropout: 8 mv Typ. at 4 ma Quiescent Current: 28 A Standby Current:. A ±5 mv Output Voltage Accuracy (T A = 25 C) High PSRR: 8 db at khz (Ripple at VIN) 5 db at khz (Ripple at VBIAS) Current Fold Back Protection Typ. 2 ma Available in XDFN, SC 7, SOT23 Package These are Pb Free Devices Typical Applications Battery Powered Equipments Portable Communication Equipments Cameras, VCRs and Camcorders VIN DC/DC converter C C2 VIN CE NCP467x VBIAS GND VOUT VOUT C3 2 2 SC 7 CASE 49A (In Development) XDFN6 CASE 7AA SOT 23 5 CASE 22 XX, XXX= Specific Device Code M, MM = Date Code A = Assembly Location Y = Year W = Work Week = Pb Free Package MARKING DIAGRAMS ORDERING INFORMATION See detailed ordering, marking and shipping information in the package dimensions section on page 2 of this data sheet. (*Note: Microdot may be in either location) XXX XMM XX MM XXXMM Figure. Typical Application Schematic Semiconductor Components Industries, LLC, 22 February, 22 Rev. 2 Publication Order Number: NCP467/D

2 NCP467Hxxxxxxxx NCP467Dxxxxxxxx VBIAS VBIAS VIN VOUT VIN VOUT Vref Vref UVLO Current Limit UVLO Current Limit CE GND CE GND Figure 2. Simplified Schematic Block Diagram PIN FUNCTION DESCRIPTION Pin No. XDFN Pin No. SC 7 Pin No. SOT23 Pin Name Description 4 VBIAS Input Pin GND Ground Pin CE Chip Enable Pin ( H Active) 4 4 VIN Input Pin 2 5 NC Not connected VOUT Output Pin ABSOLUTE MAXIMUM RATINGS Rating Symbol Value Unit Bias Supply Input Voltage (Note ) V BIAS 6. V Power Supply Input Voltage (for Driver) (Note ) V IN.3 to VBIAS +.3 V Output Voltage VOUT.3 to VIN +.3 V Chip Enable Input VCE 6. V Output Current I OUT 5 ma Power Dissipation XDFN P D 4 mw Power Dissipation SC 7 38 Power Dissipation SOT23 42 Maximum Junction Temperature T J(MAX) 5 C Storage Temperature T STG 55 to 25 C ESD Capability, Human Body Model (Note 2) ESD HBM 2 V ESD Capability, Machine Model (Note 2) ESD MM 2 V Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.. Refer to ELECTRICAL CHARACTERISTIS and APPLICATION INFORMATION for Safe Operating Area. 2. This device series incorporates ESD protection and is tested by the following methods: ESD Human Body Model tested per AEC Q 2 (EIA/JESD22 A4) ESD Machine Model tested per AEC Q 3 (EIA/JESD22 A5) Latchup Current Maximum Rating tested per JEDEC standard: JESD78. 2

3 THERMAL CHARACTERISTICS Rating Symbol Value Unit Thermal Characteristics, XDFN Thermal Resistance, Junction to Air Thermal Characteristics, SOT23 Thermal Resistance, Junction to Air Thermal Characteristics, SC 7 Thermal Resistance, Junction to Air R JA 25 C/W R JA 238 C/W R JA 263 C/W ELECTRICAL CHARACTERISTICS 4 C T A 85 C, V BIAS = V CE = 3.6 V, V IN = V OUT(NOM) +.5 V,, C BIAS = C IN =. F, C OUT = 2.2 F, unless otherwise noted. Typical values are at T A = +25 C. Parameter Test Conditions Symbol Min Typ Max Unit Operating Supply Input Voltage (Note 3) Operating Power Input Voltage (Note 3) V OUT <.8 V VBIAS V V OUT.8 V V OUT V OUT <.8 V VIN.9 VBIAS V V OUT.8 V V OUT +. VBIAS Output Voltage TA = +25 C VOUT 5 +5 mv TA = 4 C to +85 C 2 +2 Output Voltage Temp. Coefficient T A = 4 C to +85 C ±5 ppm/ C Line Regulation V BIAS = 2.4V to 5.V Line Reg.2. %/V V IN = VOUT +.3 V to 2.4 V.2. Load Regulation IOUT = ma to 4 ma Load Reg 3 5 mv Dropout Voltage Please refer to following detailed table. Output Current IOUT 4 ma Short Current Limit V OUT = V I SC 2 ma Quiescent Current IOUT = ma IQ 28 4 A Standby Current V CE = V, T A = 25 C ISTB. 3 A CE Pin Threshold Voltage CE Input Voltage H VCEH.8 V CE Input Voltage L VCEL.3 CE Pull Down Current IPD A VIN Under Voltage Lock Out I OUT = A V IN_UVLO V OUT +.5 V OUT +. Power Supply Rejection Ratio I OUT = 3 ma, f = khz, V IN Ripple.2 V P P PSRR 8 db I OUT = 3 ma, f = khz, V BIAS Ripple.2 V P P 5 V Output Noise Voltage V OUT =.6 V, I OUT = 3 ma, f = Hz to khz VN 7 V rms Low Output Nch Tr. On Resistance D only, V BIAS = 3.6 V, V CE = L R LOW 5 3. If Input Voltage range is between 5.25 V and 5.5 V, the total operational time must be within 5 hrs. 3

4 DROPOUT VOLTAGE (V DO [V]) V OUT / V BIAS V DO I OUT = 2 ma (T A = 25 C) V DO I OUT = 3 ma T A = 25 C T A = 4 C to +85 C V DO I OUT = 4 ma T A = 25 C T A = 4 C to +85 C 2.5 V 3. V 3.3 V 3.6 V 4.2 V 5. V 3.6 V 3.6 V 3.6 V 3.6 V.6 V V V V V V V * V V * *VBIAS voltage must be equal or more than V OUT(NOM) +.6 V 4

5 V IN =.79 V V BIAS = 2.4 V. V 2.4 V V IN =.79 V. V V BIAS = 3.6 V 3.6 V I OUT, OUTPUT CURRENT (ma) Figure 3. Output Voltage vs. Output Current.6 V (T A = 25 C) I OUT, OUTPUT CURRENT (ma) Figure 4. Output Voltage vs. Output Current.6 V (T A = 25 C) V V IN =.79 V V BIAS = 5.25 V. V V BIAS = 2.6 V V IN =.22 V.5 V 2.6 V I OUT, OUTPUT CURRENT (ma) Figure 5. Output Voltage vs. Output Current.6 V (T A = 25 C) I OUT, OUTPUT CURRENT (ma) Figure 6. Output Voltage vs. Output Current. V (T A = 25 C).2 V BIAS = 3.6 V.2 V BIAS = 5.25 V V IN =.22 V.5 V 3.6 V V IN =.22 V.5 V 5.25 V I OUT, OUTPUT CURRENT (ma) Figure 7. Output Voltage vs. Output Current. V (T A = 25 C) I OUT, OUTPUT CURRENT (ma) Figure 8. Output Voltage vs. Output Current. V (T A = 25 C) 5

6 V IN =.76 V 2. V.2 V BIAS = 3. V I OUT, OUTPUT CURRENT (ma) 3. V Figure 9. Output Voltage vs. Output Current.5 V (T A = 25 C) V IN =.72 V 2. V.2 V BIAS = 3.6 V I OUT, OUTPUT CURRENT (ma) 3.6 V Figure. Output Voltage vs. Output Current.5 V (T A = 25 C) V IN =.76 V 2. V 5.25 V.2 V BIAS = 5.25 V ma 5 ma V BIAS = 2.4 V I OUT, OUTPUT CURRENT (ma) Figure. Output Voltage vs. Output Current.5 V (T A = 25 C) V IN, INPUT VOLTAGE (V) Figure 2. Output Voltage vs. Input Voltage.6 V (T A = 25 C) ma 5 ma V BIAS = 3.6 V ma 5 ma V BIAS = 5.25 V V IN, INPUT VOLTAGE (V) V IN, INPUT VOLTAGE (V) Figure 3. Output Voltage vs. Input Voltage.6 V (T A = 25 C) Figure 4. Output Voltage vs. Input Voltage.6 V (T A = 25 C) 6

7 ma 5 ma V IN, INPUT VOLTAGE (V) V BIAS = 2.6 V Figure 5. Output Voltage vs. Input Voltage. V (T A = 25 C) ma 5 ma V IN, INPUT VOLTAGE (V) V BIAS = 3.2 V Figure 6. Output Voltage vs. Input Voltage. V (T A = 25 C) ma 5 ma V BIAS = 5.25 V V IN, INPUT VOLTAGE (V) Figure 7. Output Voltage vs. Input Voltage. V (T A = 25 C) ma 5 ma.2 V BIAS = 3. V V IN, INPUT VOLTAGE (V) Figure 8. Output Voltage vs. Input Voltage.5 V (T A = 25 C) ma 5 ma V BIAS = 3.6 V V IN, INPUT VOLTAGE (V) Figure 9. Output Voltage vs. Input Voltage.5 V (T A = 25 C) ma 5 ma V IN, INPUT VOLTAGE (V) V BIAS = 5.25 V Figure 2. Output Voltage vs. Input Voltage.5 V (T A = 25 C) 7

8 ma 5 ma ma 5 ma V BIAS, BIAS VOLTAGE (V).6 Figure 2. Output Voltage vs. Bias Voltage.6 V (T A = 25 C) V BIAS, BIAS VOLTAGE (V) Figure 22. Output Voltage vs. Bias Voltage. V (T A = 25 C) ma 3 ma V BIAS, BIAS VOLTAGE (V) Figure 23. Output Voltage vs. Bias Voltage.5 V (T A = 25 C) T J, JUNCTION TEMPERATURE ( C) Figure 24. Output Voltage vs. Temperature.6 V T J, JUNCTION TEMPERATURE ( C) Figure 25. Output Voltage vs. Temperature. V T J, JUNCTION TEMPERATURE ( C) Figure 26. Output Voltage vs. Temperature.5 V 8

9 4 I q, QUIECENT CURRENT ( A) V BIAS = 2.4 V 5.25 V 3.6 V I q, QUIECENT CURRENT ( A) V BIAS = 2.4 V 5.25 V 3.6 V V IN, INPUT VOLTAGE (V) Figure 27. Quiescent Current vs. Input Voltage.6 V V IN, INPUT VOLTAGE (V) Figure 28. Quiescent Current vs. Input Voltage. V I q, QUIECENT CURRENT ( A) V BIAS = 2.4 V 5.25 V 3.6 V SUPPLY CURRENT ( A) V BIAS = 3.6 V V IN =. V V IN, INPUT VOLTAGE (V) Figure 29. Quiescent Current vs. Input Voltage.5 V T J, JUNCTION TEMPERATURE ( C) Figure 3. Supply Current vs. Temperature.6 V SUPPLY CURRENT ( A) V BIAS = 3.6 V V IN =.5 V SUPPLY CURRENT ( A) V BIAS = 3.6 V V IN = 2. V T J, JUNCTION TEMPERATURE ( C) Figure 3. Supply Current vs. Temperature. V T J, JUNCTION TEMPERATURE ( C) Figure 32. Supply Current vs. Temperature.5 V 9

10 2 2 V DO, DROPOUT VOLTAGE (mv) T J = 85 C 4 C 25 C V DO, DROPOUT VOLTAGE (mv) C T J = 85 C 25 C I OUT, OUTPUT CURRENT (ma) Figure 33. Dropout Voltage vs. Output Current.6 V I OUT, OUTPUT CURRENT (ma) Figure 34. Dropout Voltage vs. Output Current. V V DO, DROPOUT VOLTAGE (mv) T J = 85 C 4 C 25 C I OUT, OUTPUT CURRENT (ma) Figure 35. Dropout Voltage vs. Output Current.5 V PSRR (db) ma 3 ma 2 V IN =. V + 2 mv PP modulation, V BIAS = 3.6 V, C BIAS = F k k k M M FREQUENCY (Hz) Figure 36. PSRR vs. Frequency.6 V PSRR (db) ma 2 V IN =.5 V + 2 mv PP modulation, V BIAS = 3.6 V, C BIAS = F k k k M M FREQUENCY (Hz) Figure 37. PSRR vs. Frequency. V PSRR (db) ma 2 V IN = 2. V + 2 mv PP modulation, V BIAS = 3.6 V, C BIAS = F k k k M M FREQUENCY (Hz) Figure 38. PSRR vs. Frequency.5 V

11 PSRR (db) ma 2 V IN =. V, C IN = 2.2 F, 5 ma V BIAS = 3.6 V + 2 mv PP modulation k k k M M FREQUENCY (Hz) Figure 39. PSRR vs. Frequency.6 V 8 3 ma PSRR (db) V IN =.5 V, C IN = 2.2 F, 5 ma V BIAS = 3.6 V + 2 mv PP modulation k k k M M FREQUENCY (Hz) Figure 4. PSRR vs. Frequency. V PSRR (db) ma 2 V IN = 2. V, C IN = 2.2 F, V BIAS = 3.6 V + 2 mv PP modulation k k k M M FREQUENCY (Hz) 3 ma Figure 4. PSRR vs. Frequency.5 V

12 V IN =. V, C IN = 2.2 F, V BIAS = Step 2.4 V to 3.6 V t ( s) Figure 42. Line Transients Response,.6 V V BIAS (V) V IN =.5 V, C IN = 2.2 F,.96 V BIAS = Step 2.4 V to 3.6 V t ( s) Figure 43. Line Transients Response,. V V BIAS (V) V IN = 2. V, C IN = 2.2 F, V BIAS = Step 2.4 V to 3.6 V t ( s) Figure 44. Line Transients Response,.5 V V BIAS (V) 2

13 V.596 IN = Step. V to 2. V, V BIAS = 3.6 V, C BIAS = F t ( s) Figure 45. Line Transients Response,.6 V V IN (V) V IN = Step.5 V to 2.5 V,.996 V BIAS = 3.6 V, C BIAS = F t ( s) Figure 46. Line Transients Response,. V V IN (V) V IN = Step 2. V to 3. V,.496 V BIAS = 3.6 V, C BIAS = F t ( s) Figure 47. Line Transients Response,.5 V V IN (V) 3

14 V.56 IN =. V, V BIAS = 3.6 V, C IN = 2.2 F, C BIAS = F t (ms) Figure 48. Load Transients Response,.6 V, I OUT Step ma to 4 ma I OUT (ma) V IN =.5 V, V BIAS = 3.6 V,.96 C IN = 2.2 F, C BIAS = F t (ms) Figure 49. Load Transients Response,. V, I OUT Step ma to 4 ma I OUT (ma) V IN = 2. V, V BIAS = 3.6 V, C IN = 2.2 F, C BIAS = F t (ms) Figure 5. Load Transients Response,.5 V, I OUT Step ma to 4 ma I OUT (ma) 4

15 V.59 IN =. V, V BIAS = 3.6 V, C IN = 2.2 F, C BIAS = F t (ms) Figure 5. Load Transients Response,.6 V, I OUT Step 5 ma to ma I OUT (ma) V.99 IN =.5 V, V BIAS = 3.6 V, C IN = 2.2 F, C BIAS = F t (ms) Figure 52. Load Transients Response,. V, I OUT Step 5 ma to ma I OUT (ma) V IN = 2. V, V BIAS = 3.6 V, C IN = 2.2 F, C BIAS = F t (ms) Figure 53. Load Transients Response,.5 V, I OUT Step 5 ma to ma I OUT (ma) 5

16 V IN I OUT = 3 ma V IN (V).4.2 I OUT = 25 ma. V BIAS = V CE = 3.6 V, C OUT = 2.2 F t ( s) Figure 54. Turn On Behavior,.6 V 2.25 V IN.5 I OUT = 4 ma V IN (V).4.2. I OUT = 3 ma V BIAS = V CE = 3.6 V, C OUT = 2.2 F t ( s) Figure 55. Turn On Behavior,. V V IN I OUT = 3 ma V IN (V)..5. I OUT = 4 ma V BIAS = V CE = 3.6 V, C OUT = 2.2 F t ( s) Figure 56. Turn On Behavior,.5 V 6

17 Chip Enable I OUT = 3 ma I OUT = 25 ma V IN =. V, V BIAS = 3.6 V, C IN = C OUT = 2.2 F, C BIAS = F t ( s) Figure 57. Turn On Behavior with CE,.6 V V CE (V) Chip Enable I OUT = 3 ma I OUT = 4 ma.8 V CE (V).2. V IN =.5 V, V BIAS = 3.6 V, C IN = C OUT = 2.2 F, C BIAS = F t ( s) Figure 58. Turn On Behavior with CE,. V Chip Enable I OUT = 3 ma I OUT = 4 ma V IN = 2.5 V, V BIAS = 3.6 V, C IN = C OUT = 2.2 F, C BIAS = F t ( s) Figure 59. Turn On Behavior with CE,.5 V V CE (V) 7

18 V IN =. V, V BIAS = 3.6 V, C IN = C OUT = 2.2 F, C BIAS = F Chip Enable.6 V CE (V).4 I OUT = 3 ma.2. I OUT = 25 ma t (ms) Figure 6. Turn Off Behavior with CE,.6 V V IN =. V, V BIAS = 3.6 V, C IN = C OUT = 2.2 F, C BIAS = F Chip Enable V CE (V).4 I OUT = 3 ma.2. I OUT = 4 ma t (ms) Figure 6. Turn Off Behavior with CE,. V V IN = 2. V, V BIAS = 3.6 V, C IN = C OUT = 2.2 F, C BIAS = F Chip Enable 2..5 V CE (V). I OUT = 3 ma.5. I OUT = 4 ma t (ms) Figure 62. Turn Off Behavior with CE,.5 V 8

19 APPLICATION INFORMATION A typical application circuit for the NCP467 series is shown in Figure 63. The NCP467 has two independent inputs, VBIAS pin is used for powering control part of the LDO and its value is equal or higher than value of second input pin VIN where voltage that has to be regulated is connected. VIN VBIAS C C2 VIN VBIAS CE NCP467x GND VOUT C3 2 2 Figure 63. Typical Application Schematic VOUT Dual rail architecture is appropriate when the regulator is connected for example behind a buck DC/DC converter. Bias voltage can be taken from input of the buck DC/DC converter and as input voltage is used output of the buck DC/DC converter as it is shown in Figure 64. Condition that bias voltage must be higher than input voltage can be in this schematic easy fulfilled. VIN DC/DC converter C C2 NCP467x VIN VBIAS VOUT CE GND VOUT C3 2 2 Figure 64. Typical Application Schematic with DC/DC Converter Input Decoupling Capacitors (C and C2) A F ceramic input decoupling capacitors should be connected as close as possible to the VIN and VBIAS input and ground pin of the NCP467. Higher values and lower ESR of capacitor C improves line transient response. Output Decoupling Capacitor (C3) A 2.2 F or larger ceramic output decoupling capacitor is sufficient to achieve stable operation of the IC. If a tantalum capacitor is used, and its ESR is high, loop oscillation may result. The capacitors should be connected as close as possible to the output and ground pins. Larger values and lower ESR improves dynamic parameters. Enable Operation The enable pin CE may be used for turning the regulator on and off. The regulator is switched on when CE pin voltage is above logic high level. The enable pin has an internal pull down current source. If the enable function is not needed connect CE pin to VBIAS. Output Discharger The D version includes a transistor between VOUT and GND that is used for faster discharging of the output capacitor. This function is activated when the IC goes into disable mode. Thermal As power across the IC increases, it might become necessary to provide some thermal relief. The maximum power dissipation supported by the device is dependent upon board design and layout. Mounting pad configuration on the PCB, the board material, and also the ambient temperature affect the rate of temperature rise for the part. That is to say, when the device has good thermal conductivity through the PCB, the junction temperature will be relatively low with high power dissipation applications. PCB layout Make VIN, VBIAS and GND line sufficient. If their impedance is high, noise pickup or unstable operation may result. Connect capacitors C, C2 and C3 as close as possible to the IC, and make wiring as short as possible. 9

20 ORDERING INFORMATION Device Nominal Output Voltage Marking Enable Package Shipping NCP467DSN6TG.6 V RA Auto Discharge SOT 23 5 (Pb Free) 3 / Tape & Reel NCP467DSN9TG.9 V RD Auto Discharge SOT 23 5 (Pb Free) NCP467DSNTG. V RE Auto Discharge SOT 23 5 (Pb Free) NCP467DSN2TG.2 V RF Auto Discharge SOT 23 5 (Pb Free) NCP467DSN3TG.3 V RG Auto Discharge SOT 23 5 (Pb Free) NCP467DSN5TG.5 V RJ Auto Discharge SOT 23 5 (Pb Free) NCP467DMX6TCG.6 V BA Auto Discharge XDFN6 (Pb Free) NCP467DMX9TCG.9 V BD Auto Discharge XDFN6 (Pb Free) NCP467DMX2TCG.2 V BF Auto Discharge XDFN6 (Pb Free) NCP467DMX3TCG.3 V BG Auto Discharge XDFN6 (Pb Free) 3 / Tape & Reel 3 / Tape & Reel 3 / Tape & Reel 3 / Tape & Reel 3 / Tape & Reel 5 / Tape & Reel 5 / Tape & Reel 5 / Tape & Reel 5 / Tape & Reel NCP467DMX5TCG.5 V BJ Auto Discharge XDFN6 (Pb Free) 5 / Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8/D. 2

21 PACKAGE DIMENSIONS SC 88A (SC 7 5/SOT 353) CASE 49A 2 ISSUE K S A G 5 4 B 2 3 D 5 PL.2 (.8) M B M N NOTES:. DIMENSIONING AND TOLERANCING PER ANSI Y4.5M, CONTROLLING DIMENSION: INCH A OBSOLETE. NEW STANDARD 49A DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. INCHES MILLIMETERS DIM MIN MAX MIN MAX A B C D G.26 BSC.65 BSC H J K N.8 REF.2 REF S C J H K 2

22 PACKAGE DIMENSIONS XDFN6.2x.2,.4P CASE 7AA ISSUE O 2X PIN ONE REFERENCE.5 C D ÍÍÍ ÍÍÍ 2X.5 C TOP VIEW.5 C A B E A NOTES:. DIMENSIONING AND TOLERANCING PER ASME Y4.5M, CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN.5 AND.25mm FROM TERMINAL TIPS. 4. COPLANARITY APPLIES TO ALL OF THE TERMINALS. MILLIMETERS DIM MIN MAX A A..5 b.3.23 C.2.3 D.2 BSC E.2 BSC e.4 BSC L NOTE 4.5 C SIDE VIEW A C SEATING PLANE RECOMMENDED MOUNTING FOOTPRINT* 6X 6X e PACKAGE OUTLINE 3 C.5 6X L 6 4 BOTTOM VIEW 6X b.5 M C A B NOTE 3.4 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 22

23 PACKAGE DIMENSIONS SOT 23 5 LEAD CASE 22 ISSUE A A E L e 5 D B E 5X b. M C B S A S A2.5 S C C A RECOMMENDED SOLDERING FOOTPRINT* A L NOTES:. DIMENSIONING AND TOLERANCING PER ASME Y4.5M, CONTROLLING DIMENSIONS: MILLIMETERS. 3. DATUM C IS THE SEATING PLANE. MILLIMETERS DIM MIN MAX A A.. A2..3 b.3.5 c..25 D E E.5.8 e.95 BSC L L X.85 5X PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 563, Denver, Colorado 827 USA Phone: or Toll Free USA/Canada Fax: or Toll Free USA/Canada orderlit@onsemi.com N. American Technical Support: Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: Japan Customer Focus Center Phone: ON Semiconductor Website: Order Literature: For additional information, please contact your local Sales Representative NCP467/D

24 Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: ON Semiconductor: NCP467DMX6TCG NCP467DMX9TCG NCP467DMX2TCG NCP467DMX3TCG NCP467DMX5TCG NCP467DSN6TG NCP467DSN9TG NCP467DSNTG NCP467DSN2TG NCP467DSN3TG NCP467DSN5TG

NCP ma, 10 V, Low Dropout Regulator

NCP ma, 10 V, Low Dropout Regulator 15 ma, 1 V, Low Dropout Regulator The is a CMOS Linear voltage regulator with 15 ma output current capability. The device is capable of operating with input voltages up to 1 V, with high output voltage