Low power distance measurement unit for real-time hardware motion estimators

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1 Low power disance easureen uni for real-ie hardware oion esiaors Tiago ias 2,3, Nuno Roa 1,3, and Leonel Sousa 1,3 1 IST / 2 ISEL / 3 INESC-I Rua Alves Redol, Lisboa, PORTUGAL {Tiago.ias, Nuno.Roa, Leonel.Sousa}@inesc-id.p Absrac. Real-ie video encoding ofen deands hardware oion esiaors, even when fas search algorihs are adoped. Wih he widespread usage of porable handheld devices ha suppor digial video coding, low power consideraion becoes a cenral liiing consrain. Consequenly, adapive search algorihs and special hardware archiecures have been recenly proposed o perfor oion esiaion in porable and auonoous devices. This paper proposes a new efficien carry-free ariheic uni o copue he iniu disance in block aching oion esiaion. The operaion of he proposed uni is independen of he adoped search algorih and of he used predicion error eric, siulaneously speeding up oion esiaion and significanly reducing he power consupion. Moreover, is low laency is paricularly advanageous when parial disance echniques are applied o furher reduce he power consupion. Experienal resuls show ha he proposed uni allows o reduce he copuaion ie in abou 40% and i consues 50% less power han coonly adoped archiecures. 1 Inroducion Moion Esiaion (ME) is a cenral operaion in video encoding, in order o exploi eporal redundancy in sequences of iages. However, i is also by far he os copuaionally cosly par of a video Coec [1]. Aong he several algorihs ha have been proposed, he Block-Maching Moion Esiaion (BME) is he os adoped ehod. Using his sraegy he disance beween each block of he reference frae and a se of candidae predicion blocks, defined wihin reduced areas of he previous frae (search areas), is copued o obain he corresponding oion vecor (MV). Neverheless, even hough he coplexiy of his ehod depends on he adoped disance eric and on he seleced search algorih, only hardware soluions are usually able o fulfill he real-ie requireen. In he las few years, i has been widely claied ha he firs generaion of search algorihs ofen reveals o be inadequae for porable devices, powered by baeries. Exaples of hese algorihs are he opial Full-Search Block- Maching (FSBM) and oher non-opial bu faser search algorihs, such as

2 he Three-Sep-Search (3SS) [2], he Four-Sep-Search (4SS) [3] and he iaond Search (S) [4]. Therefore, ore efficien search algorihs have been developed by aking advanage of eporal and spacial correlaions of he MVs in order o adap and opiize he search paern, hus avoiding unnecessary copuaions and eory accesses. Exaples of hese recen fas search echniques are he Moion Vecor Field Adapive Search Technique (MVFAST) and he hanced Predicive Zonal Search (EPZS) [5, 6]. A he sae ie, several specific archiecures have also been proposed o ipleen he differen search algorihs [7, 8]. Very recenly, an Applicaion Specific Insrucion Se Processor (ASIP) was proposed for adapive video oion esiaion [9]. The coon feaure of all hese hardware archiecures is ha hey all use, a heir processing core, an ariheic uni specially designed o copue he disance eric beween he curren block and he considered predicion blocks, as well as o copare hese disances in order o find he bes ach. The invesigaion of efficien hardware unis for esiaing MVs has been ainly focused eiher on he ipleenaion of he overall algorihs [7] or on he copuaion of he disance erics (such as he Su of Absolue ifferences (SA) [10] or he Mean Square Error (MSE)). However, i has no ye been proposed any efficien srucure ha avoids he usage of carry-propagae ype adders o copue and copare he obained values of he disance easure, in order o obain he iniu disance value and hus he bes ach. This issue presens several drawbacks, since carry-propagae ype adders are raher slow unis wih a high cos. Furherore, he applicaion of he usual alernaive acceleraing echniques, such as he applicaion of pipelining, can ofen be disadvanageous for fas BME, since he daa dependency in fas and adapive algorihs iplies sequenialiy in he processing. In his paper i is proposed a very efficien hardware uni ha avoids he usage of carry-propagae unis o copue and copare any considered disance eric. This uni exhibis null laency, reduced cos and power consupion, speeding up he evaluaion of he BME condiion by using carry-free ariheic. ue o is null laency, he proposed uni can also be direcly used o apply soe of he power-saving echniques ha have been proposed in he las few years, which evaluae he parial easures and disable a sub-se of he archiecure odules in order o furher reduce he power consupion [11]. 2 Block-Maching Moion-Esiaion Algorih In he widely adoped BME algorih, for each acroblock of N N pixels of he curren iage (z) i us be found he bes aching predicion block in a reference frae (ẑ), according o he considered search algorih and he used aching crierion. The MSE and he SA are he os frequenly used aching erics. For a given disance eric (), eq. 1 is copued for each

3 candidae MV v and he se of pixels γ in a acroblock: = f(z i,j ẑ vi +i,v j +j) ; f : (SA), [ ] 2 (MSE) ( ) 2 z i,j ẑ vi +i,v j +j (i,j) γ (1) The BME algorihs hen deerine he MV corresponding o he bes ach (V ) for a given search region (ζ) and a specific eric: V (ζ, γ) = v ζ arg in {(v, γ)}. (2) By considering a single ieraion, i.e., a single candidae block, his condiion can be saed as: { V (ζ V (ζ, γ) = 1, γ) if (v, γ) > (v 1, γ) v (γ) oherwise. (3) The opial soluion of his algorih, given by he FSBM approach, is provided by searching over all possible candidae acroblocks in ζ and by using a eric ha considers all pixels (γ) of he acroblock. To achieve fas BME, no only can he search range be resriced o a subse of vecors, bu also can he aching crieria be siplified by only copuing parial erics [12]. Parial-disance search echniques [13] are paricular cases of hese fas schees. 3 Proposed Archiecure The radiional hardware archiecure of a generic block aching oion esiaor is presened in fig. 1. Such srucure is usually coposed by: an arbirary eric copuaion uni, where eiher he SA, MSE or any oher disance eric is copued using he inpu pixels of boh he curren and previous fraes; an accuulaion uni, ha accuulaes, one a a ie, he copued parial values for he considered eric; a bes-ach deecion uni, which copares he value of he considered eric for he predicion acroblock under processing wih he value obained for he bes aching acroblock ha was found up o he curren insan. As i is presened in his block diagra, carry-save adder srucures are ofen used in he ipleenaion of he accuulaion uni, in order o avoid he inroducion of carry-propagaion delays in he accuulaion criical pah, hus axiizing he operaing frequency. In fig. 2 i is presened he hardware srucure ha is radiionally adoped o updae he MV in each ieraion of he BME algorih. Such srucure is usually coposed by a fas carry-propagae adder (e.g.: carry-look-ahead srucure), o add he su (S ) and he carry (C ) bi-vecors obained fro he accuulaion uni, and a fas carry-propagae subracer, o copare he curren disance eric wih he bes one previously obained. This subracer issues he Greaer or Equal (GE) signal, ha will

4 Accuulaion Uni z z ^ u p n I r e is g e R Meric Copuaion Uni f (.) Carry Save Adder Accuulaor AccReg_S AccReg_C S C Bes-Mach eecion Uni GE Updae Clock Sae Machine Regisers able MVs Clock Fig. 1. Tradiional hardware archiecure of a generic block aching oion esiaor be used by he sae achine o updae he Bes-Meric Regiser, corresponding o he curren MV. Neverheless, his soluion sill reveals o be soewha inefficien, since i does no preven he need o use a carry-propagae adder srucure in he besach deecor in order o copare he curren eric value wih he bes one previously obained. As an exaple, if power-saving echniques ha abor he copuaion of he disance easure as soon as he parial value of he disance eric is greaer ha he one corresponding o he bes aching acroblock [11] are applied, he carry-propagae srucures presen a he bes-ach deecor will inroduce a significan delay in he overall daa-pah, hus grealy condiioning he operaion frequency. To derive ore efficien hardware srucures o copue eqs. 1 and 2 in realie, he following wo specific properies of BME can be applied: Propery 1 - he disance is a naural nuber, non-fracional and always posiive; Propery 2 - he uliae goal of BME is o copue he MV V (eq. 2) corresponding o he iniu disance easure (), and no he value of iself. Propery 1 can be used o siplify he coparison in each ieraion of eq. 3 provided ha he sraegy proposed in [10] o copare wo -bi nubers is also applied. By adoping a siplified noaion, wih (v, γ), i can be shown ha: 1 > > (4) To perfor his coparison, i can be easily shown ha only he carry ou of he os significan bi ( 1) us be copued, which corresponds o a uch faser and sipler logic circui han any carry-propagae subracer required by he radiional archiecure (see fig. 2). On he oher hand, Propery 2 provides he possibiliy o choose a represenaion for ha is ore suiable o evaluae he condiion saed in eq. 2. In fac, if he carry-save represenaion is also used o copue eq. 4, a single

5 S C Carry Look-Ahead Adder -1 Carry Look-Ahead Subracor - -1 ( - -1 )-1 Bes-Mach Regiser -1 Updae Clock GE Fig. 2. Tradiional hardware srucure of he bes-ach deecion uni and unique represenaion can be applied o copue boh eqs. 1 and 2, hus avoiding he ineviable penaly associaed wih carry-propagae operaions. Consequenly, by soring he pair of carry-save ( 1) bi vecors {C 1, S 1 }, represening 1, eq. 4 can be rewrien using he corresponding bi vecors copued a ieraion : 1 > 0 (5) {C, S } > {C 1, S 1 } (6) 2 1 (S 1 ) (2 C 1 ) + S + 2 C (7) By replacing each uliplicaion by a lef shif (<< 1) and each subracion by he corresponding one s copleen value, eq. 7 can be wrien as: ( ) 1#S 1 2:0 + C 1 << 1 #1 + (C << 1) 1:1 #1 + S 2 +1 (8) 1:1 where # denoes he concaenaion operaion and (Z) y:x he exracion of bis x o y of a binary nuber Z. Hence, if he resul of he lef hand-side of inequaliy 8 is represened in he carry-save fora ({C, S}), i can be shown ha only biwise logic operaions and carry-free ariheic are required for is evaluaion. Once again, o perfor he coparison only he carry-ou of he os significan bi us be copued, insead of he full su value (S + 2 C). In fig. 3 i is depiced he proposed hardware srucure for he bes-ach deecion uni, direcly obained fro he previous equaions. Wih his new archiecure, he carry-propagae ype adder and subracer of fig. 2 are replaced by wo carry-save adders and a siple carry-ou deecor. This deecor copues he carry-ou signal ha will be used o obain he Greaer or Equal (GE) signal, supplied o he ain sae achine of he oion esiaor. I can be

6 S C Updae Clock C S Bes-Mach Regiser (C) Bes-Mach Regiser (S) C -1 S -1 S-1-1 S-2-1 S1-1 S0-1 1 / 0 C HA S S-1 S-2 S1 S0 1 / 0 C -1 C-2 C-3 C 0 FA FA CSA FA FA C -1 S -1 C -2 S C 1 S 1 C 0 S 0 C -2-1 C C 1-1 C S+1 FA C S FA C-1 S-1 CSA... FA C2 S2 FA C1 S1 HA C0 S0 0 Carry-ou deecor GE Fig. 3. Proposed carry-free hardware srucure for he bes-ach deecion uni ipleened using only he carry-generae descending branch of a carry-lookahead adder srucure, which provides a fas copuaion of he carry-ou bi of wo operands addiion wihou acually copuing he addiion resul. I is also worh noing ha he proposed archiecure can sill be applied wih increased advanages o copare he parial copued disance erics wih a predefined hreshold (T ). This feaure is paricularly useful in he ipleenaion of soe of he las generaion parial-disance search algorihs and echniques wih sric power resricions [13], which have been recenly proposed o perfor ME in porable and handheld devices: T 1:0 + (C << 1) 1:0 + S 2 V (ζ, γ) = V (ζ 1, γ) (9) The aoun of hardware ha is required for his approach is approxiaely one half of he original one, since only he coponens corresponding o he shaded blocks in fig. 3 are used. 4 Perforance Evaluaion The perforance evaluaion of he proposed ariheic uni for copuing he iniu disance in BME was assessed using experienal resuls obained for

7 Table 1. Ipleenaion resuls obained using he SdCell library based on a 0.18µ CMOS process (a) Tradiional archiecure Srucure F [MHz] Area [µ 2 ] Power [W ] aapah Bes-Mach eecion Uni (b) Proposed archiecure Srucure F [MHz] Area [µ 2 ] Power [W ] aapah Bes-Mach eecion Uni ASIC ipleenaions of he considered srucure. To do so, boh he radiional and he proposed archiecures of such uni were specified in he IEEE-VHL hardware descripion language using fully srucural and paraeerizable descripions of heir srucure and circuis based only on hree siple 2-inpu logic gaes: AN, OR and EX-OR. The fas carry-propagae adder and subracer of he radiional archiecure, see fig. 2, were ipleened using carry-look-ahead adders wih binary ree archiecures [14]. The ipleenaion in ASIC was perfored using Synopsys synhesis ools and a high perforance SdCell library fro Virual Silicon Technology Inc., which is based on a 0.18µ CMOS process fro UMC [15]. The wo archiecures were synhesized for he ypical operaing condiions, V dd = 1.8V and T = 25 o C, and using he suggesed 20k wire odel. Moreover, soe consrains were also iposed o he synhesis ool in order o achieve a iniu area soluion. The obained experienal resuls for he wo ipleenaions deonsrae he superioriy of he proposed archiecure over he radiional srucure. Fro able 1 i can be seen ha he proposed archiecure allows for a reducion of abou 40% in he copuaion ie wih a odes increase of he ipleenaion area, abou 16%. Neverheless, despie such increase he wo circuis presen very siilar power consupion requireens. In fac, when operaing a is axiu operaing frequency ( MHz) he proposed archiecure consues only ore 8% han he radiional circui, also operaing a is axiu operaing frequency ( MHz). However, such high operaing frequencies are no required for low power digial video coding applicaions, such as obile and porable handheld devices ha use non-opial search algorihs [2 6]. For exaple, o encode a CIF frae in real-ie using he 4SS [3] algorih he ME circui does no need o operae a a frequency higher han 150 MHz. Consequenly, by considering he proposed and he radiional archiecures operaing a he sae frequency, he axiu allowed operaing frequency of he radiional one, i can be shown ha he proposed srucure allows a significan reducion in he power consupion requireens, as depiced in able 2. The power consupion of he bes-ach deecion uni is reduced by ore han 60% and he reducion for he coplee daapah is abou 50%.

8 Table 2. Coparaive evaluaion of he power consupion of he radiional and of he proposed archiecures Srucure Tradiional Archiecure Proposed Archiecure aapah 12.75W 6.83W 54% Bes-Mach eecion Uni 14.47W 5.38W 37% The proposed archiecure is able o provide even greaer power saving raes when used as a conrol echanis o avoid needless calculaions in he copuaion of he bes ach for a acroblock [13]. Such copuaions can be avoided by disabling all he logic and ariheic unis used in he copuaion of he adoped aching eric as soon as he parial value of he disance eric for he candidae block under processing exceeds he one already copued for he curren acroblock. On average, his echnique allows o avoid up o 50% of he required copuaions [11]. Consequenly, a ME circui using such echnique and he proposed archiecure for he bes-ach deecion uni is able o reduce in up o 75% is power consupion requireens. 5 Conclusions By analyzing he paricular copuaional characerisics of block-aching oion-esiaion, a coplee carry-free ariheic forulaion was derived and an iproved archiecure was proposed for copuing he iniu disance in block-aching oion-esiaion algorihs. Experienal resuls show he pracical iporance of his novel srucure in he design of efficien real-ie oion esiaors, regardless of he search algorihs and he aching erics adoped by such circuis. By using he proposed ariheic uni, i is no only possible o reduce he copuaion ie in abou 40%, wih only a odes penaly in he cos of abou 16%, bu also o ainain siilar power consupion requireens. Moreover, for low power digial video coding applicaions, such as obile and porable handheld devices, where fas and adapive search algorihs are used, he proposed archiecure provides a very significan reducion of abou 50% in he power consupion of he oion esiaors. Since he proposed ariheic uni exhibis no laency, i can also be direcly used o avoid unnecessary calculaions in he copuaion of he iniu disance value, by using parial disance values o disable specific hardware blocks of he oion esiaors. In such cases, he proposed archiecure is expeced o reduce even furher, o a iniu of 25%, he power consupion requireens of oion esiaors for real-ie video encoding. References 1. Richardson, I.: H.264 and MPEG-4 Video Copression: Video Coding for Nex Generaion Muliedia. Wiley (2003)

9 2. Li, R., Zeng, B., Liou, M.L.: A new hree-sep search algorih for block oion esiaion. IEEE Transacions on Circuis and Syses for Video Technology 4(4) (1994) Po, L.M., Ma, W.C.: A novel four-sep search algorih for fas block oion esiaion. IEEE Transacions on Circuis and Syses for Video Technology 6(3) (1996) Zhu, S., Ma, K.K.: A new diaond search algorih for fas block-aching oion esiaion. IEEE Transacions on Iage Processing 9(2) (2000) Tourapis, A., Au, O., Liou, M.: Predicive oion vecor field adapive search echnique (PMVFAST) - enhancing block based oion esiaion. In: Proceedings of SPIE - Visual Counicaions and Iage Processing (VCIP), San Jose, CA (2001) Tourapis, A.: hanced predicive zonal search for single and uliple frae oion esiaion. In: Proceedings of SPIE - Visual Counicaions and Iage Processing (VCIP), San Jose, CA (2002) Roa, N., Sousa, L.: Efficien and configurable full search block aching processors. IEEE Transacions on Circuis and Syses for Video Technology 12(12) (2002) Saponara, S., Fanucci, L.: aa-adapive oion esiaion algorih and VLSI archiecure design for low-power video syses. IEE Proceedings Copuers and igial Techniques 151(1) (2004) Mocilovic, S., ias, T., Roa, N., Sousa, L.: Applicaion specific insrucion se processor for adapive video oion esiaion. In: 9h Euroicro Conference on igial Syse esign: Archiecures, Mehods and Tools - S (2006) 10. Vassiliadis, S., Hakkennes, E., Wong, S., Pechanek, G.: The su-absolue-difference oion esiaion acceleraor. In: Proc. of he 24h Euroicro Conference. (1998) Sousa, L., Roa, N.: Low-power array archiecures for oion esiaion. In: Workshop on Muliedia Signal Processing - MMSP 99, IEEE (1999) Lengwehasai, K., Orega, A.: Probabilisic parial-disance fas aching algorihs for oion esiaion. IEEE Trans. on Circuis for Video Techn. 11(2) (2001) Sousa, L.: A general ehod for eliinaing redundan copuaions in video coding. IEE Elecronics Leers 36(4) (2000) Roa, N., ias, T., Sousa, L.: Fas adder archiecures: Modeling and experienal evaluaion. In: Proc. of he Conference on esign of Circuis and Inegraed Syses (CIS 03). (2003) Virual Silicon Technology Inc., Tech. Rep. v2.4: esi-roue/11 T M High Perforance Sandard Cell Library (UMC 0.18µ). (2001)

Free and Forced Vibrations of Two Degree of Systems

Free and Forced Vibrations of Two Degree of Systems ree and orced Vibraions of Two Degree of Syses Inroducion: The siple single degree-of-freedo syse can be coupled o anoher of is ind, producing a echanical syse described by wo coupled differenial equaions;