ABB 5STP20N8500 Control Thyristor datasheet

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1 ABB 5SP20N8500 Control hyristor datasheet Patented free-floating silicon technology Low on-state and switching losses Designed for traction, energy and industrial applications Optimum power handling capability Interdigitated amplifying gate ManualLib.com collects and classifies the global product instrunction manuals to help users access anytime and anywhere, helping users make better use of products.

2 V DRM = 8000 V Phase Control hyristor I (AV)M = 2000 A I (RMS) = 3150 A I SM = A V 0 = 1.25 V r = 0.48 mw 5SP 20N8500 Doc. No. 5SYA Dec. 13 Patented free-floating silicon technology Low on-state and switching losses Designed for traction, energy and industrial applications Optimum power handling capability Interdigitated amplifying gate Blocking Parameter Symbol Conditions 5SP 20N8500 Unit Max. surge peak forward and reverse blocking voltage Max repetitive peak forward and reverse blocking voltage V DSM, V RSM V DRM, V RRM t p = 10 ms, f = 5 Hz vj = C, Note V f = 50 Hz, t p = 10 ms, t p1 = 250 ms, vj = C, Note 1, Note V Max crest working forward and reverse voltages V DWM, V RWM 5340 V Critical rate of rise of commutating voltage dv/dt crit Exp. to 0.67 V DRM, vj = 115 C 2000 V/µs Forward leakage current I DRM V DRM, vj = 115 C 1000 ma Reverse leakage current I RRM V RRM, vj = 115 C 1000 ma Note 1: Voltage de-rating factor of 0.11% per C is applicable for vj below +5 C. Note 2: Recommended minimum ratio of V DRM / V DWM or V RRM / V RWM = 2. See App. Note 5SYA Mechanical data Mounting force F M kn Acceleration a Device unclamped 50 m/s 2 Acceleration a Device clamped 100 m/s 2 Weight m 2.9 kg Housing thickness H F M = 90 kn, a = 25 C mm Surface creepage distance D S 56 mm Air strike distance D a 22 mm 1) Maximum rated values indicate limits beyond which damage to the device may occur his Manual:

3 5SP 20N8500 On-state Average on-state current I (AV)M Half sine wave, c = 70 C 2000 A RMS on-state current I (RMS) 3150 A Peak non-repetitive surge I current SM t p = 10 ms, vj = 115 C, A sine half wave, Limiting load integral I 2 t V D = V R = 0 V, after surge A 2 s Peak non-repetitive surge I current SM t p = 10 ms, vj = 115 C, sine half wave, A Limiting load integral I 2 t V R = 0.6 V RRM, after surge A 2 s On-state voltage V I = 1500 A, vj = 115 C 2 V hreshold voltage V (0) 1.25 V I = 700 A A, vj = 115 C Slope resistance r 0.48 mw Holding current I H vj = 25 C 150 ma vj = 115 C 125 ma Latching current I L vj = 25 C 600 ma vj = 115 C 500 ma Switching Critical rate of rise of on-state current Circuit-commutated turn-off time di/dt crit vj = 115 C, I RM = 2000 A, V D 0.67 V DRM, I FG = 2 A, t r = 0.5 µs Cont. f = 50 Hz Cont. f = 1 Hz t q vj = 115 C, I RM = 2000 A, V R = 200 V, di /dt = -1.5 A/µs, V D 0.67 V DRM, dv D /dt = 20 V/µs 250 A/µs 1000 A/µs 1080 µs Reverse recovery charge Q rr vj = 115 C, I RM = 2000 A, µas Reverse recovery current I RM V R = 200 V, di /dt = -1.5 A/µs A Gate turn-on delay time t gd vj = 25 C, V D = 0.4 V RM, I FG = 2 A, t r = 0.5 µs 3 µs Doc. No. 5SYA Dec. 13 page 2 of 7 his Manual:

4 5SP 20N8500 riggering Peak forward gate voltage V FGM 12 V Peak forward gate current I FGM 10 A Peak reverse gate voltage V RGM 10 V Average gate power loss P G(AV) see Fig. 7 W Gate-trigger voltage V G vj = 25 C 2.6 V Gate-trigger current I G vj = 25 C 400 ma Gate non-trigger voltage V GD V D = 0.4 V DRM, vjmax = 115 C 0.3 V Gate non-trigger current I GD V D = 0.4 V DRM, vjmax = 115 C 10 ma hermal Operating junction temperature range vj 115 C Storage temperature range stg C hermal resistance junction to case hermal resistance case to heatsink R th(j-c) R th(j-c)a R th(j-c)c R th(c-h) R th(c-h) Double-side cooled Anode-side cooled Cathode-side cooled Double-side cooled Single-side cooled 5.7 K/kW 11.4 K/kW 11.4 K/kW 1 K/kW 2 K/kW Analytical function for transient thermal impedance: Z th(j-c) (t) = n å i= 1 R i (1- e i R i (K/kW) t i (s) t/ t i ) Fig. 1 ransient thermal impedance (junction-tocase) vs. time Doc. No. 5SYA Dec. 13 page 3 of 7 his Manual:

5 5SP 20N8500 V 25 Max. on-state characteristic model: = A + B I + C ln( I + 1) + D vj vj vj Valid for I = A vj I V 115 Max. on-state characteristic model: = A + B I + C ln( I + 1) + D vj vj vj Valid for I = A vj I A 25 B 25 C 25 D 25 A 115 B 115 C 115 D Fig. 2 On-state voltage characteristics Fig. 3 On-state voltage characteristics Fig. 4 On-state power dissipation vs. mean on-state current, turn-on losses excluded Fig. 5 Max. permissible case temperature vs. mean on-state current, switching losses ignored Doc. No. 5SYA Dec. 13 page 4 of 7 his Manual:

6 5SP 20N8500 I G (t) I GM» 2..5 A 100 % 90 % I GM I Gon di G /dt t r t p (I GM ) ³ 1.5 I G ³ 2 A/ms 1 ms» ms di G /dt I Gon 10 % t r tp (IGM ) t p (I Gon ) t Fig. 6 Recommended gate current waveform Fig. 7 Max. peak gate power loss Fig. 8 Reverse recovery charge vs. decay rate of on-state current Fig. 9 Peak reverse recovery current vs. decay rate of on-state current Doc. No. 5SYA Dec. 13 page 5 of 7 his Manual:

7 urn-on and urn-off losses 5SP 20N8500 Fig. 10 urn-on energy, half sinusoidal waves Fig. 11 urn-on energy, rectangular waves Fig. 12 urn-off energy, half sinusoidal waves Fig. 13 urn-off energy, rectangular waves -di /dt I (t) I (t), V(t) Q rr -I RRM V(t) t -V 0 otal power loss for repetitive waveforms: PO = P + Won f + Woff f where 1 P = I V ò 0 ( I ) dt -dv/dt com -V RRM Fig. 14 Current and voltage waveforms at turn-off Fig. 15 Relationships for power loss Doc. No. 5SYA Dec. 13 page 6 of 7 his Manual:

8 5SP 20N8500 g g Fig. 16 Device Outline Drawing Related documents: 5SYA 2020 Design of RC-Snubber for Phase Control Applications 5SYA SYA SYA SYA SZK SZK 9105 Voltage definitions for phase control thyristors and diodes Voltage ratings of high power semiconductors Gate-Drive Recommendations for PC's Recommendations regarding mechanical clamping of Press Pack High Power Semiconductors Specification of environmental class for pressure contact diodes, PCs and GO, SORAGE available on request, please contact factory Specification of environmental class for pressure contact diodes, PCs and GO, RANSPORAION available on request, please contact factory Please refer to for current version of documents. ABB Switzerland Ltd Doc. No. 5SYA Dec. 13 Semiconductors Fabrikstrasse 3 CH-5600 Lenzburg, Switzerland elephone +41 (0) Fax +41 (0) abbsem@ch.abb.com Internet his Manual:

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