1000-RF-tag emulation with an 8bit micro processor

Transcription

1 1000-RF-tag emulatio with a 8bit micro processor Naoyasu Kamiya, Ji Mitsugi, Keichi Sugimoto, Osamu Nakamura ad Ju Murai Auto-ID Lab. Japa, Keio Uiversity, Japa Graduate School of Media Desig, Keio Uiversity, Japa {kamiya, mel, mitsugi, osamu, ju}@sfc.wide.ad.jp Abstract UHF bad passive RFID is a essetial idetificatio techology i pervasive computig world. Oe of the idustrial demads to UHF bad passive RFID is fast readig of may RF tags. This is particularly relevat for item-level-taggig of CDs, DVDs, books ad cosumer electroics. May high-speed MAC protocols have bee proposed thus far. Quatitative evaluatio of readig speed, however, is ot easy because we eed to lay out may RF tags ad measure the readig duratios usually through iterrogator APIs, which differ from iterrogator to iterrogator. I this paper, the authors propose two efficiet multiple RF tag emulatio algorithms which leverage the probabilistic ature of MAC protocol. We have implemeted the algorithms oto a programmable battery assisted passive tag BAP, equipped with a 8bit micro processor ad evaluated the readig speed of commercial iterrogators. It was revealed that the BAP ca efficietly emulate the behavior of more tha 1000 Ge2 RF tags for the readig speed evaluatio with a trivial pealty o accuracy. I. INTRODUCTION Radio Frequecy IDetificatio RFID is the quitessetial techology for pervasive computig. It has bee widely used i may idustries, such as cosumer electroics, airlie, books, foods ad healthcare. Curretly, pallet-level-taggig ad caselevel-taggig i Supply Chai Maagemet SCM are the predomiat usage of passive RFID. The item-level-taggig will be possible i the future whe we achieve lower uit price for a RF tag, better iterrogators ad a supportig iformatio system. Idustries, cosumer electroics i particular, seek idividual item-level-taggig as it aims at log-term maagemet of their products as i from cradle to grave [1]. The idea is that RF tag-id ad cosumers are uiformly maaged, ad i case of a product recall for example, the retailer ca locate where each item is ad who the ower is. This mechaism also proves helpful i the evets of products beig stole, abadoed ad recycled. For item-level-taggig to be substatiated, it is ultimately preferable for a iterrogator to be able to read all the RF tags items i the ivetory which could be over 1000 RF tags at oce[2]. UHF bad MHz passive RFID is the leadig cadidate for this role as it ca accommodate a relatively log-rage automatic idetificatio, probably up to 5 meters. Therefore, the acceleratio of RFID ivetory process multiple RF tag iterrogatio have become active research topics. The aim is to be able to read multiple RF tags faster ad more accurately i SCM Fig.1. Whe readig mutiple RF tags, ati-collisio is crucial. Ati-Collisio of RFID is two major classes of biary tree method ad ALOHA method[3]. This paper assumes the latter Fig. 1. Image of SCM usig RFID Fig. 2. Example of state machie o RF tag. method, particularly a frame slotted ALOHA method that is ofte used o UHF bad passive RFID. RF tags correspod ati-collisio basis frame slotted ALOHA method to have a state machie. Fig.2 shows a example of state machie. Recetly, differet MAC protocols Ati-Collisio algorithms have bee researched ad developed to optimize RFID ivetory with dyamic frame slotted ALOHA method, a algorithm which allows frame size to be chaged dyamically depedig o the remaiig backlogged umber of RF tags withi the ivetory[4][5][6]. At the preset stage, most of performace evaluatios for MAC protocols are doe by umerical simulatios. To actually test ad use a MAC protocol, we eed to have a iterrogator with the MAC protocol read multiple RF tags, measure its ivetory time ad compare the result with those of other MAC protocols Fig.3. This testig method however has two major disadvatages; 1 experimeters had to physically prepare ad lay out a umber of actual RF tags for each experimet. 2 it is hard to esure reproducibility because radio propagatio eviromet varies every time ad it is virtually impossible to place RF tags i the same precise maer eg. agle, iterval as before. Besides,

2 MAC behavior of over 1000 RF tags with a programmable battery assisted passive tag which is cotrolled by a 8bit micro processor. Fially, Sectio V cocludes the paper. II. M ULTIPLE RF TAG EMULATION ALGORITHM I this sectio, we first explai the methodology for multiple RF tags emulatio usig oe state machie. We the itroduce two emulatio algorithms; Depedet Trial Model ad Idepedet Trial Model. Lastly, we will discuss the accuracy ad efficiecy of both emulatio algorithms with umerical simulatios. A. Multiple RF tags emulatio usig oe state machie Fig. 3. Experimetal image for high-speed readig of multiple RF tags each RF tag has a slightly differet sesitivity ad backscatter power level. Those problems ca be solved by multiple RF tags emulator. Although ot for RF tags, Wag[7] has developed a upper-layer protocol emulator that emulates multiple Software Defied Radio SDR devices i wireless SDR etwork. The upper-layer protocol emulatio requires the implemetatio of actual SDR state machies that correspod to the umber of SDR devices that it wats to emulate. As far as RF tag emulatio is cocered, there is a emulator[8] that emulates a sigle RF tag with power receptio. But there has t bee a emulator for multiple RF tags, which is where our research focused. To implemet multiple RF tags emulator, oe would thik to apply the same fudametals of the aforemetioed upperlayer protocol emulator. I other words, we implemet actual RF tag state machies that correspod to the umber of RF tags we wat to emulate. But this requires the emulator hardware of costly calculatio, ad is ot ecessarily efficiet. So we devised two efficiet emulatio algorithms[9] for multiple RF tags, usig the probabilistic ature of MAC protocol 1. Our algorithms require oly a sigle state machie for multiple RF tags emulatio, thus ot ecessitatig costly hardware calculatio, eablig a low-cost hardware to emulate a relatively large umber of RF tags. This paper delieates the implemetatio methodology for 1000 RF tags emulatio usig a BAP[12] equipped with a 8bit micro processor. The remaider of this paper is orgaized as follows. I Sectio II, the two multiple RF tags emulatio algorithms preseted i[9] are outlied for the completeess of the paper. I Sectio III, after idetifyig the bottleeck for icreasig the umber of emulated RF tags, we propose a creative implemetatio methodology to avoid the bottleeck by precalculatig the essetial part of the emulatio. I Sectio IV, we show by experimets that it is possible to emulate the 1 While our algorithms hold applicability to all of ALOHA method, for quatitative evaluatio, we adopt EPCglobal Class-1 Geeratio-2 protocol [10]. This specificatio is idetical to ISO/IEC type C[11] based o frame slotted ALOHA method i this particular istace. The simplest multiple RF tags emulatio algorithm implemets a idepedet state machie for each RF tag to be emulated. This is called Multi State Machie Model i which each state machie idepedetly operates withi a ivetory frame ad returs its respose for every slot based o its radom umber geeratio Fig. 4 left. For multiple RF tags emulatio usig oe state machie, that determies RF tag s respose for each slot based o the probability of the slot beig either E Empty or S Success or C Collisio. The probability calculatio factors are the umber of emulated RF tags ad the frame size. More specifically, we geerate a radom umber R betwee 0-1 for every slot ad defie: 1 if R 5 E, the Empty 2 if E <R 5 E+S, the Success 3 else, Collisio Fig.4right shows multiple RF tags emulatio method usig oe state machie. B. Depedet Trial Model To accurately emulate the respose of multiple RF tags, we eed to calculate E, S ad C, cosiderig the outcome of previous slots. The emulatio algorithm predicated upo this pricipal is amed Depedet Trial Model, as the probability of Empty, Success ad Collisio for the ext slot depeds o its previous slot. Eq.1 shows E, S ad Ca, where a idicates the umber of RF tags collidig, L idicates the frame size, i idicates the slot umber 0 to L 1, idicates the umber of RF tags that have ot replied i the curret frame. If slot i is Success, the we subtract 1 form. If slot i is Collisio, the we subtract a from. E S C2... C 1 1 L i

3 Fig. 4. Multiple RF tags emulatio method usig oe state machie. I Depedet Trial Model, the probability is calculated by each slots ad the calculatio result is compared to radom umber R ad the respose is replied to the iterrogator. C. Idepedet Trial Model This model sigificatly reduces calculatio cost of Depedet Trial Model. The upside is so it ca emulate may more RF tags while the dowside beig the degradatio of the accuracy of emulatio. Idepedet Trial Model has the followig two characteristics: 1 It does ot icorporatig the result of previous slots whe calculatig the probability of E, S ad C for ext slot. 2 It does ot calculate the umber of collidig RF tags i case of C. Eq.2 shows how E, S ad C are calculated i this model. E 1 1 L S L 1 1 L C 1 E S 2 I Idepedet Trial Model, it is possible, though ot palatable, that more or less RF tags tha actually beig emulated may respod. To miimize this problem with oresource itesive calculatio, Idepedet Trial Model adopts the followig costraits: 1 if Success, decremet by 1. 2 if Collisio, decremet by 2. 3 if Collisio ad is 1, Collisio is Success. 4 if 0, the Empty. 5 if a slot is the last i a frame, a if 1, the Success. b if 2, the Collisio. D. Evaluatio of proposal algorithms by umerical simulatio Herei we evaluate the emulatio accuracy ad the processig time of our algorithms by comparig with the values of the umerical simulatio of Multi State Machie Model[9]. The umerical simulatio was doe with MATLAB. We coducted a test where we couted the umber of slots required for a ivetory to be completed static frame slotted ALOHA, frame Fig. 5. Evaluatio for emulatio accuracy whose measure is cumulative probability of ivetory slots. size 16, umber of RF tags 30. I this particular test, a ivetory is deemed completed whe all 30 RF tags have bee read sice we kow exactly how may RF tags there are, whereas the ormal termiatio coditio is whe there is a empty frame as the iterrogator ever kows how may RF tags it is tryig to read. Therefore, our ivetory termiatio coditio allows us to cout precisely the total umber of slots that was actually eeded for all the RF tags to be read. The test was repeated for times for each model. Fig.5 shows the umber of slots ad its cumulative probability distributio. Other our paper[9] has show processig times evaluatio ad other types of emulatio accuracy evaluatio i additio to the above evaluatio. The results verify that, compared with Multi State Machie Model, Depedet Trial Model has higher calculatio efficiecy28.8% reductio ad sufficiet emulatio accuracy, whereas Idepedet Trial Model exhibits sigificatly higher calculatio efficiecy85.5% reductio ad slightly degraded emulatio accuracy. III. IMPLEMENTATION TO ENABLE 1000 RF TAGS EMULATION WITH A BAP I this sectio, we idetify the bottleeck for emulatig a large populatio of RF tags. We, the, show a creative method to avoid the bottleeck by pre-calculatig ad storig

4 Fig. 8. Approximatio for iteger arithmetic. Fig. 6. Outer appearace of BAP. Fig. 7. Lik timig o EPCglobal Class-1 Geeratio-2 protocol[10]. the probabilistic states before a emulatio. The hardware we use for the implemetatio is a programmable battery assisted passive tag BAP [12] which is cotrolled by a 8bit micro processor, AVR Atmega64L. The reaso we used the BAP is that the BAP already has compatible state machie model with commercial iterrogators as well as the ecessary RF ad basebad circuitry ad 4Mbit SRAM, which are idispesable for the proposed implemetatio. We just eed to modify the software to implemet the emulatio algorithm. Fig.6 shows a BAP. BAP provides two modes of coectio; wired ad wireless. A. Bottleeck for a large umber of RF tags emulatio EPCglobal Class-1 Geeratio-2 protocol stipulates that a RF tag must respod to a iterrogator commad withi T 1 Fig.7, which is determied by iterrogator s trasmissio speed. I other words, the maximum umber of emulatable RF tags is determied by how much computatio we ca maage to pack ito this T 1. Thus, we modified ad ecoomized our calculatio equatios as follows i the previous study First, we explai Idepedet Trial Model ; First, Eq.2 ca be expressed as Eq.3. E L 1 2 Q 1 1 L 1 2Q S L 1 2 Q Q Secod, because floatig poit computatio itesively exhausts a 8bit micro processor, we multiply E ad S by 2 16 ad make them itegers, thus obtaiig Eq was selected as it ca directly be used to accord with EPCglobal Class-1 Geeratio-2 RN16. E I 2 16 L 1 2 Q 1 1 L 1 2Q S I 2 16 L 1 2 Q Q To multiply emulatable RF tags, we modify Eq.4 to Eq.5. E I 2 16 Q L 1 2 Q 1 L 1 S I 2 16 Q L 1 2 Q 1 5 Eq.5 ca avoid iteger overflow by followig calculatig routie. uit16 t x 1 16 q;... forii1; ii< 1; ii++ { x x l 1; x x q 1; ifx&1 { x x 1+1; } else { x x 1; } } ei x l 1; si x ; For Depedet Trial Model, we substitute the frame size L, 2 Q with L i to facilitate iteger computatio as i Eq.6. E I 2 16 Q L i Q L i 1 L i L i S I 2 16 Q L i Q L i L i 6 We have implemeted the algorithms to the BAP ad measured the maximum umber of emulatable RF tags for each model with T 1 250µs 40kbps of iterrogator to RF tag commuicatio lik comes dow as follows: Depedet Trial Model: 7 RF tags Idepedet Trial Model: 38 RF tags Those umbers are obviously ot large eough for itemlevel-taggig.

5 Fig. 9. Implemetatio of Idepedet Trial Model with pre-calculated probabilistic states. B. A creative implemetatio by pre-calculatig the probabilistic states Thus for further computatio efficiecy, we devise a method to pre-calculate the probabilistic states show i Fig.8 before a ivetory ad utilize the 4Mbit SRAM of BAP to store the states. By doig this, the micro processor oly eeds to access those computed values with the correspodig frame size. This is dramatically effective as the read-access time for SRAM is always small ad cosistet whereas the probability computatio time grows proportioally for a bigger value of. Because we express the probabilistic state i 16 bit itegers, 131,072 patters ca be stored i a 4Mbit SRAM /16 2. EPCglobal Class-1 Geeratio-2 protocol stipulates that Q is betwee Cosequetly, 16 patters of frame size L exist 2 0 1, 2 1 2, , O aother frot, L i exists patters 1 2, 2, 3..., Depedet Trial Model is required to, but ot ecessarily i reality, store patters of probability calculatio result because it does ot iclude L i i probability calculatio equatios. Depedet Trial Model eeds to store C I values ie, C to C 2 16 i additio to E I ad S I. As a result, Depedet Trial Model eeds a large amout of memory capacity. Idepedet Trial Model just stores 16 patters probability calculatio results because it is ot icluded ad oly L is icluded. Additioally Idepedet Trial Model just store E I ad S I because it does ot calculate the umber of collidig RF tags. As a result, Idepedet Trial Model gives us 8191 as the possible maximum umber of emulatable RF tags /16 1, from 0 to 8191 with a trivial pealty i the emulatio accuracy show i Fig.5. Fig.9 shows the implemetatio of Idepedet Trial Model with precalculated probabilistic states. IV. PERFORMANCE EVALUATION IMPLEMENTED IN BAP Herei we test the emulatio of 1000 RF tags, specifically usig Idepedet Trial Model with pre-calculated probabilistic states implemeted i BAP. The emulatio is evaluated 2 L1,i0 or L2,i1 or L4,i3... or L32768,i32767 Fig. 10. Evaluatio for emulatio accuracy whose measure is success slot percetage Frame size 128, 256 TABLE I MAXIMUM NUMBER OF RF TAGS CHANGING TRANSMISSION RATE Implemetatio 40kbps 80kbps Depedet Trial Model 7 2 Idepedet Trial Model Idepedet Trial Model with pre-calculated probabilistic states from three agles; 1 emulatio accuracy. 2 the maximum umber of RF tags probability calculatable withi T 1. 3 ivetory completio speed with commercial iterrogators. A. Emulatio accuracy We tested for 1000 frames with a fixed frame size 128 ad 256 so as to obtai Fig.10 which shows Success slot percetage versus umber or RF tags from 2 to For compariso, we also icorporated i the graph the result of umerical simulatio of Multi State Machie Model. Fig.10 idicates that Idepedet Trial Model with precalculated probabilistic states implemeted i BAP holds almost idetical curve with its umerical simulatio couterpart. Sice success slot percetage per frame differs from its umerical simulatio by less tha 0.2%, the emulatio for a etire ivetory, which usually cosists of scores of frames, ca cotai its error-boud withi a few %. B. Maximum umber of RF tags probability calculatable withi T 1 Sice the maximum umber of emulatable RF tags is determied by how much computatio ca be executed withi T 1, we couted the maximum umber of emulatable RF tags for three models Depedet Trial Model, Idepedet Trial Model, Idepedet Trial Model with pre-calculated probabilistic states with two commo iterrogators trasmissio speeds, 40kbps T 1 250µs ad 80kbps T 1 125µs. Table I shows the result. The probability computatio time is bottleeck whe the probability is computed while i ivetory, the maximum umber of emulatable RF tags decreases whe iterrogators trasmissio speed raises. This is dramatically effective as the

6 pre-calculated probabilistic states has successfully emulated 1000 RF tags. With dyamic frame slotted ALOHA method, the average slots umber teds to icrease i liear proportio to the umber of RF tags[6]. Fig. 11. Experimetal set up Fig. 12. Evaluatio of implemetatios read-access time for SRAM is always small ad cosistet whereas the probability computatio time grows proportioally for a bigger value of. With SRAM, the maximum umber of emulatable RF tags remais ualtered by iterrogators trasmissio speed. Cosequetly, Idepedet Trial Model with pre-calculated probabilistic states provides a remarkably effectual threshold for evaluatig a iterrogator with high speed trasmissio. C. Ivetory completio speed with commercial iterrogators For each model, we measured the ivetory completio speed defied i this case by the umber of slots couted by the ed of the last frame. The iterrogator coects to BAP o wire that combies a atteuator. Fig.11. The iterrogator s trasmissio speed is 40kbps. Ad the iterrogator uses dyamic frame slotted ALOHA method, a algorithm which allows frame size to be chaged dyamically depedig o the remaiig umber of RF tags, for acceleratio of the ivetory. The umber of emulated RF tags are set at 7, 38, 50, 100, 200, 500 ad For each of which we repeat a ivetory for 1000 times. Fig.12 shows the average umber of slots required to complete the ivetory. For the 7 RF tag emulatio case, Idepedet Trial Model with pre-calculated probabilistic states has a average of slots, oly differig by 4.7% from of Depedet Trial Model, which has bee established as the very accurate emulatio algorithm. Furthermore, Idepedet Trial Model with V. CONCLUSION This paper preseted how MAC protocol of more tha 1000 RF tags ca be emulated with a 8bit micro processor i a programmable battery assisted passive tag. Such emulatio essetially mitigates the burde to lay out a umber of RF tags whe we evaluate the readig speed of commercial iterrogators. It also secures the fairess amog evaluatios. I terms of computatio cost, the emulatio is doe most efficietly with oe state machie usig the probabilistic ature of multiple RF tags behavior. Depedet Trial Model has strog accuracy i its emulatio ad yet suffers a relatively high computatio cost. Idepedet Trial Model has less accuracy, but has sigificatly efficiet computatio cost. The bottleeck for the umber of RF tags which ca be emulated is the executable computatios withi the allowed respose time, which depeds o the air protocol stadard. The emulatio ca be made dramatically further efficiet, therefore, by storig its coceivable computatio results i advace of ivetory. This is particularly true for Idepedet Trial Model sice the umber of probabilistic states that eed to be stored is withi the rage of a affordable embedded memory. It is show by experimet that MAC behavior of over 1000 RF tags ca be emulated with this pre-calculatio usig 8bit micro processor with 4Mbit SRAM. REFERENCES [1] Oe RFID Tag From Cradle to Grave, RFID joural, pp.28 34, [2] EPCglobal, Item-Level Taggig ILT Protocol Requiremets Documet Versio 1.0.0, [3] K. Fikezeller, RFID Hadbook Secod Editio. Wiley, [4] H. Vogt, Multiple Object Idetificatio with Passive RFID Tags, IEEE Iteratioal Coferece o Systems, Ma ad Cyberetics, vol.3, pp.6 9, [5] W.-T. Che ad G.-H. Li, A efficiet ati-collisio method for tag idetificatio i a RFID system, IEICE Tras. Commu. vol.e89-b, o.12, pp , [6] Y. Kawakita, J. Mitsugi, O. Nakamura, ad J. Murai, Acceleratio of UHF-bad RFID ivetory leveragig capture effect, IEICE Tras. Commu. Japaese Editio, vol.j91-b, o.10, pp , [7] C. Wag, Z. Shao, ad M. Fujise, Desig of upper-layer protocol emulator for SDR prototype of IEEE g ad Bluetooth, Commuicatios ad Iformatio Techology, ISCIT IEEE Iteratioal Symposium o, vol.2, pp , [8] R. Redemske ad R. Fletcher, Desig of UHF RFID Emulators with Applicatios to RFID Testig ad Data Trasport, Proceedigs of 4th IEEE Coferece o Automatic Idetificatio Techologies, pp , [9] N. Kamiya, J. Mitsugi, O. Nakamura, ad J. Murai, Efficiet Emulatio Algorithms for Multiple RF tags i UHF bad RFID, IEICE Techical Report Japaese Editio, SIS , vol.107, o.547, pp.35 40, [10] EPCglobal, Class 1 Geeratio 2 UHF Air Iterface Protocol Stadard Versio 1.1.0, [11] ISO/IEC, ISO/IEC Iformatio techology Radio frequecy idetificatio for item maagemet Part 6: Parameters for air iterface commuicatios at 860 MHz to 960 MHz AMENDMENT 1: Extesio with Type C ad update of Types A ad B, [12] J. Mitsugi ad O. Tokumasu, A Practical Method for UHF RFID Iterrogatio Area Measuremet Usig Battery Assisted Passive Tag, IEICE Tras. Commu, vol.91, o.4, pp , 2008.