Introduction to Digital Electronics

Transcription

1 Introduction to Digital Electronics

2 Board of Studies Prof. H. N. Verma Vice- Chancellor Jaipur National University, Jaipur Dr. Rajendra Takale Prof. and Head Academics SBPIM, Pune Prof. M. K. Ghadoliya Director, School of Distance Education and Learning Jaipur National University, Jaipur Subject Expert Panel Dr. Ramchandra G. Pawar Director, SIBACA, Lonavala Pune Ashwini Pandit Subject Matter Expert Content Review Panel Gaurav Modi Subject Matter Expert Shubhada Pawar Subject Matter Expert Copyright This book contains the course content for Introduction to Digital Electronics. First Edition 2013 Printed by Universal Training Solutions Private Limited Address 05 th Floor, I-Space, Bavdhan, Pune All rights reserved. This book or any portion thereof may not, in any form or by any means including electronic or mechanical or photocopying or recording, be reproduced or distributed or transmitted or stored in a retrieval system or be broadcasted or transmitted.

3 Index I. Content...II II. List of Figures... VIII III. List of Tables... X IV. Abbreviations...XI V. Application VI. Bibliography VII. Self Assessment Answers Book at a Glance III

4 Contents Chapter I... 1 Digital Electronic Signals and Switches... 1 Aim... 1 Objectives... 1 Learning outcome Introduction Digital Signal and Logic Levels Semiconductor Devices Semiconductor Diode P-N Junction Characteristics Switching Characteristics of Semiconductor Diode Transistors n-p-n and p-n-p Bipolar Junction Transistor FET MOSFET JFET Switches Diodes BJT Switch MOSFETs Summary References Recommended Reading Self Assessment Chapter II Number System and Codes Aim Objectives Learning outcome Introduction Binary System Binary to Decimal Conversion Decimal to Binary Conversion Octal Number System Octal to Decimal Conversion Decimal to Octal Conversion Octal to Binary Conversion Binary to Octal Conversion Hexadecimal Number System Hex to Decimal Conversion Decimal to Hex Conversion Hex to Binary Conversion Binary to Hex Conversion Hex to Octal Conversion Octal to Hex Conversion Codes BCD Code ASCII Code Code Gray Excess Binary Arithmetic Addition IV

5 Addition of Signed Numbers Subtraction Multiplication Division Summary References Recommended Reading Self Assessment Chapter III Logic Gates Aim Objectives Learning outcome Introduction Logic Gates NOT Gate OR Gate AND Gate NAND Gate NOR Gate XOR Gate XNOR Truth Tables Description of the Six Logic Gates Logic Circuits/Networks Example Example Example Summary References Recommended Reading Self Assessment Chapter IV Boolean Algebra Aim Objectives Learning outcome Introduction Fundamental Laws DeMorgan s Theorems Boolean Identities Logic Minimisation Karnaugh Maps (K-Maps) Quine McCluskey Method Combinatorial Circuits NOT Gate AND Gate OR Gate Summary References Recommended Reading Self Assessment V

6 Chapter V Combinational Logic Design Using MSI Circuit Aim Objectives Learning outcome Introduction Multiplexing and Demultiplexing Implementation using MUX Adder Binary Adders Full Adder Half Adder Binary Subtractor 's Complement Adder and Subtractor s Complement Adder and Subtractor Decoders and Encoders Differences between Decoder and Multiplexer Code Converters BCD-binary Conversion Binary-Grey Conversion Summary References Recommended Reading Self Assessment Chapter VI Flip-Flops Aim Objectives Learning outcome Introduction Flip-Flops Simple Latch or S-R Flip-Flop (Set-Reset Flip-Flop) Forbidden S-R FF Inputs S-R FF Uses JK-type Flip Flops Clocked Circuits Clocked FF Clocked R-S FF D Flip-Flop "Master-Slave" or Delay Flip-Flops The Master-Slave D Flip-Flop The J-K Master-Slave Flip-Flop The Toggle Flip-Flop (T type) Excitation tables Shift Registers Counters Summary References Recommended Reading Self Assessment VI

7 Chapter VII Digital Logic Families Aim Objectives Learning outcome Introduction Classification of Digital ICs Characteristics of Digital ICs Fan-in Fan-out Propagation Delays Noise Margin/Immunity Power Dissipation Logic Families Types of Logic Family Resistor Transistor Logic (RTL) Diode Logic (DL) Diode Transistor Logic (DTL) Emitter Coupled Logic (ECL) Transistor-Transistor Logic (TTL) Complementary Metal Oxide Semiconductor (CMOS) LOGIC CMOS NOT Gate CMOS NOR Gate CMOS NAND Gate Comparison between Important Logic Families Summary References Recommended Reading Self Assessment Chapter VIII Semiconductor Memories Aim Objectives Learning outcome Introduction Memory Organisation Digital Computer Digital Computer Organisation Classification of Memory RAM (Random Access Memory) ROM (Read Only Memory) Flash Memory Cache Memory Virtual Memory Summary References Recommended Reading Self Assessment VII

8 List of Figures Fig. 1.1 Digital and analog signal... 3 Fig. 1.2 Diode... 4 Fig. 1.3 (a) Forward biased p-n junction diode; (b) Forward current flow and charge distribution; (c) Diode rectifier symbol... 5 Fig. 1.4 (a) Reverse biased p-n junction diode; (b) reverse current flow and charge distribution; (c) Diode rectifier symbol... 5 Fig. 1.5 I-V Characteristics of a diode... 6 Fig. 1.6 Transistor... 7 Fig. 1.7 Structure and Symbols of (a) n-p-n; (b) p-n-p BJT in forward active mode biasing... 7 Fig. 1.8 FET... 8 Fig. 1.9 MOSFET... 9 Fig JFET... 9 Fig (a) Diode switch; (b) npn and pnp BJT; (c) Transistor switch Fig MOSFET switch Fig. 2.1 Positional value (weight) of each bit Fig s complement Fig. 2.3 (a) Decimal to binary conversion Fig. 2.3 (b) Decimal to binary conversion Fig. 2.4 (a) Decimal to binary conversion Fig. 2.4 (b) Decimal to binary conversion Fig. 2.5 Octal number system Fig. 2.6 (a) Decimal to octal conversion Fig. 2.6 (b) Decimal to octal conversion Fig. 2.7 Hexadecimal number showing positional values (weight) of digits Fig. 2.8 (a) Decimal to hex conversion Fig. 2.8 (b) Decimal to hex conversion Fig. 3.1 Logic gates (a) Basic logic gates; (b) Compound logic gates (c) Truth tables for compound gates Fig. 3.2 Not gate Fig. 3.3 AND gate Fig. 3.4 OR gate Fig. 3.5 NAND gate Fig. 3.6 NOR gate Fig. 3.7 XOR gate Fig. 3.8 Logic circuit Fig. 3.9 Logic circuit Fig Logic circuit Fig. 4.1 K-map Fig. 4.2 Steps for construction of 2-variable K-map (a); (b); (c) Fig. 4.3 (a) Overlapped groups; (b) Rolling; (c) Don t care conditions of K-maps Fig. 4.4 Combinatorial circuits Fig. 4.5 NOT gate Fig. 4.6 AND gate Fig. 4.7 OR gate Fig. 4.8 Circuit diagram Fig. 4.9 Circuit diagram Fig. 5.1 Four to one multiplexer Fig. 5.2 DEMUX Fig. 5.3 Multiplexer implementation of f = Σ (0, 1, 6, 7, 11) Fig. 5.4 Binary addition: (a) General adder; (b) Full adder of two 1-bit words Fig. 5.5 Truth table and logical map of the full adder: (a) Truth table; (b) Si map; (c) Ci+1 map Fig. 5.6 Half adder truth table and diagram Fig s complement adder/subtractor with overflow detection VIII

9 Fig s complement adder/subtractor Fig. 5.9 Decoder Fig BCD-Binary conversion Fig Two digits BCD to binary converter (74184 circuit) and 8 bit binary to 3 digit BCD converter (74185 circuits) Fig Binary-Grey conversion Fig. 6.1 Representation of sequential logic Fig. 6.2 Basic flip flop or latch Fig. 6.3 (a) S-R Flip Flop; (b) Truth table for S-R FF Fig. 6.4 JK type flip flop Fig. 6.5 Pulse train Fig. 6.6 (a) Clocked R-S FF; (b) Clocked R-S FF truth table Fig. 6.7 (a) D flip-flop (b) D flip-flop truth table Fig. 6.8 The master-slave D flip-flop Fig. 6.9 The J-K master-slave flip-flop Fig (a) Toggle flip-flop; (b) Toggle flip-flop truth table Fig Three element shift register Fig Group of T type flip flops acting as a ring counter Fig Waveform chart of four -stage ripple counter Fig Four element synchronous counter Fig. 7.1 Propagation delay Fig. 7.2 Noise immunity Fig. 7.3 Effect of noise Fig. 7.4 Power dissipation Fig. 7.5 RTL Fig. 7.6 Diode logic with basic OR gate Fig. 7.7 Diode logic with basic AND gate Fig. 7.8 DTL Fig. 7.9 Emitter coupled logic Fig A 2-input TTL NAND gate with a totem pole output stage Fig CMOS NOT gate Fig CMOS NOR gate Fig CMOS NAND gate Fig. 8.1 Organisation of memory systems Fig. 8.2 Overall architecture of memory design Fig. 8.3 Classification of Semiconductor memory types IX

10 List of Tables Table 2.1 Counting binary numbers Table 2.2 Binary equivalent of octal digit Table 2.3 Binary and decimal equivalent of each hex digit Table 2.4 Gray code Table 2.5 One-bit binary addition Table 3.1 Truth table Table 3.2 Truth table Table 3.3 Truth table Table 3.4 Truth table Table 3.5 Truth table Table 3.6 Truth table Table 3.7 Truth table Table 3.8 Truth table Table 3.9 Truth table Table 3.10 Truth table Table 3.11 Truth table Table 3.12 Truth table Table 4.1 Fundamental products for two inputs Table 4.2 Fundamental products for three inputs Table 4.3 Truth table for SOP equation Table 4.4 Truth table for SOP equation Table 4.5 Truth table Table 4.6 Truth table Table 4.7 Truth table Table 4.8 Truth table Table 4.9 Truth table Table 5.1 Differences between decoder and multiplexer Table 6.1 Excitation table Table 6.2 States of flip flops for ripple counter Table 7.1 Digital IC classification Table 7.2 Comparison between important logic families Table 8.1 Differences between SRAM and DRAM X

11 Abbreviations ASCII - American Standard Code for Information Interchange BCD - Binary Coded Decimal BJT - Bipolar Junction Transistor CML - Current Mode Logic CMOS - Complementary Metal Oxide Semiconductor D Flip Flop - Data Flip Flop DEMUX - Demultiplexer DL - Diode Logic DTL - Diode Transistor Logic ECL - Emitter Coupled Logic FET - Field Effect Transistor FF - Flip Flops Hex - Hexadecimal IC - Integrated Circuit IGFET - Insulated-gate FET IIL - Integrated Injection Logic JFET - Junction FET K-map - Karnaugh Map LSB - Least Significant Bit MOSFET - Metal-oxide- semiconductor FET MSB - Most Significant Bit MUX - Multiplexer NMOS - N-channel MOSFETs PMOS - P-channel MOSFETs P-N Junction - Positive type (P) and Negative type (N) POS - Product of Sums RTL - Resistor Transistor Logic SOP - Sum-of-Products Equations S-R Flip-Flop - SET-RESET Flip Flop T Flip Flop - Toggle Flip Flop TTL - Transistor Transistor Logic XS-3 - Excess-3 Binary-coded Decimal XI

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13 Chapter I Digital Electronic Signals and Switches Aim The aim of this chapter is to: explain digital electronic signals and logic levels determine the significance of semiconductor devices explicate the role of switches Objectives The objectives of this chapter are to: explain the concept of active high and active low levels enlist the characteristics of semiconductor diodes explain the concept of biasing Learning outcome At the end of this chapter, you will be able to: identify the characteristics of p-n junction diode understand forward and reverse biasing recognise and explain types of transistors 1

14 Introduction to Digital Electronics 1.1 Introduction Electronic amplifiers are used to amplify electrical signals. These types of signals are continuous signals and can have any value in a limited range and are known as analog signals. The electronic circuits used to process these signals are known as analog circuits and the systems built around this kind of operation are known as analog systems. On the other hand, in an electronic calculator, the input is given with the help of switches. This is converted in to electrical signals which have two discrete values or levels. One of these may be called as Low level and the other one as High level. The signal will always be of one of the two levels. The actual value of the signal is immaterial as long as it is within the specified range of Low or High level. This type of signal is known as a digital signal. 1.2 Digital Signal and Logic Levels Digital electronics represent signals by discrete bands of analog levels, rather than by a continuous range. All levels within a band represent the same signal state. Relatively smaller changes to the analog signal levels due to manufacturing tolerance, signal attenuation or parasitic noise do not leave the discrete envelope, and as a result, are ignored by signal state sensing circuitry. In most cases, the number of these states is two, and they are represented by two voltage bands: one near zero volts and a higher level near the supply voltage, corresponding to the "false" ("0") and "true" ("1") values of the boolean domain respectively. In computer architecture and other digital systems, a waveform that switches between two voltage levels representing the two states of a Boolean value (0 and 1) is referred to as a digital signal, even though it is an analog voltage waveform, since it is interpreted in terms of only two levels. The clock signal is a special digital signal that is used to synchronise digital circuits. The image shown can be considered the waveform of a clock signal. Logic changes are triggered either by the rising edge or the falling edge. Although in a highly simplified and idealised model of a digital circuit we may wish for these transitions to occur instantaneously, no real world circuit is purely resistive and therefore no circuit can instantly change voltage levels. This means that during a short, finite transition time the output may not properly reflect the input, and indeed may not correspond to either a logically high or low voltage. The two states of a wire are usually represented by some measurement of an electrical property. Voltage is the most common, but current is used in some logic families. A threshold is designed for each logic family. When below that threshold, the wire is "low," when above, "high." Digital circuits establish a "no man's area" or "exclusion zone" that is wider than the tolerances of the components. The circuits avoid that area, in order to avoid indeterminate results. It is usual to allow some tolerance in the voltage levels used; for example, 0 to 2 volts might represent logic 0, and 3 to 5 volts might represent logic 1. A voltage of 2 to 3 volts would be invalid, and occur only in a fault condition or during a logic level transition. However, few logic circuits can detect such a condition and most devices will interpret the signal simply as high or low in an undefined or device-specific manner. Some logic devices incorporate schmitt trigger inputs whose behaviour is much better defined in the threshold region, and have increased resilience to small variations in the input voltage. The levels represent the binary integers or logic levels of 0 and 1. In active-high logic, "low" represents binary 0 and "high" represents binary 1. Active-low logic uses the reverse representation. 2

15 Digital signal Analog signal 1.3 Semiconductor Devices Fig. 1.1 Digital and analog signal (Source: Earlier digital systems, including the complex digital computers, used vacuum tubes as switches which were later replaced by semiconductor devices. This resulted in considerable savings in terms of cost, size, weight, and power requirements. These circuits were also faster in comparison to vacuum tube circuits. Use of semiconductor diodes, transistors, resistors and capacitors on tiny chips of silicon is made possible due to the progress in semiconductor technology Semiconductor Diode A modern semiconductor diode is made of a crystal of semiconductor like silicon that has impurities added to it to create a region on one side that contains negative charge carriers (electrons), called n-type semiconductor, and a region on the other side that contains positive charge carriers (holes), called p-type semiconductor. The diode's terminals are attached to each of these regions. The boundary within the crystal between these two regions, called a P-N junction, is where the action of the diode takes place. The crystal conducts conventional current in a direction from the p-type side (called the anode) to the n-type side (called the cathode), but not in the opposite direction. Another type of semiconductor diode, the Schottky diode, is formed from the contact between a metal and a semiconductor rather than by a p-n junction. The semiconductor diode is a device that will conduct current in one direction only. It is the electrical equivalent of a hydraulic check valve. The semiconductor diode has the following characteristics: A diode is a two-layer semiconductor consisting of an Anode comprised of P-Type semiconductor material and a Cathode which is made of N-Type semiconductor material. The P-Type material contains charge carriers which are of a positive polarity and are known as holes. In the N-Type material the charge carriers are electrons which are negative in polarity. When a semiconductor diode is manufactured, the P-Type and N-Type materials are adjacent to one another creating a P-N Junction. A bias refers to the application of an external voltage to a semiconductor. There are two ways a P-N junction can be biased. A forward bias results in current flow through the diode (diode conducts). To forward bias a diode, a positive voltage is applied to the Anode lead (which connects to P-Type material) and the negative voltage is applied to the Cathode lead (which connects to N-Type material). 3

16 Introduction to Digital Electronics A reverse bias results in no current flow through the diode (diode blocks). A diode is reverse biased when the Anode lead is made negative and the Cathode lead is made positive P-N Junction Characteristics The P-N Junction region has three important characteristics: The junction is region itself has no charge carriers and is known as a depletion region. The junction (depletion) region has a physical thickness that varies with the applied voltage. A forward bias decreases the thickness of the depletion region; a reverse bias increases the thickness of the depletion region. There is a voltage, or potential hill, associated with the junction. Approximately 0.3 of a volt is required to forward bias a germanium diode; 0.5 to 0.7 of a volt is required to forward bias a silicon diode. DIODE P-type + Hole N-type - Electron No current flows across this junction Battery Fig. 1.2 Diode (Source: Switching Characteristics of Semiconductor Diode When current flows from the p-type to the n-type semiconductors, the positive holes and the negative electrons are forced into close contact at the boundary. The electrons fill the holes across the boundary while the terminals supply new holes and electrons. Thus, in the forward bias case of fig. 1.3 (b) a continual current flows. In the reverse bias case, the charge carriers are pulled apart as shown in fig.1.4 (b). There is no longer an easy way for electrons to tunnel through the barrier, as there are no longer many empty holes waiting on the opposite side. The circuit-diagram representation of a diode is represented with an arrow representing the direction of current flow as depicted in fig. 1.3 (c) and fig. 1.4 (c). Electrons in the n-type half of the diode are repelled away from the junction by the negative ions in the p-type region, and holes in the p-type half are repelled by the positive ions in the n-type region. A space on either side of the junction boundary is left without either kind of current carriers. This is known as the depletion layer. No current can flow as there are no current carriers in this layer. The depletion layer is, in effect, an insulator. Now consider what would happen if we connected a small voltage to the diode. Connected in reverse bias as in fig 1.4 (a), it would attract the current carriers away from the p n junction boundary and make the depletion layer wider. Connected in forward bias as in fig. 1.3(a), it would repel the carriers and drive them towards the p n junction boundary, so reducing the 4

17 depletion layer. In neither case would any current flow because there would always be some of the depletion layer left. Now consider increasing the voltage. In reverse bias case, there is still no current because the depletion layer is even wider, but in the forward bias case, the layer disappears completely and current can flow. Above a certain voltage the diode acts like a conductor. As electrons and holes meet each other at the junction they combine and disappear. The battery keeps the diode supplied with current carriers. (a) (b) (c) Fig. 1.3 (a) Forward biased p-n junction diode; (b) Forward current flow and charge distribution; (c) Diode rectifier symbol (Source: (a) (b) (c) Fig. 1.4 (a) Reverse biased p-n junction diode; (b) reverse current flow and charge distribution; (c) Diode rectifier symbol (Source: Maxwell-Boltzmann statistics applied to diffusion of charge carriers can predict current density across the p-n junction in forward and reverse bias. It is represented by the following equation. where I is the current through the diode (positive I means the current is flowing conventionally from the p-type to n-type semiconductors), k is the Boltzmann constant ( J/K), T is absolute temperature, e is the electronic charge ( C), V is the bias voltage (positive indicating forward bias) and I0 is the leakage current in reverse bias. For forward bias case, current I becomes very much larger than I 0 hence the subtraction of I 0 from I is negligible and I becomes I= I 0.exp ev/kt For reverse bias, V is negative hence the exponential term is very small and negligible thus I I 0. Leakage current is typically few μa. At room temperature, T = 300K, ev/kt = 40 thus for forward bias I I 0 exp 40 V. For a linear resistor, R= V/I is the relation between voltage and current across a resistor R, but here the relationship between V and I is not constant but exponential. Hence the slope of the line at any point gives the resistance for forward bias junction. 5

18 Introduction to Digital Electronics R is called the dynamic or small signal resistance of the forward biased diode junction. 1.5 Transistors Fig. 1.5 I-V Characteristics of a diode (Source: Transistor is a device composed of semiconductor material that amplifies a signal or opens or closes a circuit. Invented in 1947 at Bell Labs, transistors have become the key ingredient of all digital circuits, including computers. Today s microprocessors contain tens of millions of microscopic transistors. Prior to the invention of transistors, digital circuits were composed of vacuum tubes, which had many disadvantages. They were much larger, required more energy, dissipated more heat, and were more prone to failures. It is safe to say that without the invention of transistors, computing, as we know it today, would not be possible. Bipolar Junction Transistor (BJT) and Field Effect Transistor (FET) are one of the most important device components for today s semiconductor industries. BJT are bipolar semiconductor devices (holes and electrons are both charge carriers for such devices). Whereas, FET patented by Lilienfeld in 1930, is a unipolar device (using either electron or holes as a charge carrier). Transistors are manufactured in different shapes but they have three leads (legs). The Base: It is the lead responsible for activating the transistor. The Collector: It is the positive lead. The Emitter: It is the negative lead. 6

19 1.5.1 n-p-n and p-n-p Bipolar Junction Transistor Fig. 1.6 Transistor (Source: A bipolar junction transistor (BJT) is a type of transistor. It is a three-terminal device constructed of doped semiconductor material and may be used in amplifying or switching applications. Bipolar transistors are so named because their operation involves both, electrons and holes. Although a small part of the base the majority carriers carry emitter current, minority carriers in the base carry the main current, and so BJTs are classified as minoritycarrier devices. A BJT is composed of two p-n junctions. The direction of current is out of the BJT for n-p-n BJT whereas it is into the transistor for p-n-p transistor and also the biasing is different for the two BJTs as depicted by (+) and ( ) signs. First point to be noted is that one of the p-n junction is forward biased, which is called emitter-base junction and the other p-n junction, is reverse biased also known as collector-base junction, this region of transistor operation is termed as active forward mode. There are four possible modes of operation for transistor. The operation principle for p-n-p transistor and n-p-n transistor are the same if we change the electrons to hole and change the biasing voltage signs accordingly. (a) (b) Fig. 1.7 Structure and Symbols of (a) n-p-n; (b) p-n-p BJT in forward active mode biasing (Source: 7

20 Introduction to Digital Electronics FET A field-effect transistor (FET) is a type of transistor commonly used for weak-signal amplification. The device can amplify analog or digital signals. It can also switch DC or function as an oscillator. In the FET, current flows along a semiconductor path called the "channel". At one end of the channel, there is an electrode called the "source". At the other end of the channel, there is an electrode called the "drain". The physical diameter of the channel is fixed, but its effective electrical diameter can be varied by the application of a voltage to a control electrode called the "gate". The conductivity of the FET depends, at any given instant in time, on the electrical diameter of the channel. A small change in gate voltage can cause a large variation in the current from the source to the drain. This is how the FET amplifies signals. Field-effect transistors exist in two major classifications. These are known as the junction FET (JFET) and the metal-oxide- semiconductor FET (MOSFET). The junction FET has a channel consisting of N-type semiconductor (N-channel) or P-type semiconductor (P-channel) material; the gate is made of the opposite semiconductor type. In P-type material, electric charges are carried mainly in the form of electron deficiencies called holes. In N-type material, the charge carriers are primarily electrons. In a JFET, the junction is the boundary between the channel and the gate. Normally, this P-N junction is reverse-biased (a DC voltage is applied to it) so that no current flows between the channel and the gate. However, under some conditions there is a small current through the junction during part of the input signal cycle. Field-effect transistors are fabricated onto silicon integrated circuit (IC) chips. A single IC can contain many thousands of FETs, along with other components such as resistors, capacitors, and diodes. The FET has some advantages and some disadvantages relative to the bipolar transistor. Field-effect transistors are preferred for weak-signal work, for example in wireless communications and broadcast receivers. They are also preferred in circuits and systems requiring high impedance. The FET is not, in general, used for high-power amplification, such as is required in large wireless communications and broadcast transmitters. n-channel p-channel gate drain gate drain source source MOSFET Fig. 1.8 FET (Source: In the MOSFET, the channel can be either N-type or P-type semiconductor. The gate electrode is a piece of metal whose surface is oxidised. The oxide layer electrically insulates the gate from the channel. For this reason, the MOSFET was originally called the insulated-gate FET (IGFET), but this term is now rarely used. Because the oxide layer acts as a dielectric, there is essentially never any current between the gate and the channel during any part of the signal cycle. This gives the MOSFET extremely large input impedance. As the oxide layer is extremely thin, the MOSFET is susceptible to destruction by electrostatic charges. Special precautions are necessary when handling or transporting MOS devices. 8

21 Oxide Layer Source (S) - Gate (G) + Drain (D) + n+ n+ p-type substrate Body (B) Fig. 1.9 MOSFET (Source: JFET It consists of a piece of p-type silicon, into which two n-type regions have been diffused. However, instead of being both on the same surface, as with a MOSFET, the two regions are opposite to one another on either side of the crystal. Using JFETs is a little more cumbersome than a normal MOSFET. You must make sure that the gate-substrate junction always remains reverse biased, and since the JFET can only be a depletion-mode device, you ought to have a voltage on the gate if you want to turn the transistor off. D G n-type depletion layer p-type S Fig JFET (Source: 9

22 Introduction to Digital Electronics 1.6 Switches Various kinds of switches are discussed below Diodes Diode acts like a one way switch that means diode will allow the current to flow when it is in forward bias and it will not allow the current flow when it is in reverse bias. When in forward bias the Si diode will have 0.7 V drop across the diode and current will flow through the diode acting like a closed switch whereas when it is in reverse bias, it will act like an open switch as illustrated in fig. 1.6 (a). (a) (b) (c) BJT Switch Fig (a) Diode switch; (b) npn and pnp BJT; (c) Transistor switch (Source: The BJT switch can be realised by applying a voltage between base and emitter. When the voltage V across base and emitter are zero the switch is open and no current flows between collector and emitter, the BJT is off. When a nonzero V voltage (> 0.7 V) is applied between the base and emitter, the BJT is on, current flows between collector and emitter. Note the current direction and applied voltage V polarities are opposite for the n-p-n and n-p-n BJT as shown in fig. 1.6 (b). fig. 1.6 (c) shows a transistor switch made up of three terminals of a transistor MOSFETs In MOSFET, the switch can be realised by applying a voltage across gate and source terminals. When the voltage between the gate and source is zero, the switch is open, no current is allowed between the source and drain. If a voltage is applied between gate and source the switch is closed a current flows between the source and drain, transistor is on, it acts like a closed switch. Note that the current direction for n-channel and p-channel MOSFETs are in opposite directions as illustrated in fig. 1.7 and hence the voltage across the gate and source must be applied accordingly. A switch made up of three terminals of a MOSFET is also depicted in fig. 1.7 Fig MOSFET switch (Source: 10

23 Although semiconductor devices in discrete form are not used in complex digital systems, study of these devices is essential to understand the operation of integrated circuits. Interfacing between integrated circuits of different logic families usually requires discrete devices. 11

24 Introduction to Digital Electronics Summary Digital electronics represents signals by discrete bands of analog levels, rather than by a continuous range. All levels within a band represent the same signal state. Relatively smaller changes to the analog signal levels due to manufacturing tolerance, signal attenuation or parasitic noise do not leave the discrete envelope, and as a result, are ignored by signal state sensing circuitry. It is usual to allow some tolerance in the voltage levels used; for example, 0 to 2 volts might represent logic 0, and 3 to 5 volts represent logic 1. A voltage of 2 to 3 volts would be invalid, and occur only in a fault condition or during a logic level transition. However, few logic circuits can detect such a condition and most devices will interpret the signal simply as high or low in an undefined or device-specific manner. Some logic devices incorporate schmitt trigger inputs whose behaviour is much better defined in the threshold region, and have increased resilience to small variations in the input voltage. The levels represent the binary integers or logic levels of 0 and 1. In active-high logic, "low" represents binary 0 and "high" represents binary 1. Active-low logic uses the reverse representation. A modern semiconductor diode is made of a crystal of semiconductor like silicon that has impurities added to it to create a region on one side that contains negative charge carriers (electrons), called n-type semiconductor, and a region on the other side that contains positive charge carriers (holes), called p-type semiconductor. Transistor is a device composed of semiconductor material that amplifies a signal or opens or closes a circuit. A bipolar junction transistor (BJT) is a type of transistor. It is a three-terminal device constructed of doped semiconductor material and may be used in amplifying or switching applications. A field-effect transistor (FET) is a type of transistor commonly used for weak-signal amplification. Field-effect transistors exist in two major classifications. These are known as the junction FET (JFET) and the metal-oxide- semiconductor FET (MOSFET). Diode, transistor and MOSFET can be used as a switch in integrated circuits. References Frey, R.E., Lecture Notes for Digital Electronics [Pdf] Available at: < DigitalNotes.pdf> [Accessed 19 June 2013]. Al-Saedi, E.I.R.K., Digital Electronic System [Pdf] Available at: < english/curriculum/lecture/system3-4/3rd_class/!st%20course%20digital%20system%20lectures% pdf>[accessed 19 June 2013 ]. Crecraft, D. & Gergely, S., Analog Electronics: Circuits, Systems and Signal Processing. Butterworth Heinemann. Jain, Modern Digital Electronics 4E, 4th ed., Tata McGraw-Hill Education Sec 2-1 to 2 Digital Signals and Waveforms, [Video online] Available at: < ch?v=hc60lbu1r44&list=pl23262e2febcd1c24> [Accessed 19 June 2013] Introduction to Digital Signal Processing, [Video online] Available at: < watch?v=wmdeuzi73t0> [Accessed 19 June 2013]. Recommended Reading Luo, F.L, Ye, H. & Rashid, M.H, Digital Power Electronics and Applications, Academic Press. Jain, R.P., Digital Electronics and Microprocessors: Problems and Solutions, Tata McGraw-Hill Education. Kal, S., Basic Electronics: Devices, Circuits and IT Fundamentals, PHI Learning Pvt. Ltd. 12

25 Self Assessment 1. The actual value of the signal is as long as it is within the specified range of Low or High level. a. immaterial b. important c. high d. low The signal is a special digital signal that is used to synchronise digital circuits. a. electronic b. clock c. analog d. high voltage In logic, "low" represents binary 0 and "high" represents binary 1. a. active-low b. low c. active-high d. active What did the early digital systems use as switches before using semiconductor devices? a. Transistors b. Integrated circuits c. Magnetic disks d. Vacuum tubes Which of the following statements is true? a. A bias refers to the application of an external voltage to a semiconductor. b. A bias refers to the application of an internal voltage to a semiconductor. c. A bias refers to the application of an external pressure to a semiconductor. d. A bias refers to the application of an external voltage to a vacuum tube. Transistor is a device composed of material that amplifies a signal or opens or closes a circuit. a. magnetic b. semiconductor c. non-conducting d. non-magnetic Bipolar transistors are so named because their operation involves both and holes. a. poles b. molecules c. electrons d. atoms In the FET, current flows along a semiconductor path called the. a. pathway b. gate c. cable d. channel 13

26 Introduction to Digital Electronics What was MOSFET earlier known as? a. IGFET b. FET c. JFET d. RFET Which of the following statements is true? a. Diode acts like a one way switch that means diode will not allow the current to flow when it is in forward bias, and it will allow the current flow when it is in reverse bias. b. Diode acts like a one way switch that means diode will allow the current to flow when it is in forward bias, and it will not allow the current flow when it is in reverse bias. c. Diode acts like a one way switch that means diode will allow the current to flow when it is in reverse bias, and it will not allow the current flow when it is in forward bias. d. Diode acts like a one way conductor that means diode will allow the current to flow when it is in forward bias, and it will not allow the current flow when it is in reverse bias. 14

27 Chapter II Number System and Codes Aim The aim of this chapter is to: explain different types of number systems elucidate binary arithmetic explicate different types of codes Objectives The objectives of this chapter are to: explain conversion of digits from a number system to another elucidate binary system and binary arithmetic explicate inter-conversion of digits from one number system to another Learning outcome At the end of this chapter, you will be able to: understand number system into decimal, binary, octal and hex number systems describe methods of binary arithmetic identify BCD, ASCII and code gray 15

28 Introduction to Digital Electronics 2.1 Introduction Number system is simply the ways to count things. Aim of any number system is to deal with certain quantities which can be measured, monitored, recorded, manipulated arithmetically, observed and utilised. Each quantity has to be represented by its value as efficiently and accurately as is necessary for any application. The numerical value of a quantity can be basically expressed in either analog (continuous) or digital (step by step) method of representation. In analog method, a quantity is expressed by another quantity which is proportional to the first. For example, the voltage output of an amplifier is measured by a voltmeter. The angular position of the needle of the voltmeter is proportional to the voltage output of the amplifier. Yet another example is of a thermometer. The height to which the mercury rises is proportional to the temperature. In both these examples, the value of voltage and temperature can be anywhere between zero and the maximum limit. In digital method, the value of a quantity is expressed by some symbols which are called digits, and not by a quantity which is proportional to the first. In a digital watch, the time, which changes continuously, is expressed by digits which do not change continuously. It is clear from the examples that the accuracy of the value of an analog quantity generally depends upon the judgement of the observer. Digital technology is different from analog technology. Many number systems are being used in digital technology. Most common amongst them are decimal, binary, octal, and hexadecimal systems. We are most familiar with the decimal number system, because we use it every day. It is the base-10 or radix-10 system. Note that there is no symbol for 10 or for the base of any system. We count , and then insert a 0 in the first column and add a new left column, starting at 1 again. Then we count 1-9 in the first column again. (People use the base-10 system because we have 10 fingers!). Each column in our system stands for a power of 10 starting at 100. All computers use the binary system. Following section provides an overview of the binary system. 2.2 Binary System In the binary number system (base of 2), there are only two digits: 0 and 1 and the place values are 2 0, 2 1, 2 2, 2 3 etc. Binary digits are abbreviated as bits. For example, 1101 is a binary number of 4 bits (ie., it is a binary number containing four binary digits.) A binary number may have any number of bits. Consider the number Note the binary point (counterpart of decimal point in decimal number system) in this number. Each digit is known as a bit and can take only two values 0 and 1. The left most bit is the highest-order bit and represents the most significant bit (MSB) while the lowest-order bit is the least significant bit (LSB). Some useful definitions are: Word is a binary number consisting of an arbitrary number of bits. Nibble is a 4-bit word (one hexadecimal digit) 16 values. Byte is an 8-bit word 256 values Positional values or weight MSB Binary Point LSB Fig. 2.1 Positional value (weight) of each bit (Source: 16

29 Any number can be expressed in binary form in the usual way. Table 2.1 shows expression of binary numbers Binary Number Decimal Number Table 2.1 Counting binary numbers (Source: 1 s complement The 1 s complement of a binary number is obtained just by changing each 0 to 1 and each 1 to 0. Binary number complement Fig s complement (Source: 2 s complement The 2 s complement of a binary number is obtained adding 1 to the 1 s complement of this number: There is a simple method to obtain the 2 s complement: 2 s complement = 1 s complement+1 Binary number s complement s complement Beginning with the LSB, just write down bits as they are moving to left till the first 1, including it. Substitute the rest of bits by their 1 s complement. 17

30 Introduction to Digital Electronics Signed numbers In a signed number, the left most bit is the so called sign bit: 0=positive number 1=negative number. Sign-value notation In this notation, the left-most bit is the sign bit and the others are used to represent the absolute value notation. 1 s complement In this notation, the positive numbers have the same representation as the sign-value notation, and the negative numbers are obtained by taking the 1 s complement of the positive correspondents. 2 s complement The positive numbers have the same representation as the sign-value notation, and the negative numbers are obtained by taking the 1 s complement of the positive correspondents. Positive All (+25) Negative Sign-value s complement s complement Binary to Decimal Conversion Binary number can be converted into its decimal equivalent, by simply adding the weights of various positions in the binary number which have bit 1. Example 1: Find the decimal equivalent of the binary number (11111) 2 The equivalent decimal number is =1X2 4 +1X2 3 +1X2 2 +1X2 1 +1X2 0 = = (31) 10 To differentiate between numbers represented in different number systems, either the corresponding number system may be specified along with the number or a small subscript at the end of the number may be added signifying the number system. Example (1000) 2 represents a binary number and is not one thousand. Example 2: Consider the conversion of ( ) = = =(35.625) 10 Consider the following examples = = = 60 From these examples, it is clear that if the binary point is shifted towards right side, then the value of the number is doubled. Now consider the following examples = = = From these examples it is clear that if the binary point is shifted towards the left side, then the value of the number is halved. 18

31 2.3 Decimal to Binary Conversion A decimal number is converted into its binary equivalent by its repeated divisions by 2. The division is continued till we get a quotient of 0. Then all the remainders are arranged sequentially with first remainder taking the position of LSB and the last one taking the position of MSB. Consider the conversion of 27 into its binary equivalent as follows Thus = Fig. 2.3 (a) Decimal to binary conversion (Source: If the number also has some figures on the right of the decimal point, then this part of the number is to be treated separately. Multiply this part repeatedly by two. After first multiplication by 2, either 1 or 0 will appear on the left of the decimal point. Keep this 1 or 0 separately and do not multiply it by 2 subsequently. This should be followed for every multiplication. Continue multiplication by 2 till you get all 0s after the decimal point or up to the level of the accuracy desired. This will be clear from the following example. Consider the conversion of into its binary equivalent. We have already converted 27 into its binary equivalent which is (11011) 2. Now for the conversion of 0.625, multiply it by 2 repeatedly as follows: Thus, = x x x Fig. 2.3 (b) Decimal to binary conversion (Source: 19

32 Introduction to Digital Electronics Let us try another example, conversion of ( ) 10 into binary. Split this number in two parts, i.e., 58 and.0725 and convert them into binary separately as described above Fig. 2.4 (a) Decimal to binary conversion (Source: Now let's look at the conversion of Thus, ( )10 = x x x x x Fig. 2.4 (b) Decimal to binary conversion (Source: 20

33 Representing numbers in binary is very tedious, since binary numbers often consist of a large chain of 0's and 1's. Convenient shorthand forms for representing the binary numbers are developed such as octal system and hexadecimal system. With these number systems long strings of 0's and 1's can be reduced to a manageable form. The section below gives an overview of these systems. 2.4 Octal Number System The octal number system has base-8 that is, there arc 8 digits in this system. These digits are 0, 1, 2, 3, 4, 5, 6, and 7. The weight of each octal digit is some power of 8 depending upon the position of the digit. Octal numbers showing positional values (weights) of each digit are as follows: Weights Octal Number MSD Octal LSD Point Fig. 2.5 Octal number system (Source: Octal number does not include the decimal digits 8 and 9. If any number includes decimal digits 8 and 9, then the number can not be an octal number Octal to Decimal Conversion As has been done in case of binary numbers, an octal number can be converted into its decimal equivalent by multiplying the octal digit by its positional value. For example, let us convert into decimal number = 3 x x x 8-1 = = (30.5) Decimal to Octal Conversion A decimal number can be converted by repeated division by 8 into equivalent octal number. This method is similar to that adopted in decimal to binary conversion. If the decimal number has some digits on the right of the decimal point, then this part of the number is converted into its octal equivalent by repeatedly multiplying it by 8. The process is same as has been followed in binary number system. Consider the conversion of into its decimal equivalent. Split it into two parts, that is 126 and.38 21

34 Introduction to Digital Electronics Fig. 2.6 (a) Decimal to octal conversion (Source: The conversion of.38 is as follows Thus, (126.38) 10 = x x x x Fig. 2.6 (b) Decimal to octal conversion (Source: 22

35 2.4.3 Octal to Binary Conversion In the octal number system the highest octal digit, i.e., 7 can be expressed as a 3-bit binary number. Therefore, all the octal digits have to be represented by n 3-bit binary number. The binary equivalent of each octal digit is shown in Table 1.2. The main advantage of the octal number system is the easiness with which any octal number can be converted into its binary equivalent. Octal digit bit binary equivalent Table 2.2 Binary equivalent of octal digit (Source: Using this conversion of octal digit into 3-bit binary number, any octal number can be converted into its binary equivalent by simply replacing each octal digit by a 3-bit binary number. For example, conversion of 567, into its binary equivalent is: 567 = Binary to Octal Conversion A binary number can be converted into its octal equivalent by first making groups of 3-bits starting from the LSB side. If the MSB side does not have 3 bits, then add 0s to make the last group of 3 bits. Then by replacing each group of 3 bits by its octal equivalent, a binary number can be converted into its binary equivalent. For example, consider the conversion of , into its octal equivalent as follows: = [As the MSB side does not have 3 bits, we have added two 0's to make the last group of 3 bits] = l Thus, ( ) 2 = (1431) Hexadecimal Number System The hexadecimal number system has base 16 that is it has 16 digits (Hexadecimal means'16'). These digits are 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, A, B, C, D, E, and F. The digits A, B, C, D, E and F have equivalent decimal values 10, 11, 12, 13, 14, and 15 respectively. Each Hex (Hexadecimal is popularly known as hex) digit in a hex number has a positional value that is some power of 16 depending upon its position in the number. 23

36 Introduction to Digital Electronics Weights A B B 9 Hex number MSD Hex LSD Point Fig. 2.7 Hexadecimal number showing positional values (weight) of digits (Source: Relationship of hex digits with decimal and binary numbers is given in Table 1.3. Note that to represent the largest hex digit we require four binary bits. Therefore, the binary equivalent of all the hex digits has to be written in four bit numbers. Hex digit Decimal equivalent 4-bit Binary equivalent A B C D E F Table 2.3 Binary and decimal equivalent of each hex digit (Source: Hex to Decimal Conversion Hex to decimal conversion is done in the same way as in the cases of binary and octal to decimal conversions. A hex number is converted into its equivalent decimal number by summing the products of the weights of each digit and their values. This is clear from the example of conversion of 514.AF16 into its decimal equivalent AF16 = 5 X X X X X 16-2 = = ( ) 10 24

37 2.5.2 Decimal to Hex Conversion A decimal number is converted into hex number in the same way as a decimal number is converted into its equivalent binary and octal numbers. The part of the number on the left of the decimal point is to be divided repeatedly by 16 and the part an the right of the decimal point is to be repeatedly multiplied by 16. This will be clear from the examples of conversion of (579.26) 10 into hex equivalent. Split the number into two parts, 579 and.26. Thus, (579) 10 = (2443) Fig. 2.8 (a) Decimal to hex conversion (Source: Now.26 is converted into hex number as follows:.26 x x x Thus = Fig. 2.8 (b) Decimal to hex conversion (Source: 25

38 Introduction to Digital Electronics Hex to Binary Conversion As in octal number system, a hex number is converted into its binary equivalent by replacing each hex digit by its equivalent 4-bit binary number. This is clear from the following example: (BA6) 16 = B A 6 = = ( ) Binary to Hex Conversion By a process that is reverse of the process described in the above section, a binary number can be converted in to its hex equivalent. Starting from the LSB side, group the binary number bits into groups of lour bits. If towards the MSB side, the numbers of bits is less than four, then add zeros on the left of the MSB so that the group of four is complete. Replace each group by its equivalent hex digit. This is clear from the following example: ( ) 2 = = 2 6 E = (26E) Hex to Octal Conversion Each digit of the hex number is first converted into its equivalent four bit binary number. Then the bits of the equivalent binary number are grouped into groups of three bits. Then each group is replaced by its equivalent octal digit to get the octal number. For example: (5AF) 16 = = = = =(2567) Octal to Hex Conversion For octal to hex conversion, just reverse the process described in the section above. This is clear from the following example: (5457) 8 = = = B 2 F = (B2F) 16 This method can also be applied to hex to decimal and decimal to hex conversions. For example, consider the conversion of 3C16, into its decimal equivalent: 3C16 = = Check the conversion. 3C16 = 3 X C X16 0 = 3 x x 16 0 = = (60) = = = (60) 10 Thus, 3C16 = (111100) 2 =

39 2.6 Codes We had an overview of binary, octal and hexadecimal number system. For any number system with n base B and digits N 0 (LSB), N 1 N 2... N 10 (M SB), the decimal equivalent N 10 is given by When numbers, letters or words are represented by a specific group of symbols, it is said that the number, letter or word is being encoded. The group of symbols is called as the code. Few codes will be discussed in the following sections BCD Code In BCD (BCD stands Binary coded decimal) code, each digit of a decimal number is converted in to its binary equivalent. The largest decimal digit is 9; therefore the largest binary equivalent is This is illustrated as follows = = ( ) BCD ASCII Code The word ASCII is run acronym of American Standard Code for Information Interchange. This is the alphanumeric code most widely used in computers. The alphanumeric code is one that represents alphabets, numerical numbers, punctuation marks and other special characters recognised by a computer. The ASCII code is a 7-bit code representing 26 English alphabets, 0 through 9 digits, punctuation marks, etc. A 7-bit code has 27 = 128 possible code groups which arc quite sufficient Code Gray Gray Code is a form of binary that uses a different method of incrementing from one number to the next. With Gray Code, only one bit changes state from one position to another. This feature allows a system designer to perform some error checking (i.e., if more than one bit changes, the data must be incorrect). Decimal Binary Gray Decimal Binary Gray Excess 3 Table 2.4 Gray code (Source: Excess-3 binary-coded decimal (XS-3), also called biased representation or Excess-N, is a numeral system used on some older computers that uses a pre-specified number N as a biasing value. It is a way to represent values with a balanced number of positive and negative numbers. In XS-3, numbers are represented as decimal digits, and each digit is represented by four bits as the BCD value plus 3 (the "excess" amount) 27

40 Introduction to Digital Electronics The smallest binary number represents the smallest value. (i.e. 0 Excess Value) The greatest binary number represents the largest value. (i.e. 2 Excess Value 1) N+1 The primary advantage of XS-3 coding over BCD coding is that a decimal number can be 9 s complemented (for subtraction) as easily as a binary number can be 1's complemented; just invert all bits. In addition, when the sum of two XS-3 digits is greater than 9, the carry bit of a four bit adder will be set high. This works because, when adding two numbers that are greater or equal to zero, an "excess" value of six results in the sum. Since a four bit integer can only hold values 0 to 15, an excess of six means that any sum over nine will overflow. 2.7 Binary Arithmetic Majority of arithmetic performed by computers is binary arithmetic, that is, arithmetic on base two numbers. Decimal and floating-point numbers, also used in computer arithmetic, depend on binary representations, and an understanding of binary arithmetic is necessary in order to understand either one. Computers perform arithmetic on fixed-size numbers. The arithmetic of fixed size numbers is called finite-precision arithmetic. The rules for finite-precision arithmetic are different from the rules of ordinary arithmetic. The sizes of numbers which can be arithmetic operands are determined when the architecture of the computer is designed. Common sizes for integer arithmetic are eight, 16, 32, and recently 64 bits. It is possible for the programmer to perform arithmetic on larger numbers or on sizes which are not directly implemented in the architecture. However, this is usually so painful that the programmer picks the most appropriate size implemented by the architecture. This puts a burden on the computer architect to select appropriate sizes for integers, and on the programmer to be aware of the limitations of the size he has chosen and on finite-precision arithmetic in general. We are considering binary arithmetic in the context of building digital logic circuits to perform arithmetic. Not only do we have to deal with the fact of finite precision arithmetic, we must consider the complexity of the digital logic. When there is more than one way of performing an operation we choose the method which results in the simplest circuit Addition Addition of binary numbers can be carried out in a similar way by the column method. But before this, view four simple cases. In the decimal number system, = 9 symbolizes the combination of 3 with 6 to get a total of 9. View the four simple cases. Case 1: When nothing is combined with nothing, we get nothing. The binary representation of this is = 0. Case 2: When nothing is combined with1, we get1. Using binary numbers to denote this gives = 1. Case 3: Combining.1 with nothing gives 1. The binary equivalent of this is = 1. Case 4: When we combine 1 with 1, the result is 2. Using binary numbers, we symbolize = 10. The last result is sometimes confusing because of our long time association with decimal numbers. But it is correct and makes sense because we are using binary numbers. Binary number 10 stands for'1','0' and not for 10 (ten). To summarize our results for binary addition, 0+0 = = = 1 1+1=10 One can also express the rules of binary addition with a truth table. This is important because there are techniques for designing electronic circuits that compute functions expressed by truth tables. The fact that we can express the rules of binary addition as a truth table implies that we can design a circuit which will perform addition on binary numbers, and that turns out to be the case. We only need to write the rules for one column of bits; we start at the right and apply the rules to each column in succession until the final sum is formed. Call the bits of the addend and augend A and B, and the carry in from the previous column Ci. Call the sum S and the carry out Co. The truth table for one-bit binary addition looks like this: 28

41 A B Ci S Co Table 2.5 One-bit binary addition This says if all three input bits are zero, both S and Co will be zero. If any one of the bits is one and the other two are zero, S will be one and Co will be zero. If two bits are 1's, S will be zero and Ci will be one. Only if all three bits are 1's, both S and Co will be 1's Addition of Signed Numbers Binary addition of 2 s complement signed numbers can be performed using the same rules given above for unsigned addition. If there is a carry out of the sign bit, it is ignored. It is possible for the result of an addition to be too large to fit in the available space. The answer will be truncated, and will be incorrect. This is the overflow condition discussed above. There are two rules for determining whether overflow has occurred: If two numbers of opposite signs are added, overflow cannot occur. If two numbers of the same sign are added, overflow has occurred if and only if the result is of the opposite sign Subtraction Addition has the property of being commutative, that is, a+b = b+a. This is not true of subtraction. 5 3 is not the same as 3 5. For this reason, we must be careful of the order of the operands when subtracting. We call the first operand, the number which is being diminished, the minuend; the second operand, the amount to be subtracted from the minuend, is the subtrahend. The result is called the difference. 51 minuend 22 subtrahend 29 difference It is possible to perform binary subtraction using the same process we use for decimal subtraction, namely subtracting individual digits and borrowing from the left. This process quickly becomes cumbersome as you borrow across successive zeroes in the minuend. Further, it doesn t lend itself well to automation. Jacobowitz describes the carry method of subtraction which some of you may have learned in elementary school, where a one borrowed in the minuend is paid back by adding to the subtrahend digit to the left. This means that one need look no more than one column to the left when subtracting. Subtraction can thus be performed a column at a time with a carry to the left, analogous to addition. This is a process which can be automated, but we are left with difficulties when the subtrahend is larger than the minuend or when either operand is, signed. Since we can form the complement of a binary number easily and can add signed numbers easily, the obvious answer to the problem of subtraction is to take the 2 s complement of the subtrahend, then add it to the minuend. That is = 51+ ( 22). Not only does this approach remove many of the complications of subtraction by the usual method, but it also means special circuits to perform subtraction need not be built All that is needed is a circuit which can form the bitwise complement of a number and an adder. 29

42 Introduction to Digital Electronics Multiplication A simplistic way to perform multiplication is by repeated addition. In the example below, we could add 42 to the product register 27 times. In fact, some early computers performed multiplication this way. However, one of our goals is speed, and we can do much better using the familiar methods we have learned for multiplying decimal numbers. Recall that the multiplicand is multiplied by each digit of the multiplier to form a partial product, and then the partial products are added to form the total product. Each partial product is shifted left to align on the right with its multiplier digit. 42 multiplicand x 27 multiplier 294 first partial product (42 X 7) 84 second partial product (42 X 2) 1134 total product Binary multiplication of unsigned (or positive 2 s complement) numbers works exactly the same way, but is even easier because the digits of the multiplier are all either zero or one. That means the partial products are either zero or a copy of the multiplicand, shifted left appropriately. Consider the following binary multiplication: 0111 multiplicand x 0101 multiplier 0111 first partial product (0111 X 1) 0000 second partial product (0111 X 0) 0111 third partial product (0111 X 1) 0000 fourth partial products (0111 X 0) total product Notice that no true multiplication is necessary in forming the partial products. The fundamental operations required are shifting and addition. This means we can multiply unsigned or positive integers using only shifters and adders Division As with the other arithmetic operations, division is based on the paper-and-pencil approach we learned for decimal arithmetic. We will show an algorithm for unsigned long division that is essentially similar to the decimal algorithm we learned in grade school. Let us divide (5310) by 0101 (510). Beginning at the left of the dividend, we move to the right one digit at a time until we have identified a portion of the dividend which is greater than or equal to the divisor. At this point, a one is placed in the quotient; all digits of the quotient to the left are assumed to be zero. The divisor is copied below the partial dividend and subtracted to produce a partial remainder as shown below. Now digits from the dividend are brought down into the partial remainder until the partial remainder is again greater than or equal to the divisor. Zeroes are placed in the quotient until the partial remainder is greater than or equal to the divisor, and then a one is placed in the quotient, as shown below. 30

43 The divisor is copied below the partial remainder and subtracted from it to form a new partial remainder. The process is repeated until all bits of the dividend have been used. The quotient is complete and the result of the last subtraction is the remainder. This completes the division. The quotient is (1010) 2 (1010) and the remainder is (11) 2 (310), which is the expected result. This algorithm works only for unsigned numbers, but it is possible to extend it to 2 s complement numbers. As with the other algorithms, it can be implemented using only shifting, complementation, and addition. Digital computers can perform arithmetic operations using only binary numbers. And hence the above section of binary arithmetic is the basic step of digital electronics. 31

44 Introduction to Digital Electronics Summary There are mainly four number systems mainly binary, octal, decimal and hexadecimal which have 2, 8, 10 and 16 digits respectively. But it is the ease in applications that decides which kind of number system should tie defined and used. Every computer uses two or more of the above mentioned number systems simultaneously. The binary number system has only two digits; 0 and 1. A binary digit is called bit. A binary number can be converted into its equivalent octal, decimal and hex numbers as described in the text. And octal, decimal and hex numbers can be converted into equivalent binary umbers. The octal number system has 8 digits; 0 through 7. An octal number can be converted into its equivalent binary, decimal and hex numbers and vice versa as described in the text. The hex number system has 16 digits; 0 through 9, A through F. As in the other systems, the hex numbers can be converted as described in the text into their binary, octal and decimal equivalents and vice versa. It is possible to arrange sets of binary digits to represent numbers, letters of the alphabet or other information by using a given code. Some of the important codes are BCD and ASCII codes. In the BCD code, each decimal digit is replaced by its 4-bit binary equivalent. Conversion of BCD code into its decimal equivalent and vice versa is quite easy. Therefore, it is quite often used in computers. 7 The ASCII code is the most widely used alphanumeric code. It is a 7-bit binary number-and has 2 = 128 possible 7-bit binary numbers which are quite sufficient to describe the capital and small letters of the alphabet, digits, punctuation marks and other symbols. The process of dividing a binary number is once again the same as followed in the decimal system. References Number Systems and Codes [Pdf] Available at: < pdf> [Accessed 19 June 2013]. Number Systems, Base Conversions, and Computer Data Representation [Pdf] Available at: < wsu.edu/~ee314/handouts/numsys.pdf> [Accessed 19 June 2013]. Das, S., A Complete Guide to Computer Fundamentals, Laxmi Publications, Ltd. Meena, K., Principles of Digital Electronics, PHI Learning Pvt. Ltd Binary Numbers: Tutorial, [Video online] Available at: < [Accessed 19 June 2013] Binary, Hexadecimal, Octal conversion, [Video online] Available at: < watch?v=2uwxdclfw70> [Accessed 19 June 2013]. Recommended Reading Godse, A.P. & Godse, D.A., Digital Logic and Design and Application, Technical Publications. Godse, A.P. & Godse, D.A., Digital Systems, Technical Publications. Tokheim, Digital Electronics Principles and Applications, Tata McGraw-Hill Education. 32

45 Self Assessment 1. Aim of any number system is to deal with certain quantities which can be measured, monitored,, manipulated arithmetically, observed and utilised. a. recorded b. c. d. stored read used Which of the following is not a common number system? a. Decimal system b. c. d. Tetra decimal system Binary system Octal systems What are binary digits abbreviated as? a. Bytes b. c. d. Giga bytes Bits Nibble The 2 s complement of a binary number is obtained adding 1 to the of this number. a. complement b. c. d. end beginning 1 s complement Binary number can be converted into its decimal equivalent by simply adding of various positions in the binary number which has bit 1. a. weights b. c. d. number ten two A decimal number is converted into its binary equivalent by its repeated by 2. a. addition b. c. d. division multiplication subtraction Advantage of the octal number system is the ease with which any octal number can be converted into its equivalent. a. decimal b. c. d. hex binary tetra 33

46 Introduction to Digital Electronics Which digits are excluded from the octal number system? a. 1 and 2 b. c. d. 0 and 1 7 and 8 8 and 9 What should be added to last group of 3 bits if the MSB side does not have 3 bits while converting numbers from binary to octal? a. Zero b. c. d. One Two Nine 10. In subtraction number which is being diminished is called the minuend; the amount to be subtracted from the minuend is the called the. a. difference b. c. d. subtrahend subtraction minus 34

47 Chapter III Logic Gates Aim The aim of this chapter is to: explain logic gates introduce truth tables elucidate the types of logic gates Objectives The objectives of this chapter are to: classify logic gates enlist the features of logic gates define logic circuits Learning outcome At the end of this chapter, you will be able to: describe the working of logic gates identify the types of logic gates understand truth tables 35

48 Introduction to Digital Electronics 3.1 Introduction Digital computers understand the language of 1s and 0s. This number system is also called as binary number system (bi means two). Note that the operation of digital circuits can be described in two corresponding voltage levels. The more positive level is denoted by high (H = 1) and the other is denoted by low (L = 0). And the logical operations are represented by true (T) and false (F). For instance, H = 1 = T and L = 0 = F is a positive logic whereas H = 0 = F and L = 1 = T is a negative logic. A digital circuit having one or more input signals but only one output signal is called a gate. A gate, which implements Boolean algebraic equations, is called Logic gates. The basic building blocks of digital electronics are logic gates which perform simple binary logic functions (AND, OR, NOT, etc.). From these devices, more complex circuits can be constructed to do arithmetic, that act as memory elements. 3.2 Logic Gates Features of logic gates are as follows: The flow of digital signals is controlled by transistors in various configurations depending on the logic family. For most purposes we can imagine that the logic gates are composed of ideal switches with just two states: OPEN and CLOSED. The state of a switch is controlled by a digital signal. The switch remains closed so long as a logical (1) signal is applied. A logical (0) control signal keeps it open. Logic signals interact by means of gates. The three fundamental gates AND, OR, and NOT, are named after the three fundamental operations of logic that they carry out. The AND and OR gates each have two inputs and one output. The output state is determined by the states of the two inputs. The function of each gate is defined by a truth table, which specifies the output state for each possible combination of input states. The output values of the truth tables can be understood in terms of two switches. If the switches are in series, you get the AND function. Parallel switches perform the OR operation. A bubble after a gate or at an input indicates NOT. The three compound gates NAND, NOR and XOR can be made from AND, OR, and NOT. NAND means an AND gate followed by a NOT, while NOR means an OR gate followed by a NOT. The EXCLUSIVE-OR (XOR) is similar to OR but it has a LO output if both inputs are HI, so you can think of it as one OR the other but NOT both. NAND and NOR are more common than AND and OR because with the help of DeMorgan s theorems they can be used to simplify complex circuits. When several gates are combined to perform a complex logical operation, a good design uses as few as possible. Boolean algebra, the mathematics of two valued variables, is the theoretical tool used to simplify complex logical expressions NOT Gate The NOT gate has a single input and a single output and its symbol and truth table (truth table contains a table of all possible input values and their corresponding outputs values). It performs the operation of inversion, i.e., the output of a NOT gate takes a 1 (high) state if the input takes the 0 (low) state and vice-versa. A circuit, which performs a logic negation, is called a NOT circuit or inverter since it inverts the output with respect to the input OR Gate The OR gate has two or more inputs and a single output. The output of an OR gate is in 1 state if any of the inputs is in the 1 state AND Gate The AND gate has two or more inputs and a single output. The output of an AND gate is in 1 state if all inputs are in the 1 state or the output will be zero if any of the inputs is zero. 36

49 3.2.4 NAND Gate The Negated AND, NOT AND or NAND gate is the opposite of the digital AND gate, and behaves in a manner that corresponds to the opposite of AND gate, as shown in the truth table. A LOW output results only if both the inputs to the gate are HIGH. If one or both inputs are LOW, a HIGH output results. The NAND gate is a universal gate in the sense that any Boolean function can be implemented by NAND gates. Digital systems employing certain logic circuits take advantage of NAND s functional completeness. In complicated logical expressions, normally written in terms of other logic functions such as AND, OR, and NOT, writing these in terms of NAND saves on cost, because implementing such circuits using NAND gate yields a more compact result than the alternatives. NAND gates can also be made with more than two inputs, yielding an output of LOW if all of the inputs are HIGH, and an output of HIGH if any of the inputs is LOW NOR Gate A contraction of NOT and OR, a NOR gate is one of the basic digital logic gates. With it, it is possible to build any of the other basic logic gates and thus, nearly any type of digital circuit XOR Gate Abbreviated, XOR is a unique and very useful type of gate. As shown in the truth table, any time both of its inputs are held in the same state (either low or both high), its output will be low. If one of the inputs is pulled high while the other is held low, then its output will be high XNOR XNOR is a digital logic gate whose function is the inverse of the Exclusive OR (XOR) gate. The two-input versions implement logical equality, behaving according to the truth table. A high output results if both of the inputs to the gate are the same. If one but not both inputs are high, a low output results. Operation Switches Condition that Boolean Symbol Truth Table circuit is closed Notation A B A B A B And (A AND B are A B or A Series A-B closed) AB B A A B A+B And (A OR B is closed) A+B A A+B B B Paralle Not (same as invert) Different kind of switch 1 means open 0 means closed (a) NOT A = Ᾱ A Ᾱ A 0 1 Ᾱ 1 0 NAND NOR XOR A B A B A B A - B A +B A + B = AB + AB Input A Input B X-NOR gate Output 37

50 Introduction to Digital Electronics (b) A B Output NAND A B Output NOR A B Output XOR A B Output XNOR (c) Fig. 3.1 Logic gates (a) Basic logic gates; (b) Compound logic gates (c) Truth tables for compound gates (Source: Flops,-and-Clocks.html) 38

51 3.3 Truth Tables Truth tables are used to show logic gate functions. The NOT gate has only one input, but all the others have two inputs. When constructing a truth table, the binary values 1 and 0 are used. Every possible combination, depending on number of inputs, is produced. Basically, the number of possible combinations of 1s and 0s is 2 n where n= number of inputs. For example, 2 inputs have 2 2 combinations (i.e. 4), 3 inputs have 2 3 combinations (i.e. 8) and so on. The next section shows how these truth tables are used Description of the Six Logic Gates NOT gate A NOT X A X Fig. 3.2 Not gate (Source: revision_guide cambridge_education cambridge_university_press_samples.pdf) INPUT A OUTPUT X Table no. 3.1 Truth table The output (X) is true (i.e. 1 or ON) if: INPUT A is NOT TRUE (i.e. 0 or OFF) Truth table for: X = NOT A AND gate A A AND X X B B Fig. 3.3 AND gate (Source: revision_guide cambridge_education cambridge_university_press_samples.pdf) 39

52 Introduction to Digital Electronics INPUT A INPUT B OUTPUT X Table no. 3.2 Truth table The output (X) is true (i.e. 1 or ON) if: INPUT A AND INPUT B are BOTH TRUE (i.e. 1 or ON) Truth table for: X = A AND B OR gate A A OR X X B B Fig. 3.4 OR gate (Source: revision_guide cambridge_education cambridge_university_press_samples.pdf) INPUT A INPUT B OUTPUT X Table no. 3.3 Truth table The output (X) is true (i.e. 1 or ON) if: INPUT A OR INPUT B is TRUE (i.e. 1 or ON) Truth table for: X = A OR B NAND gate A NAND X A X B B Fig. 3.5 NAND gate (Source: revision_guide cambridge_education cambridge_university_press_samples.pdf) 40

53 INPUT A INPUT B OUTPUT X Table no. 3.4 Truth table The output (X) is true (i.e. 1 or ON) if: INPUT A AND INPUT B are NOT BOTH TRUE (i.e. 1 or ON) Truth table for: X = NOT A AND B NOR gate A B NOR X A B X Fig. 3.6 NOR gate (Source: revision_guide cambridge_education cambridge_university_press_samples.pdf) INPUT A INPUT B OUTPUT X Table no. 3.5 Truth table The output (X) is true (i.e. 1 or ON) if: INPUT A OR INPUT B are NOT BOTH TRUE (i.e. 1 or ON) Truth table for: X = NOT A OR B XOR gate A B XOR X A B X Fig. 3.7 XOR gate (Source: revision_guide cambridge_education cambridge_university_press_samples.pdf). 41

54 Introduction to Digital Electronics INPUT A INPUT B OUTPUT X Table no. 3.6 Truth table The output (X) is true (i.e. 1 or ON) if: INPUT A OR (NOT INPUT B) OR (NOT INPUT A) OR INPUT B is TRUE (i.e. 1 or ON) Truth table for: X = A OR (NOT B) OR (NOT A) OR B 3.4 Logic Circuits/Networks Logic gates can be combined together to produce more complex logic circuits (networks). A key point to be taken into account is the output from a logic circuit (network) is checked by producing a truth table. Two different types of problems are considered here: drawing the truth table from a given logic circuit (network) designing a logic circuit (network) from a given problem and testing it by also drawing a truth table Example 1 Produce a truth table from the following logic circuit (network). A B NOR P OR X To show how this works, we will split the logic circuit into two parts (shown by the dotted line). AND C Q Fig. 3.8 Logic circuit (Source: revision_guide cambridge_education cambridge_university_press_samples.pdf) First part There are 3 inputs; thus we must have 23 (i.e., 8) possible combinations of 1s and 0s. To find the values (outputs) at points P and Q, it is necessary to consider the truth tables for the NOR gate (output P) and the AND gate (output Q) i.e., P = A NOR B Q = B AND C 42

55 We thus get: INPUT A INPUT B INPUT C OUTPUT P OUTPUT Q Table no. 3.7 Truth table Second part There are 8 values from P and Q which form the inputs to the last OR gate. Hence we get X = P OR Q which gives the following truth table: INPUT P INPUT Q OUTPUT X Table no. 3.8 Truth table This now gives us the final truth table for the logic circuit given at the start of the example: INPUT A INPUT B INPUT C OUTPUT X Table no. 3.9 Truth table Example 2 Consider the following problem. A system used 3 switches A, B and C; a combination of switches determines whether an alarm, X, sounds: If switch A or switch B are in the ON position and if switch C is in the OFF position then a signal to sound an alarm, X is produced. It is possible to convert this problem into a logic statement. 43

56 Introduction to Digital Electronics So we get: If (A = 1 OR B = 1) The first part is two inputs (A and B) joined by an OR gate. AND The output from the first part and the third part are joined by an AND gate. (C = NOT 1) then X = 1 The third part is one input (C) which is put through a NOT gate. So we get the following logic circuit (network): A B OR AND X C Fig. 3.9 Logic circuit (Source: revision_guide cambridge_education cambridge_university_press_samples.pdf) This gives the following truth table: INPUT A INPUT B INPUT C OUTPUT X Table no Truth table 44

57 3.4.3 Example 3 A manufacturing process is controlled by a built in logic circuit which is made up of AND, OR and NOT gates only. The process receives a STOP signal (i.e. X = 1) depending on certain conditions, shown in the following table: INPUT BINARY VALUES CONDITION IN PROCESS V 1 Volume> 1000 litres V 0 Volume 1000 liters T 1 Temperature > 750 degrees Celsius T 0 Temperature 750 degrees Celsius S 1 Speed > 15 meters/second (m/s) S 0 Speed 15 meters/second (m/s) Table no Truth table A stop signal (X = 1) occurs when: either Volume, V > 1000 litres and Speed, S <= 15 m/s or Temperature, T <= 750ºC and Speed, S > 15 m/s Draw the logic circuit and truth table to show all the possible situations when the stop signal could be received. First of all, it is necessary to turn the problem into a series of logic statements: statement 1 can now be re-written as: V = 1 AND S = NOT 1 since V > 1000 (binary value = 1) and S <= 15 (binary value = 0) statement 2 can now be re-written as: T = NOT 1 AND S = 1 since T <= 750ºC (binary value = 0) and S > 15 (binary value = 1) both statements are joined together by an OR gate So, our logic statement becomes: X = 1 if (V = 1 AND S = NOT 1) OR (T = NOT 1 AND S = 1) We can now draw the logic circuit (network) by constructing it for statement 1 and for statement 2 and joining them with an OR gate. In the following logic circuit note that V has been placed at the bottom of logic diagram this is done to avoid crossing over of lines which makes it look neater and less complex. It is not essential to do this and is only done for the reasons given. 45

58 Introduction to Digital Electronics T NOT Statement 2 AND S NOT OR X Statement 1 V AND Fig Logic circuit (Source: revision_guide cambridge_education cambridge_university_press_samples.pdf) We can now construct the truth table: INPUT V INPUT T INPUT S OUTPUT X Table no Truth table 46

59 Summary Digital computers understand the language of 1s and 0s. A digital circuit having one or more input signals but only one output signal is called a gate. The function of each gate is defined by a truth table, which specifies the output state for each possible combination of input states. Boolean algebra, the mathematics of two valued variables, is the theoretical tool used to simplify complex logical expressions. A circuit, which performs a logic negation, is called a NOT circuit or inverter since it inverts the output with respect to the input. Logic signals interact by means of gates. A gate, which implements Boolean algebraic equations, is called Logic gates. Digital systems employing certain logic circuits take advantage of NAND s functional completeness. The three fundamental gates AND, OR, and NOT, are named after the three fundamental operations of logic that they carry out. Logic gates can be combined together to produce more complex logic circuits (networks). When constructing a truth table, the binary values 1 and 0 are used. When several gates are combined to perform a complex logical operation, a good design uses as few as possible. The flow of digital signals is controlled by transistors in various configurations depending on the logic family. The OR gate has two or more inputs and a single output. A manufacturing process is controlled by a built in logic circuit which is made up of AND, OR and NOT gates only. A key point to be taken into account is the output from a logic circuit (network) is checked by producing a truth table. Truth tables are used to show logic gate functions. The NOT gate has only one input, but all the others have two inputs. References Rafiquzzaman, M., Fundamentals of Digital Logic and Microcomputer Design, 5th ed., John Wiley & Sons. Balabanian, N. & Carlson, B., Digital Logic Design Principles, John Wiley & Sons An Introduction to Logic Gates, [Video online] Available at: < watch?v=95kv5bf2z9e> [Accessed 29 May 2013] Logical Gates, Part 1, [Video online] Available at: < i0k>[accessed 29 May 2013]. Logic gates [Pdf] Available at: < studies revision_guide cambridge_education cambridge_university_press_samples.pdf> [Accessed 29 May 2013]. Logic Gates [Pdf] Available at: < chap3_ pdf> [Accessed 29 May 2013]. Recommended Reading Saha, A. & Manna, N., Digital Principles and Logic Design Engineering series, Jones & Bartlett Learning. Godse, A. P. & Godse, D. A., Digital Electronics and Logic Design, Technical Publications. Godse, A. P. & Godse, D. A., Digital Logic Circuits, Technical Publications. 47

60 Introduction to Digital Electronics Self Assessment 1. What computers understand the language of 1s and 0s? a. All b. Micro c. Super d. Digital A digital circuit having or more input signals but only one output signal is called a gate. a. two b. c. d. one three four A circuit, which performs a logic negation, is called a circuit or inverter since it inverts the output with respect to the input. a. NOR b. c. d. AND NOT OR What are used to show logic gate functions? a. Truth tables b. c. d. Logic gates Binary values Digital systems Which of the following statements is true? a. Gate signals interact by means of logic. b. c. d. Logic signals cannot interact by means of gates. Binary signals interact by means of gates. Logic signals interact by means of gates. Which of the following statements is true? a. A system, which implements Boolean algebraic equations, is called Logic gates. b. c. d. A gate, which implements Boolean algebraic equations, is called Logic gates. A digital system, which implements Boolean algebraic equations, is called Logic gates. A truth table, which implements Boolean algebraic equations, is called Logic gates. What can be combined together to produce more complex logic circuits (networks)? a. Digital systems b. c. d. Binary signals Logic gates Truth tables 48

61 Which gate has only one input, but all the others have two inputs? a. NOT b. c. d. OR AND NOR switches perform the OR operation. a. Gate b. c. d. Logic Binary Parallel Match the following 1. AND gate A. It is a unique and very useful type of gate. 2. NOR gate B. It performs the operation of inversion 3. XOR gate C. It is one of the basic digital logic gates. a. b. c. d. 4. NOT gate D. It has two or more inputs and a single output. 1-A, 2-C, 3-D,4-B 1-C, 2-D, 3-B, 4-A 1-D, 2-C, 3-A, 4-B 1-D, 2-A, 3-B, 4-C 49

62 Introduction to Digital Electronics Chapter IV Boolean Algebra Aim The aim of this chapter is to: introduce Boolean algebra explain the fundamental laws of Boolean algebra elucidate the concept of truth tables Objectives The objectives of this chapter are to: enlist the types of logic gates explicate the types of combinatorial circuits determine the Boolean identities for the various operations Learning outcome At the end of this chapter, you will be able to: understand the different Boolean laws describe the techniques of Logic minimisation identify logic gates and truth tables 50

63 4.1 Introduction Boolean algebra (or Boolean logic) is a logical calculus of truth values, developed by George Boole in the 1840s. It resembles the algebra of real numbers, but with the numeric operations of multiplication xy, addition x + y, and negation x replaced by the respective logical operations of conjunction xoy, disjunction x y, and negation x Fundamental Laws We imagine a logical variable, A, that takes on the values 0 or 1. If A = 0 then A = 1 and if A = 1 then A = 0. Here are some obvious identities using the AND, OR and NOT operations. Looking at these identities you can see why the plus symbol was chosen for OR and times was chosen for AND. OR AND NOT A + 0 = A A 0 = 0 A + A =1 A +1 = 1 A 1 = A A A = 0 A + A = A A A = A A = A A + A =1 A A = 0 Equality Two Boolean expressions are equal if and only if their truth tables are identical. Associative laws (A + B)+ C = A+ (B + C) (AB)C = A (BC) Distributive laws A (B + C) = AB + AC Related identities (A + AB)= A (A + B)= A+ B (A+ B) (A + C) = (A+ BC) DeMorgan s Theorems DeMorgan s first Theorem says that complement of sum equals the product of complements. The LHS of the equation describes a NOR (NOT-OR) gate and the RHS of the equation describes an AND gate with inverted inputs and both the equations have the same truth table. DeMorgan s second Theorem says that complement of product equals the sum of complements. The LHS of the equation describes a NAND (NOT-AND) gate and the RHS of the equation describes an OR gate with inverted inputs and both the equations have the same truth table. 51

64 Introduction to Digital Electronics Boolean Identities Boolean Identities for NOT operation The NOT operation of a Boolean variable A is denoted by its complement Ā. Following are the Boolean identities pertaining to NOT operation. Ā = A It implies that the double complement of a Boolean variable is the variable itself. For A = 0, Ā = 1, A = 0 and for A = 1, Ā = 0, A = 1 is true. Ā + A = 1 It means that a variable ORed with its complement always equals 1. If A = 0, Ā = 1 and A + Ā = 1 and when A = 1, Ā = 0 and A + Ā = 1 is correct. A Ā = 0 It means that a variable ANDed with its complement always equals 0. For two possible values of A, 0.1 = 0 when A = 0, 1.0 = 0 when A = 1 is true. A + Ā B = A + B Proof: A + Ā B = A (B + 1) + Ā B = A B + A + Ā B = (A + Ā) B + A = B + A = A + B Boolean identities for OR operation The OR operation in the Boolean algebra is denoted by (+). Following are the Boolean identities for the OR operation. Commutative Law A + B = B + A It implies that the input A and B of the OR gate can be interchanged without changing the output Y. It can be justified from the truth table of two-input OR gate. For A = B, it is obvious that it doesn t matter when we interchange A and B. When A = 0 and B = 1, if we interchange A and B, then it will become the case of A = 1 and B = 0 and for both these case the output is 1. Hence it doesn t matter to the output if we interchange A and B inputs. Associative Law A + B + C = (A + B) + C = A + (B + C) It means that the order of combining the input variables has no effect on the output variables. This can be verified from the truth table for three-input OR gate. A + A = A It means that any variable ORed with itself equals the variable. We can justify this Boolean identity by substituting the two possible values of A. For A = 0, = 0 and for A = 1, = 1 is true (refer to truth table for two-input OR gate). A + 1 = 1 If one input of the OR gate is high the output is high no matter what is the other input. For A = 0, = 1 and for A = 1, = 1 is true. A + 0 = A It means a Boolean variable ORed with 0 equals the variable. For A = 0, = 0 and A = 1, = 1 is true. Boolean Identities for AND Operation The AND operation is denoted by (.) in Boolean algebra. Following are the Boolean identities pertaining to AND operation. Commutative Law A. B = B. A It implies that the inputs of the AND gate can be interchanged without changing the output Y which can be justified from the truth table of two-input AND gate. Note that (.) is suppressed many times and we can write the Commutative law as A B = B A. 52

65 Associative Law A B C = (A B) C = A (B C) It means that the order of combining the input variables has no effect on the output variables. This can be verified from the truth table for three-input AND gate. A A = A It means that any variable ANDed with itself equals the variable. For A = 0, 0. 0 = 0 and for A = 1, 1. 1 = 1 is true (refer to truth table for two-input AND gate). A. 1 = A If one input of the AND gate is high the output is equal to the input. For A = 0, 0.1 = 0 and for A = 1, 1.1 = 1 is true. A. 0 = 0 If one input of the AND gate is low the output is low irrespective of the other input. For A = 0, 0.0 = 0 and for A = 1, 1.0 = 0 is true. Distributive law A (B + C) = A B + A C We can write down the truth tables for LHS and RHS of the Boolean equation and verify they are same. 4.2 Logic Minimisation Given a truth table, it is always possible to write down a correct logic expression simply by forming an OR of the ANDs of all input variables for which the output is true. However, for an arbitrary truth table such a procedure could produce a very lengthy and cumbersome expression which might be needlessly inefficient to implement with gates. There are several methods for simplification of Boolean logic expressions. The process is usually called logic minimisation and the goal is to form a result which is efficient. Two methods we will discuss are algebraic minimisation and Karnaugh maps. For more complex expressions the Quine-McKluskey method may be appropriate. Karnaugh maps are also limited to problems with up to 4 binary inputs. AB CD X 01 X l X l 11 l X X 10 l X X Karnaugh Maps (K-Maps) Fig. 4.1 K-map (Source: The Karnaugh map uses a rectangle divided into rows and columns in such a way that any product term in the expression to be simplified can be represented as the intersection of a row and a column. The rows and columns are labeled with each term in the expression and its complement. The labels must be arranged so that each horizontal or vertical move changes the state of one and only one variable. A Karnaugh map is visual display of minterms required for a sum-of-product solution. 53

66 Introduction to Digital Electronics Sum-of-Products Equations and Logic Circuits (SOP) There are four possible ways to AND two input signals that are in the complemented and un-complemented form (B, A, AB) also called as fundamental products. Table 4.1 lists each of the fundamental product producing high outputs. A B Fundamental Product Minterms 0 0 m B m m AB m 3 Table. 4.1 Fundamental products for two inputs (Source: For instance, is high when A are B are low. The fundamental products B, and AB are also represented by minterms m 0, m 1, m 2 and m 3, where the suffix i of mi comes from the decimal equivalent of the binary number (Each individual term in standard SOP form is called as minterm). For 3 inputs A, B and C, there are 23 minterms, m 0, m 1, m 2, m 3, m 4, m 5, m 6 and m 7 as listed in table 4.2. A B C Fundamental Product Minterms m m m m m m m m 7 Table 4.2 Fundamental products for three inputs (Source: For example, when A = 1, B = 1, C = 0, the fundamental product results a high output for the case Y = A B = 11 = 1. SOP equation is a function of Boolean variables, which states the fundamental product terms or minterms, which will give a high output for the given inputs. For instance, the output Y is a function of three Boolean variables A, B and C whose minterms are listed which will give a high outputs. Y = F (A, B, C) = Σ m (1, 2, 3, 4) = Let us try to find the truth table from the given SOP equation. List all the possible values of A, B and C in the order of increasing minterm index i.e., In the truth table, place 1s whose minterms are listed in the SOP equation and at the other places draw 0s as in Table

67 A B C Minterms Y m m 1 1 ( ) m 2 1 ( ) m 3 1 ( ) m 4 1 ( ) m m m 7 0 Table 4.3 Truth table for SOP equation (Source: Product of Sums (POS) The Product of Sums form represents an expression as a product of maxterms. Each individual term in standard POS form is called as maxterm. F(X, Y...) = Product (bk + Mk), where bk is 0 or 1 and Mk is a maxterm. Drawing Karnaugh Maps Consider the following example: Y = F (A, B) = Σ m (1, 2, 3) = B+ + The truth table for this SOP equation is shown in Table 4.4 A B Y Minterms m m m m 3 Table 4.4 Truth table for SOP equation (Source: Following are the steps required to produce the K-map from the truth table: Begin by drawing Fig 4.2 (a) Write down the value of suffix of minterms or the equivalent decimal numbers as shown in Fig. 4.2 (b) From the truth table of Table 4.4 write down the values of Y for the corresponding minterms. The values of Y for the minterms which are there is the SOP equation is 1, for other minterms it is 0. 55

68 Introduction to Digital Electronics B B B B B B A A A A A A (a) (b) (c) Fig. 4.2 Steps for construction of 2-variable K-map (a); (b); (c) (Source: Don t Care Conditions In some digital systems, some inputs are never supplied, thereby no output is visible. We call such cases don t care conditions and they are represented by X in the truth table as depicted in Fig Whenever we see an X in the truth table while encircling the 1s in the K-map to form the largest group, we can assume Xs as 1s. After it has been included in all the groups, disregard the Xs in the truth tables by assuming them as 0s. As for Fig. 1.3, the SOP equation after Karnaugh simplifications are Y = B. AB AB AB CD CD CD CD CD CD CD CD CD CD CD CD AB AB AB AB AB AB AB AB AB (a) (b) (c) Fig. 4.3 (a) Overlapped groups; (b) Rolling; (c) Don t care conditions of K-maps (Source: Quine McCluskey Method The Quine McCluskey algorithm (or the method of prime implicants) is a method used for minimisation of Boolean functions which was developed by W.V. Quine and Edward J. McCluskey. It is functionally identical to Karnaugh mapping, but the tabular form makes it more efficient for use in computer algorithms, and it also gives a deterministic way to check that the minimal form of a Boolean function has been reached. It is sometimes referred to as the tabulation method. The method involves two steps: Finding all prime implicants of the function. Use those prime implicants in a prime implicants chart to find the essential prime implicants of the function, as well as other prime implicants that are necessary to cover the function. Thus, logic expressions can be represented in one of the standard forms: SOP or POS and then simplified using K-maps or Quine- McCluskey method. 56

69 4.3 Combinatorial Circuits The circuits and switching arrangements used in electronics are very complex but, although this chapter only deals with simple circuits, the functioning of all microchip circuits is based on the ideas in this chapter. The flow of electrical pulses which represent the binary digits 0 and 1 (known as bits) is controlled by combinations of electronic devices. These logic gates act as switches for the electrical pulses. Special symbols are used to represent each type of logic gate. binary digits bits NOT Gate Fig. 4.4 Combinatorial circuits (Source: The NOT Gate is capable of reversing the input pulse. The truth table for a NOT gate is as follows: INPUT OUTPUT a ~a Table 4.5 Truth table a a This is a NOT gate Fig. 4.5 NOT gate (Source: The NOT gate receives an input, either a pulse (1) or no pulse (0) and produces an output as follows: If input a is 1, output is 0; and if input a is 0, output is 1. 57

70 Introduction to Digital Electronics AND Gate The AND gate receives two inputs a and b, and produces an output denoted by gate is as follows:. The truth table for an AND INPUT INPUT OUTPUT a b Table 4.6 Truth table a b a b This is an AND gate Fig. 4.6 AND gate (Source: The only way that the output can be 1 is when a AND b are both 1. In other words there needs to be an electrical pulse at a AND before the AND gate will output an electrical pulse OR Gate The OR gate receives two inputs a and b, and produces an output denoted by is as follows: INPUT INPUT OUTPUT a b The truth table for an OR gate Table 4.7 Truth table a a b b This is an OR gate Fig. 4.7 OR gate (Source: 58

71 The output will be 1 when a or b or both are 1. These three gates, NOT, AND and OR, can be joined together to form combinatorial circuits to represent Boolean expressions, as explained in the previous chapter. Example Use logic gates to represent a) b) Draw up the truth table for each circuit Solution (a) p q ~ p Table 4.8 Truth table Fig. 4.8 Circuit diagram (Source: (b) x y ~ x Table 4.9 Truth table 59

72 Introduction to Digital Electronics x y ~x (x y) (x y) ~ x Fig. 4.9 Circuit diagram (Source: 60

73 Summary Boolean algebra (or Boolean logic) is a logical calculus of truth values, developed by George Boole in the 1840s. Two Boolean expressions are equal if and only if their truth tables are identical. DeMorgan s first Theorem says that complement of sum equals the product of complements. DeMorgan s second Theorem says that complement of product equals the sum of complements. The NOT operation of a Boolean variable A is denoted by its complement Ā. If one input of the OR gate is high the output is high no matter what is the other input. The AND operation is denoted by (.) in Boolean algebra. Karnaugh maps are limited to problems with up to 4 binary inputs. The Quine - McCluskey algorithm (or the method of prime implicants) is a method used for minimisation of Boolean functions which was developed by W.V. Quine and Edward J. McCluskey. SOP equation is a function of Boolean variables, which states the fundamental product terms or minterms, which will give a high output for the given inputs. The Product of Sums form represents an expression as a product of maxterms. The three gates, NOT, AND and OR, can be joined together to form combinatorial circuits to represent Boolean expressions. Special symbols are used to represent each type of logic gate. A Karnaugh map is visual display of minterms required for a sum-of-product solution. SOP equation is a function of Boolean variables, which states the fundamental product terms or minterms, which will give a high output for the given inputs. The Product of Sums form represents an expression as a product of maxterms. In some digital systems, some inputs are never supplied, thereby no output is visible. The NOT gate is capable of reversing the input pulse. The flow of electrical pulses which represent the binary digits 0 and 1 (known as bits) is controlled by combinations of electronic devices. The circuits and switching arrangements used in electronics are very complex. If one input of the AND gate is low the output is low irrespective of the other input. References Gregg, J., Ones and zeros: understanding Boolean algebra, digital circuits, and the logic of sets, IEEE Press. Levitz, K. & Levitz, H., Logic and Boolean algebra, Barron s Educational Series. Keleshev, V., Boolean algebra #1: Basic laws and rules, [Video online] Available at: < com/watch?v=gj8qmrqtvao> [Accessed 30 May 2013] DIGITAL ELECTRONICS 2.mp4 (Boolean algebra ), [Video online] Available at: < com/watch?v=licj5qzot2y>[accessed 30 May 2013]. Boolean Algebra [Pdf] Available at: < pdf> [Accessed 30 May 2013]. Boolean Algebra [Pdf] Available at: < [Accessed 30 May 2013]. Recommended Reading Hohn, F. E., Applied Boolean algebra: an elementary introduction, 2nd ed., Macmillan. Kumar, A. A., Fundamentals of Digital Circuits, 2nd ed., PHI Learning Pvt. Ltd. Arnold, B. H., Logic and Boolean Algebra, DOVER PUBN Incorporated. 61

74 Introduction to Digital Electronics Self Assessment 1. The operation of a Boolean variable A is denoted by its complement Ā. a. SOP b. OR c. NOT d. AND The operation of a Boolean variable A is denoted by its complement Ā. a. NOR b. AND c. OR d. NOT Which operation in Boolean algebra is denoted by (+)? a. AND b. OR c. NOT d. NOR The operation is denoted by (.) in Boolean algebra. a. AND b. OR c. NOT d. NOR Which of the following statements is true? a. If one input of the OR gate is low the output is low irrespective of the other input. b. If one input of the NOT gate is low the output is low irrespective of the other input. c. If one input of the NOR gate is low the output is low irrespective of the other input. d. If one input of the AND gate is low the output is low irrespective of the other input. Up to how many inputs are Binary maps limited? a. 5 b. 3 c. 4 d. 2 Which of the following statements is true? a. In some digital systems, some outputs are never supplied, thereby no input is visible. b. In some digital systems, some inputs are never supplied, thereby no output is visible. c. In some digital systems, some inputs are always supplied, thereby no output is visible. d. In some digital systems, some inputs are never supplied, thereby output is visible. The NOT gate is capable of reversing the pulse. a. input b. output c. binary d. none of these 62

75 9. The Product of Sums form represents an expression as a product of. a. circuits b. truth tables c. minterms d. maxterms 10. Which of the following statements is false? a. If one input of the NOT gate is high the output is high no matter what is the other input. b. If one input of the AND gate is high the output is high no matter what is the other input. c. If one input of the OR gate is high the output is high no matter what is the other input. d. If one input of the OR gate is low the output is high no matter what is the other input. 63

76 Introduction to Digital Electronics Chapter V Combinational Logic Design Using MSI Circuit Aim The aim of this chapter is to: explicate the importance of different devices beneficial for ICs explain application of 'adders' and 'subtractors' elucidate the use of code converters Objectives The objectives of this chapter are to: explain the concept of multiplexing and demultiplexing determine implementation of multiplexers examine 1's complement and 2's complement adder and subtractors Learning outcome At the end of this chapter, you will be able to: understand full adder and half adder identify difference between decoder and multiplexer describe the types of code converters 64

77 5.1 Introduction The explosion in digital techniques and technology has been made possible by the incredible increase in the density of digital circuitry, its robust performance, its relatively low cost and its speed. The requirement of using many bits in reproduction is no longer an issue. Circuits in which all outputs at any given time depend only on the inputs at that time are called "Combinational Logic Circuits". Many tasks in communications, control, and computer systems can be performed by combinational logic circuits. When a circuit has been designed to perform some task in one application, it often finds use in a different application as well. In this way, it acquires different names from its various uses. There is an active array of devices such as multiplexers, demultiplexers, adders, parity generators, etc. These devices significantly reduce IC package count, thereby reducing the system cost. The system design is greatly simplified because the laborious and time consuming simplification methods are generally not required. This also improves the reliability of the system by reducing the number of external wired connections. 5.2 Multiplexing and Demultiplexing Processes of multiplexing and demultiplexing are defined below. The devices they are associated with called multiplexer (MUX) and a demultiplexer (DEMUX) are also described. The data is available, in parallel, on many different lines but must be transmitted over a single communications link. A mechanism is needed to select which of the many data lines to activate sequentially at any one time so that the data this line carries can be transmitted at that time. This process is called multiplexing. Needed at the other end of the communications link is a device that will undo the multiplexing: a demultiplexer. Such a device must accept the incoming serial data and direct it in parallel to one of many output lines. Thus, a multiplexer (MUX) is a device which selects one of the many inputs to a single output. The selection is done by using an input address. Hence, a MUX can take many data bits and put them, one at a time, on a single output data line in a particular sequence. This is an example of transforming parallel data to serial data. A demultiplexer (DEMUX) performs the inverse operation, taking one input and sending it to one of many possible outputs. Again the output line is selected using an address. A MUX-DEMUX pair can be used to convert data to serial form for transmission, thus reducing the number of required transmission lines. The address bits are shared by the MUX and DEMUX at each end. If N data bits are to be transmitted, then after multiplexing, the number of separate lines required is log 2n + 1, compared to n without the conversion to serial. Hence for large n the saving can be substantial. Multiplexers consist of two functionally separate components, a decoder and some switches or gates. The decoder interprets the input address to select a single data bit. A digital multiplexer is a circuit with 2n data input lines and one output line. It must also have a way of determining the specific data input line to be selected at any one time. This is done with n other input lines, called the select or selector inputs, whose function is to select one of the 2n data inputs for connection to the output. We can also look at it as a serialiser, as it serialises the parallel information that comes in N parallel lines. Besides the N input lines multiplexers have also n inputs (N = 2n) that provides the information of the selected line. An enable line can also be present. Fig 4.1 shows a possible and simple implementation of 4-to-1 multiplexer. MSI chip that act as multiplexers are 74xx250 (16-to-1), 74xx151 (8-to-1), 74xx253 (4-to-1), 74xx157 (2-to-1). 65

78 Introduction to Digital Electronics E S1 S0 D0 D1 Output D2 D3 Fig. 5.1 Four to one multiplexer (Source: & 0 A B C D E M U X A B C & & & & & & & 7 Fig. 5.2 DEMUX (Source: Implementation using MUX A switching function to be implemented with a multiplexer is If (x, y, z) = Σ (1, 2, 4, 7) = x'y'z + x'yz' + xy'z' + xyz Since the function has three variables, the desired multiplexer will have 3 1 = 2 select Inputs.The expression for the multiplexer output is f = s1's0'd0 + s1's0d1 + s1s0'd2 + s1s0d3 There are no restrictions on how to assign the selector inputs to the variables of the given function; let s1 = x and s0 = y arbitrarily. Then f = x'y'd0 + x'yd1 + xy'd2 + xyd3 Comparing this with the original expression for the given function leads to D0 = D3 = z 66

79 D1 = D2 = z' The original function is thus implemented with a four-input multiplexer. There are five other ways that the two select inputs could have been assigned to two of the three switching variables. No conditions need to be satisfied by the choice, so it is arbitrary. However, the specific outcome obtained for the Di inputs depends on that initial choice. yz wx y z O s s 1 = w 0 =x f 10 1 (a) (b) X Y S x i y i s i C i+1 C i (a) (b) 5.3 Adder Fig. 5.3 Multiplexer implementation of f = Σ (0, 1, 6, 7, 11). (Source: Adders play one of the most important roles in binary arithmetic. In fact, fixed point addition is often used as a simple measure to express processor's speed. Addition and subtraction circuit can be used as the basis for implementation of multiplication and division. Considerable efforts have been put in designing of high speed addition and subtraction circuits. It is considered to be an important task since the time of Babbage. Number codes are also responsible for adding to the complexity of arithmetic circuit. The 2's complement notation is one of the most widely used codes for fixed-point binary numbers because of ease of performing addition and subtraction through it Binary Adders One of the most important tasks performed by a digital computer is the operation of adding two binary numbers. A useful measure of performance is speed. Of course, speed can be improved by using gate designs that favour speed at the expense of other measures, such as power consumption (using advanced Schottky, for example, versus low-power Schottky designs). But for the logic designer, the important question is how to design an adder to increase the speed, regardless of the type of gate used. It may be that increased speed can be achieved at the expense of increased circuit complexity. That is, there might be several designs, each characterised by a certain speed and a certain circuit complexity. A judgment must be made as to the acceptable trade-offs between them. 67

80 Introduction to Digital Electronics A symbolic diagram representing a binary adder is shown in Fig. 5.4 (a). Each open arrowhead represents multiple variables; in this case the inputs are two binary numbers. If each number has n digits, then each line shown really represents n lines. The sum of two n-bit numbers is an (n + 1)-bit number. Thus, S (sum) represents n + 1 output lines. We would require a circuit with n + 1 output functions, each one dependent on 2n variables. The truth table for each of the output functions would have 22n rows. Since n could easily be in the range 20 40, a different approach is obviously needed. X Y S x i y i s i C i+1 C i (a) (b) Full Adder Fig. 5.4 Binary addition: (a) General adder; (b) Full adder of two 1-bit words (Source: An alternative approach for the addition of two n-bit numbers is to use a separate circuit for each corresponding pair of bits. Such a circuit would accept the 2 bits to be added, together with the carry resulting from adding the less significant bits. It would yield as outputs the 1-bit sum and the 1-bit carry out to the more significant bit. Such a circuit is called a full adder. A schematic diagram is shown in Fig. 5.4 b. The 2 bits to be added are x i and y i, and the carry in is C i. The outputs are the sum S i and the carry out C i+1. The truth table for the full adder and the logic maps for the two outputs are shown in Fig The minimal sum-of-products expressions for the two outputs obtained from the maps are: S i = x i 'y i C i ' + x i y i 'C i ' + x i 'y i 'C i + x i y i C i (1a) C i+1 = x i y i + x i C i + y i C i = x i y i + C i (x i + y i ) (1b) Each minterm in the map of Si constitutes a prime implicant. Hence, a sum-of-products expression will require four 3-input AND gates and a 4-input OR gate. The carry out will require three AND gates and an OR gate. If we assume that each gate has the same propagation delay tp, then a two-level implementation will have a propagation delay of 2tp. In the map of the carry out, minterm m 7 is covered by each of the three prime implicants. This is overkill; since m 7 is covered by prime implicant x i y i, there is no need to cover it again by using it to form prime implicants with m 5 and m 6. If there is some benefit to it, we might use the latter two minterms as implicants without forming prime implicants with m 7. The resulting expression for C i+1 becomes C i+1 = x i y i + C i (x i 'y i + x i y i ') = x i y i + C i (x i y i ) (2) We already have an expression for S i in (1a), but it is in canonic sum-of-products form. It would be useful to seek an alternative form for a more useful implementation. 68

81 C 1 X 1 Y 1 S 1 C yz x yz (a) (b) (c) Fig. 5.5 Truth table and logical map of the full adder: (a) Truth table; (b) S i map; (c) C i+1 map (Source: Half Adder A half adder is a dispositive with two inputs and two outputs: A sum digit and a carry bit. Truth table and a possible implementation are depicted in Fig These circuits are useful as far as we need only to add 1 bit values. A B C S A B S C A B Σ S C Binary Subtractor Fig. 5.6 Half adder truth table and diagram (Source: The adders studied in the previous section are suitable for the addition of complement numbers if some additional circuitry is used to process the final carry out. Binary subtraction can be performed using the same adder circuits by negating the subtrahend 's Complement Adder and Subtractor Subtraction should be carried out by complementing the subtrahend and adding. So the task is to design a circuit whose output is the 2 s complement of the input, and use its output as one input to an adder. Such a circuit can be designed easily, but why should a system contain some hardware dedicated to addition and other hardware dedicated to subtraction? If the only difference between these two circuits is a circuit that computes the 2 s complement, then why not design a circuit where either addition or subtraction can be selected with one additional input? When this additional input is, say, 0 the circuit performs addition, and when the input is 1 the circuit performs subtraction. It sounds easy; a representation of the circuit can be derived, but an elegant solution exists that we describe next. Examine the truth table of the Exclusive-OR operation and notice that it can be viewed as a conditional inverter. If one input is 0, then the output is identical to the second input. If one input is 1, then the output is the complement of the second input. This is convenient for producing the complement of an input to our adder/subtractor circuit when we want to perform subtraction. However, to compute the two s complement of a binary number we have to add 1. 69

82 Introduction to Digital Electronics The full adder for the least significant bit has a carry input signal that can be utilised to add the required 1. The design of our 2's complement adder/subtractor circuit is complete; a version for adding 4-bit numbers is shown in Fig.5.7. If the control signal M is 0, then the circuit performs A+B; however, if M is 1, the circuit performs A B. B 3 B 2 B 1 B 0 M A 3 A 2 A 1 A 0 C 4 C 3 C 2 C 1 C 0 S 3 S 2 S 1 S 0 overflow Fig s complement adder/subtractor with overflow detection (Source: s Complement Adder and Subtractor To perform subtraction in 1's complement we can use the Exclusive-OR circuit used in the 2's complement adder/ subtractor. The only difference is that we do not want to inject a carry into the least significant bit. 1's complement addition requires the addition of 1 to the sum when a carry out from the most significant bit position occurs. This can be accomplished using multiple half adders as shown in the figure below. B 3 B 2 B 1 B 0 M A 3 A 2 A 1 A 0 C 4 C 3 C 2 C 1 C 0 FA FA FA FA 0 HA HA HA HA S 3 S 2 S 1 S 0 Fig s complement adder/subtractor (Source: 70

83 5.5 Decoders and Encoders Conceivably, there might be a combinational circuit that accepts n inputs (not necessarily 1, but a small number) and causes data to be routed to one of many, say up to 2n, outputs. Such circuits have the generic name decoder. Semantically, at least, if something is to be decoded, it must have previously been encoded, the reverse operation from decoding. Like a multiplexer, an encoding circuit must accept data from a large number of input lines and convert it to data on a smaller number of output lines (not necessarily just one). Decoders are circuits that detect a specific combination of bits in the input generating an output according with the input. So if there are n inputs, the maximal number of outputs can be up to 2n. In digital electronics, a decoder can take the form of a multiple-input, multiple-output logic circuit that converts coded inputs into coded outputs, where the input and output codes are different. E.g. n-to-2n, binary-coded decimal decoders. Enable inputs must be on for the decoder to function, otherwise its outputs assume a single "disabled" output code word. Decoding is necessary in applications such as data multiplexing, 7 segment display and memory address decoding. The example decoder circuit would be an AND gate because the output of an AND gate is "High" (1) only when all its inputs are "High." Such output is called as "active high output". If instead of AND gate, the NAND gate is connected the output will be "Low" (0) only when all its inputs are "High". Such output is called as "active low output". Example: A 2-to-4 Line Single Bit Decoder A slightly more complex decoder is the n-to-2n type binary decoders. These types of decoders are combinational circuits that convert binary information from 'n' coded inputs to a maximum of 2n unique outputs. We say a maximum of 2n outputs because in case the 'n' bit coded information has unused bit combinations, the decoder may have less than 2n outputs. We can have 2-to-4 decoder, 3-to-8 decoder or 4-to-16 decoder. We can form a 3-to-8 decoder from two 2-to-4 decoders (with enable signals). Similarly, we can also form a 4-to-16 decoder by combining two 3-to-8 decoders. In this type of circuit design, the enable inputs of both 3-to-8 decoders originate from a 4th input, which acts as a selector between the two 3-to-8 decoders. This allows the 4th input to enable either the top or bottom decoder, which produces outputs of D (0) through D (7) for the first decoder, and D (8) through D (15) for the second decoder. A decoder that contains enable inputs is also known as a decoder-demultiplexer. Thus, we have a 4-to-16 decoder produced by adding a 4th input shared among both decoders, producing 16 outputs. 71

84 Introduction to Digital Electronics D0 D1 D2 D3 D4 D5 D6 E A0 A1 A2 D7 Fig. 5.9 Decoder (Source: 72

85 5.5.1 Differences between Decoder and Multiplexer Decoder A decoder has n inputs, which are called the address A decoder has up to 2n outputs (it can have that many, maximum; but it might have less). Each output line is true (or 1) for a specific combination of the input lines, called the address. Multiplexer A multiplexer has two sets of inputs: n address lines (just like the decoder) and as many as 2n inputs, one of which is selected by each address for output (it may have less inputs) A multiplexer has only one output. The output is the value of the input selected by the address Table 5.1 Differences between decoder and multiplexer Thus, we see that a decoder makes up a part of a multiplexer. 5.6 Code Converters One major class of logic circuits is known as a code converter. These are circuits that translate a code into another. Usually these converters are programmed in logic arrays. This is a circuit that accepts as inputs the digits of a word that expresses some information in a particular code and that yields as outputs the digits of a word in a different code BCD-binary Conversion A simple method to convert BCD code into binary code is using adder circuits. The value of each bit in a BCD number is represented by a binary number. All binary representation with weight equal to 1 are added. The result of the addition is the binary equivalent of the BCD number = Fig BCD-Binary conversion (Source: The inverse operation can also easily figured out. There are two chips and that convert BCD to binary and vice versa. Fig. 5.9 shows how to convert 2 digits BCD numbers in binary and 8 bit binary numbers in 3 digit BCD numbers 73

86 Introduction to Digital Electronics Fig Two digits BCD to binary converter (74184 circuit) and 8 bit binary to 3 digit BCD converter (74185 circuits) (Source: Binary-Grey Conversion Simple circuits used to convert binary to Grey and vice versa are: B0 G0 G0 B0 B1 G1 G1 B1 B2 G2 G2 B2 B3 G3 G3 B3 Fig Binary-Grey conversion (Source: Though more than one tool may work for a given job, the key is to select the right one. Although system design has been oriented around making use of higher levels of integration, a lot of jobs of interfacing the MSI devices are still best done with discrete gates. 74

87 Summary Circuits in which all outputs at any given time depend only on the inputs at that time are called combinational logic circuits. There is an active array of devices such as multiplexers, demultiplexers, adders, parity generators, etc. These devices significantly reduce IC package count thereby reducing the system cost. The system design is greatly simplified because the laborious and time consuming simplification methods are generally not required. This also improves the reliability of the system by reducing the number of external wired connections. The data is available, in parallel, on many different lines but must be transmitted over a single communications link. A mechanism is needed to select which of the many data lines to activate sequentially at any one time so that the data this line carries can be transmitted at that time. This process is called multiplexing. A multiplexer (MUX) is a device which selects one of many inputs to a single output. The selection is done by using an input address. Hence, a MUX can take many data bits and put them, one at a time, on a single output data line in a particular sequence. This is an example of transforming parallel data to serial data. A demultiplexer (DEMUX) performs the inverse operation, taking one input and sending it to one of many possible outputs. Again the output line is selected using an address. A MUX-DEMUX pair can be used to convert data to serial form for transmission, thus reducing the number of required transmission lines. Adders play one of the most important roles in binary arithmetic. In fact, fixed point addition is often used as a simple measure to express processor s speed. Addition and subtraction circuit can be used as the basis for implementation of multiplication and division. Considerable efforts have been put in designing of high speed addition and subtraction. The adders are suitable for the addition of complement numbers if some additional circuitry is used to process the final carry out. Binary subtraction can be performed using the same adder circuits by negating the subtrahend. Decoders are circuits that detect a specific combination of bits in the input generating an output according with the input. So if there are n inputs, the maximal number of outputs can be up to 2n. One major class of logic circuits is known as a code converter. These are circuits that translate a code into another. Usually these converters are programmed in logic arrays. This is a circuit that accepts as inputs the digits of a word that expresses some information in a particular code and that yields as outputs the digits of a word in a different code. References MSI Combinational Logic Circuits [Pdf] Available at: < Spring1999/Msidevce.PDF> [Accessed 20 June 2013]. Combinational Logic [Pdf] Available at: < pdf> [Accessed 20 June 2013]. Yarbrough, J. M., Digital Logic: Applications and Design, West Publishing Company, College & School Division. Wirth, N., Digital Circuit Design for Computer Science Students: An Introductory Textbook, Springer Lecture 4- Combinational Circuit Design Using MSI Blocks, [Video online] Available at: < youtube.com/watch?v=ga59un2gixq> [Accessed 20 June 2013] Combinational Logic - Multiplexers, [Video online] Available at: < watch?v=kpgel7xynjc> [Accessed 20 June 2013]. Recommended Reading Mano, Digital Logic & Computer Design, Pearson Education India. Subramanyam, M.V., Switching Theory and Logic Design, Firewall Media. Bakshi, U. A. & Godse, A. P., Analog and Digital Electronics, Technical Publications 75

88 Introduction to Digital Electronics Self Assessment 1. Circuits in which all outputs at any given time depend only on the at that time are called combinational logic circuits. a. inputs b. c. d. outputs combination voltage is a device which selects one of many inputs to a single output. a. DEMUX b. c. d. MUX Register Counter The interprets the input address to select a single data bit. a. encoder b. c. d. register decoder circuit State which of the following is true. a. Floating point addition is often used as a simple measure to express processor s speed. b. c. d. Fixed point subtraction is often used as a simple measure to express processor s speed. Fixed point addition is often used as a simple measure to express calculator s speed. Fixed point addition is often used as a simple measure to express processor s speed. The 2's complement notation is one of the most widely used codes for binary numbers. a. fixed-point b. c. d. floating-point unstable-point number-point Speed can be improved by using that favour speed at the expense of other measures, such as power consumption. a. designs b. c. d. gate designs circuits cables State which of the following statement is true. a. A adder is a dispositive with two inputs and two outputs b. c. d. A full adder is a dispositive with two inputs and two outputs A half adder is a dispositive with two inputs and two outputs A half adder is a dispositive with two inputs and one outputs 76

89 8. 9. Binary subtraction can be performed using the same adder circuits by negating the. a. minuend b. minuhend c. decimal number d. subtrahend A decoder that contains enable inputs is also known as a. a. decoder-demultiplexer b. decoder-multiplexer c. encoder-demultiplexer d. encoder-multiplexer 10. The circuits that translate a code into another are known as. a. converters b. code converters c. code changers d. code exchangers 77

90 Introduction to Digital Electronics Chapter VI Flip-Flops Aim The aim of this chapter is to: explain the concept of flip flops elucidate the types of flip flops explicate the use of excitation tables Objectives The objectives of this chapter are to: explain the concept of clocked Flip Flops enlist the characteristics of S-R, J-K Flip Flops determine the use of shift registers Learning outcome At the end of this chapter, you will be able to: understand master-slave Flip Flops describe characteristics of D and T type of Flip Flops identify the types of counters 78

91 6.1 Introduction A combinational logic circuit operates such that the output of the circuit depends only on the input(s). We will now move on to sequential logic, which makes up a large portion of the digital circuits in computers. Sequential logic differs from combinational logic in several ways: Its outputs depend not only on logic inputs but also the internal state of the logic. The output of sequential logic does not necessarily change when an input changes, but is synchronised to some "triggering event". Sequential logic is often synchronised or triggered by a train of regular pulses on a serial input line, which is referred to as a "clock". Sequential logic has inputs and outputs like combinational logic. It also has a timing (synchronising) mechanism and state or memory element(s). Sequential logic may (usually will) have combinational parts. Sequential logic outputs depend on the timing and state elements as well as the input variables. That is, the outputs normally change as a function of the timing element. Clock or Timing Device State or Memory Element Combinational Logic Elements Input Variables Output Fig. 6.1 Representation of sequential logic (Source: A digital system is required to store binary numbers in addition to performing logic; Flip-Flops implements the function of storing the binary information. Let us study how this Flip-flop operates and performs as a memory unit/cell. Sequential circuits are those circuits whose output at any given time "t" depends on input values of previous time instants and the present input or in other words, it has a memory. All combinatorial logic circuits, which have been discussed till now, do not have memory and they are not sequential circuits. Besides Flipflops we will also discuss the sequential circuits such as counters and shift registers and their possible use in the digital systems. 6.2 Flip-Flops Flip-flops are digital circuits whose output value will not change, once it is set unlike the combinatorial circuits whose output values is dependent on the input values. Flip-flops are used in building counters and registers and other sequential circuits. They are used for storing binary numbers and they are memory elements for sequential circuits. There are four basic Flip-Flops viz. SR-, JK-, T- and D-type Flip-Flops. We will study them one by one and explore their possible applications in digital circuits. Any device or circuit which has two stable states are called bistable like switch in our previous section has two states either it is up or down. When it is up it is connected to Vcc (high) and when it is down it is connected to ground (low). 79

92 Introduction to Digital Electronics Flip-flops also have two states of operation. When the flip-flop has output set to 0 V, it can be assumed as storing logic 0 and when the output is set to 5 V (Vcc), it is storing logic 1. Since a Flip-flop holds or latch into either one of these states it is also called as a latch. A basic Flip-flop or latch is obtained by cross-coupling two NOT circuits NOT-1 and NOT-2 as shown in Fig. 6.2 Note that single-input NAND gates perform the function of NOT gates. Do note that the Flip-Flop in Fig, 6.2 also has feedback line, i.e. output in each gate is connected to the input of the others. The output bistable states are represented using Q = 1 (Q = 0) is called the 1 state and Q = 0 (Q = 1) is called the 0 state. It should be noted that the outputs Q and Q are always complementary for all cases. Q Q Fig. 6.2 Basic flip flop or latch (Source: Simple Latch or S-R Flip-Flop (Set-Reset Flip-Flop) The simplest example of a sequential logic device is the S-R latch or S-R flip-flop (S-R FF). This is a non-clocked device that simply consists of two cross connected 2-input NAND gates (it may also be represented as combinations of other gates). Note that per our definition, the S-R FF has an output that depends on its current state as well as the inputs. This most basic form of the S-R FF uses negative-true input logic. That is, it changes states based on inputs that transition to 0, not to 1. When the Q output is 1 and Q=0, the S-R FF is said to be set. Likewise, when Q=0 and Q=1, the flip-flop is said to be reset. Q and Q will always have opposite states. The S-R is bistable. That is it is at rest in one of its two states ( set or reset ) until an input forces it to change. If the R-S FF is in the set state, it will not go reset until the Reset line goes true (in this case, to 0). Likewise, when reset, it will not go set unless the Set line goes to 0. Note also that once set, if Set goes to 0 more than once, the FF simply stays set. Likewise, when reset, more Reset s do not affect the circuit; it remains reset. Thus the R-S FF has an output that depends not only on the inputs but the current state. Assume the FF is reset (Q=0). Also, since the Set and Reset inputs are not active, both input are at 1. Thus Set = 1, Reset = 1, Q=0, Q=1. Then the cycle is: Set goes active (Set 0). Then Q must 1 (output of a NAND = 1 if any input = 0). Then both inputs to bottom NAND are 1, and Q 0. The other input to the upper NAND is now 0. Thus, when the Set signal goes back high Q remains at 1 since the other input is still 0. Likewise, since both inputs to the lower NAND are now 1, then the value of Q remains 0. The reverse cycle (set-to-reset) occurs in the identical way, except that the change is initiated by reset going low. 80

93 Set Q Reset Q (a) Inputs Current Outputs New Outputs S R Q Q Q Q or 0 0 or 1 Same Same Same Same Same Same 0* 0* 1 or 0 0 or 1 1* 1* * This is a race condition and not stable. The S-R input 0-0 is forbidden. (b) Forbidden S-R FF Inputs Fig. 6.3 (a) S-R Flip Flop; (b) Truth table for S-R FF (Source: As noted on the truth table, 0-input to both R and S is forbidden. Note the race condition that is triggered by R=S=0: Then Q= =1, so both other 2-NAND inputs are 1. If S and R go to 1 simultaneously, then all 4 inputs of the two 2-input NAND gates are 1 and both outputs go to 0(!) The result is a race to see which output gets to 0 first, getting one 2- NAND input to 0, and therefore forcing that NAND output to 1. The result of the race cannot be predicted. Thus R and S = 0 together is forbidden, since the output state is not stable S-R FF Uses Many exotic flip-flops are based on the simple R-S FF. In fact, the humble R-S FF can be regarded as the basis of all sequential logic. Many circuits in the modern computer are either based on or related to the R-S FF. These include: The data storage register (simply referred to as the register in most cases, such as the MIPS R2000 Processor that we will study shortly) The binary counter The shift register Most status indicators Many types of computer memory (although the DRAM, the most common computer memory element, is not a flip-flop-based device) 81

94 Introduction to Digital Electronics 6.3 JK-type Flip Flops JK Flip Flop can be achieved from the clocked SR Flip Flop by adding two AND gates at the input as shown in Fig For this case, S=J and R=KQ. J Q Q Q K Q 6.4 Clocked Circuits Fig. 6.4 JK type flip flop (Source: The majority of all sequential logic circuits are clocked logic circuits. Clocked circuits are circuits that are regulated by a clocking element, which determines when state changes are made in the sequential logic circuit. In a clocked sequential circuit, in general, the circuit can only change states on a tick of the clock element. Thus we say that all operations in this type of circuit are clocked. We refer to a circuit as a clocked circuit when all the sequential elements in the circuit change states in synchronisation to a train of pulses. Such a pulse train is shown below. The clock pulses change regularly from 0 to 1 and back. 1 T T 0 Fig. 6.5 Pulse train (Source: The period T of a sequential logic clock is the distance between identical points on the pulse train, e.g., two rising edges or two falling edges. The clock has only two states: 0 and 1. The clock alternates between the states. The amount of time that the clock spends in each of the two states is called the duty cycle. The clock below has a 50/50 duty cycle; it spends equal time each period in the 1 and 0 states 82

95 6.4.1 Clocked FF All FF s have the same basic configuration: Both true and false outputs ( Q and Q-not ). Set is when Q=1. Triggered by set and reset inputs. The most useful FF s are not simple asynchronous (non-clocked) FF s, however, but synchronous ( clocked ) FF s. Clocked FF s are very similar to non-clocked FF s -- the main difference is that in addition to a set or reset input to cause the outputs to change, there must also be the presence of a clock signal in its true state (normally 1). Thus clocked FF s do not change states, regardless of the set or reset inputs, until the clock ticks Clocked R-S FF The simplest clocked FF is the clocked R-S FF, (NAND version). In addition to the set and reset inputs, the clock input is present. Since when clock is low (0), neither set nor reset input affect the circuit, we say that the clock gates the set or reset signal to the RS FF. In this case, the set or reset input must be high (1) to set or reset the FF when the clock goes true (0 1). Having set reset 1 at the same time is forbidden as for the RS FF; simultaneous set and reset true causes a race condition when clock is high. Set+ S - Q Clock+ Reset+ R - Q (a) Inputs Current Outputs New Outputs Clock S R Q Q Q Q 0 X X 1 or 0 0 or 1 Same Same or 0 0 or 1 Same Same Same Same Same Same 1 1* 1* 1 or 0 0 or 1 1* 1* (b) Fig. 6.6 (a) Clocked R-S FF; (b) Clocked R-S FF truth table (Source: 83

96 Introduction to Digital Electronics Modern computers use much combinational logic, but they are synchronised and controlled by sequential logic activated by a clock or pulse train. Thus the clocked RS FF is an example of sequential logic that could be used in a modern computer circuit. However, more sophisticated flip-flops are normally utilised in modern computers. One of these is the D flip-flop. 6.5 D Flip-Flop The D FF is a bistable circuit with only one input plus the clock. The term refers to data. Since the D FF is limited to one input, there is no chance that a race condition will occur. The clocked D FF can be created simply by replacing the reset input with an inverted set input in the clocked RS FF. In this configuration, we can see that if the D input = 1, when the clock is high, the FF will go into the set state ( set input=1, reset =0). When the D input = 0, then the FF goes into the reset state when clock goes high ( set input=0, reset =1). When clock = 0, the FF is idle There is no forbidden state here -- the D FF output is defined (see truth table) for ALL inputs. D (S +) S - Q Clock + D (R+) R - Q Clocked D Flip-Flop (a) Inputs Current Outputs New Outputs Clock R Q Q Q Q 0 X 1 or 0 1 or 0 Same Same Same Same Same Same 6.6 "Master-Slave" or Delay Flip-Flops (b) Fig. 6.7 (a) D flip-flop (b) D flip-flop truth table (Source: It is often desirable to have a flip-flop whose output does not change immediately when its internal state is altered from "set" (Q=1) to "reset" (Q=0), or vice-versa. This sort of FF is called a "master-slave" or "delay" FF. The idea behind the master-slave FF is to have a "master" (i.e., controlling) FF change states on one edge of a 84

97 clock pulse (normally the leading edge) and have a second FF connected to the first change to the same state as the "master" on the trailing edge, or "backside" of a clock pulse. In this way, the internal state of the FF changes one-half clock cycle prior to the time in which the changed state appears on the circuit outputs The Master-Slave D Flip-Flop It is D FF converted to master-slave type. The slave (basically a clocked RS FF) always mirrors the state of the master. The slave circuit changes state 1/2 cycle after the master. The state device still operates as a D FF; no indeterminate state. D Q Clock+ Master Slave Q The J-K Master-Slave Flip-Flop Fig. 6.8 The master-slave D flip-flop (Source: It is often useful to have a FF that will not have indeterminate outputs when S and R inputs are both 1 simultaneously. The J-K FF, shown above, fits those requirements. The J input corresponds to Set, while K corresponds to Reset. The J-K FF is designed so that the condition of J = K = 1 does not result in an indeterminate output when clocked. There may still be asynchronous RS inputs with the usual cautions. However, the J-K inputs are not restricted J K OR Q Q Clock J-K Master-Slave Flip Flop Fig. 6.9 The J-K master-slave flip-flop (Source: 85

98 Introduction to Digital Electronics The Toggle Flip-Flop (T type) The T FF is like a JK FF with J and K tied together (K input inverted). Then if T = 1, and clock = 1, the FF toggles to the opposite state. If T = 0, the FF does not change state on the clock tick. The T FF is a master-slave FF; output changes on the back edge of the clock. Set T = 1 permanently, and the T FF toggles on every clock pulse. Note Q tied to the K input and Q-not tied to the J input. This feedback, along with the connected J and K inputs, enables the T FF to work properly. T 1 3 Q 2 4 Q Clock Input T Outputs (a) AND Outputs OR Outputs New Outputs Q Q Q Q Same Same Same Same Excitation tables 86 (b) Fig (a) Toggle flip-flop; (b) Toggle flip-flop truth table (Source: The truth table of a FF is also referred to as the characteristic table and specifies the operational characteristics of the FF. Similarly input conditions can be found for all possible situations. A tabulation of these conditions is known as excitation table. It is very important and useful design aid for sequential circuits. Present state Next state S-R S n FF R n J-K J n FF K n T-FF T n X 0 X X X X 0 X Table 6.1 Excitation table (Source: Jain, R.P. Modern digital electronics. p 248.) D-FF D n

99 6.8 Shift Registers A Flip Flop can store a single bit of information and to store several bits of data we need a series of flip flops, which are connected in cascade and such a group of flip-flops, are called as Shift Registers. A three-element Shift Register is depicted in Fig and it is constructed using three D type flip flops, which are connected in cascade form. It can store 3 bits of information. n flip-flops can store n bits of information. Q A Q A Q C Data out Data in D A D B D C CK A CK B CK C Clock 6.9 Counters Fig Three element shift register (Source: Digital counters are often needed to count events. Electrical pulses corresponding to the event are produced using a transducer and these pulses are counted using a counter. The counters are composed of Flip Flops. Computer events are timed and synchronised by a clock, so keeping track of timing becomes important. Computers do not execute an instruction per clock cycle. Most computer instructions take several clock periods All instructions do not take the same number of clock periods Thus counting clock periods as events is important. Counting pulses can be done by binary counters, all of which are made from master-slave T FF s. Circuits may be built that "count" in a binary sequence, using J-K flip-flops set up in the "toggle" mode. Asynchronous (Ripple) counters In a chain of four T-type Flip Flop with the output Q of each stage connected to the clock input of the following T Flip Flop. (Shown in Fig 6.12). The pulses to be counted are applied to the clock input of the first Flip Flop. Here the T input for all the Flip Flops is tied to 1 hence it acts as Toggle Flip Flop. Q1 changes state at the falling edge of each pulse. All other Q s make changes its states only when the Flip Flop changes from 1 to 0. This negative transition ripples through the counter from the LSB to the MSB. This will be clearer from the waveform chart given in Fig 6.13 and Table 6.2 lists the states of all the binaries of the ripple counter. Let us see how to draw this waveform chart of Fig Knowing that the Q1 changes its state at the negative transition of clock pulse we can draw the waveform for output Q1. Knowing that the Q2 changes its state at the negative transition of Q1 we can draw the waveform for output Q2 and so on. Let us see how to read this waveform to get the binary count number. Let us assume that the 4th pulse is already given to Clock input of the Ripple Counter, then we can read the binary count as 0100 (decimal value is 4) as shown in Fig Similarly after the 5th pulse is given to Clock input of Fig 6.13we can read the binary count as 0101 (decimal value is 5). So basically it is up counting the binary numbers. 87

100 Introduction to Digital Electronics High Q 1 Q 2 Q 3 Q 4 Logic 1 T Q T Q T Q T Q Clock Fig Group of T type flip flops acting as a ring counter (Source: Clock q 1 q 2 q 3 q 4 Fig 6.13 Waveform chart of four -stage ripple counter (Source: 88

101 No. of input Flip Flop Outputs pulses Q 4 Q 3 Q 2 Q Synchronous counters Table 6.2 States of flip flops for ripple counter (Source: In Synchronous counters the Flip Flops are triggered in synchronism with the clock unlike the ripple or asynchronous counters. There are some inherent problems with the ripple counters since each Flip Flop has a time delay. The overall time delay of a ripple counter is the summation of time delays of each Flip Flops, which limits the highest operating frequency of counters. The Synchronous counter depicted in Fig 6.14 has overcome this problem by some kind of parallel operation. The truth table is the same as in Table 6.2 and the waveform chart is also the same as illustrated in Fig Let us try to understand the operation of these binary counters. Each Flip Flop is a T-type Flip Flop with the input T tied to 1 and hence it acts as toggle Flip Flop. The Clock input has some modifications for parallel operation as shown in Fig Whenever Q 1 is high, AND-1 output is high; a clock pulse is passed through the clock input of second Flip Flop. Thus Q 2 changes its state at the negative transition of pulse 1, 3, 5 and 7. Note that these Flip Flops are negative triggered Flip Flops. The AND-2 output is high only when Q 1 and Q 2 are high thereby enabling the third Flip Flop hence the Q 3 will change state at the negative transition of pulse number 3 and 7 only. If we try to write down the Binary numbers, which are made up of values of Q, Q, Q and Q for different time periods from the waveform chart of Fig 6.13, we will get the Truth Table 6.2 which is basically a upward binary count for mod-16 parallel counter. Note that the problem of propagation delay has been overcome in such counters since all the Flip Flops changes its state at the same time or in synchronism with the system clock pulse. The waveform chart and truth table for the synchronous counter is the same with the previous ripple counter only that now we are changing the states of the Flip Flops simultaneously or in synchronism with system clock. 89

102 Introduction to Digital Electronics Pulses AND-1 AND-2 AND-3 1 T 1 Q 1 T 2 Q T 3 Q 2 3 T 4 Q 4 Ck Ck Ck Ck Fig Four element synchronous counter (Source: 90

103 Summary A combinational logic circuit operates such that the output of the circuit depends only on the input(s). Sequential logic, which makes up a large portion of the digital circuits in computers, has been presented. Sequential logic differs from combinational logic in several ways, for E.G. Its outputs depend not only on logic inputs but also the internal state of the logic. The output of sequential logic does not necessarily change when an input changes, but is synchronised to some triggering event. Flip-flops are digital circuits whose output value will not change once it is set unlike the combinatorial circuits whose output values is dependent on the input values. Flip-flops are used in building counters and registers and other sequential circuits. They are used for storing binary numbers and they are memory elements for sequential circuits. The simplest example of a sequential logic device is the S-R latch or S-R flip-flop (S-R FF). This is a nonclocked device that simply consists of two cross connected 2-input NAND gates (it may also be represented as combinations of other gates). The S-R FF has an output that depends on its current state as well as the inputs. Zero-input to both R and S is forbidden. The humble R-S FF can be regarded as the basis of all sequential logic. Many circuits in the modern computer are either based on or related to the R-S FF. JK Flip Flop can be achieved from the clocked SR Flip Flop by adding two additional AND gates at the input. Clocked circuits are circuits that are regulated by a clocking element, which determines when state changes are made in the sequential logic circuit Clocked FF s are very similar to non-clocked FF s -- the main difference is that in addition to a set or reset input to cause the outputs to change, there must also be the presence of a clock signal in its true state (normally 1).Thus clocked FF s do not change states, regardless of the set or reset inputs, until the clock ticks. The D FF is a bistable circuit with only one input plus the clock. The term refers to data. Since the D FF is limited to one input, there is no chance that a race condition will occur. The clocked D FF can be created simply by replacing the reset input with an inverted set input in the clocked RS FF. It is often desirable to have a flip-flop whose output does not change immediately when its internal state is altered from set (Q=1) to reset (Q=0), or vice-versa. This sort of FF is called a master-slave or delay FF. A Flip Flop can store a single bit of information and to store several bits of data we need a series of Flip Flops, which are connected in cascade and such a group of Flip Flops, are called as Shift Registers. Digital counters are often needed to count events. Electrical pulses corresponding to the event are produced using a transducer and these pulses are counted using a counter. The counters are composed of Flip Flops. References Flip-Flops Registers and Flops, Registers, and Counters [Pdf] Available at: < ca/~thomas/mp/ece2220/lectures/7.pdf> [Accessed 19 June 2013] Flip-Flops [Pdf] Available at: < [Accessed 19 June 2013] Dandamudi, S.P., Fundamentals of Computer Organisation and Design, Springer. Maini, A.K., Digital Electronics: Principles, Devices and Applications, John Wiley & Sons SR Latches, D Latches, and D Flip-flops, [Video online] Available at: < watch?v=cufzladdqq8> [Accessed 19 June 2013] Lesson 61-Latches and Flip-Flops, [Video online] Available at: < watch?v=pct76psdr6g> [Accessed 19 June 2013]. 91

104 Introduction to Digital Electronics Recommended Reading Shiva, S.G., Introduction to Logic Design, 2nd ed., CRC Press. Ram, B., Computer Fundamentals: Architecture and Organisation, 3rd ed., New Age International. Kandel, A., Foundations of Digital Logic Design, World Scientific. 92

105 Self Assessment 1. The output of sequential logic does not necessarily change when an input changes, but is to some "triggering event". a. synchronised b. c. d. a synchronised equated related State which of the following is true. a. Combinational logic outputs depend on the timing and state elements as well as the input variables. b. c. d. Sequential logic outputs depend on the timing and state elements as well as the input variables. Sequential logic inputs depend on the timing and state elements as well as the output variables. Sequential logic outputs depend on the value and state elements as well as the input variables. Flip-Flops implement the function of the binary information. a. converting b. c. d. reducing storing relating Flip-flops are digital circuits whose value will not change once it is set. a. input b. c. d. total final output Flip-flop is also known as. a. Latch b. c. d. Enumerator Storage device Converter Identify the Flip Flop type that is a non-clocked device that simply consists of two cross connected 2-input NAND gates. a. S-R type b. c. d. J-K type R-K type L-type State which of the following is true. a. The period K of a sequential logic clock is the distance between identical points on the pulse train. b. c. d. The period T of a combinational logic clock is the distance between identical points on the pulse train. The period T of a sequential logic clock is the distance between identical points on the pulse train. The period T of a sequential logic clock is the relation between identical points on the pulse train. 93

106 Introduction to Digital Electronics The D FF is a circuit with only one input plus the clock. a. stable b. tristable c. unstable d. bistable A tabulation of conditions is known as excitation table. a. input b. output c. relative d. unique 10. A series of Flip-Flops, which are connected in cascade, are called as. a. counter b. shift registers c. circuits d. clocks 94

107 Chapter VII Digital Logic Families Aim The aim of this chapter is to: introduce digital integrated circuits elucidate the concept of logic families explain the use of logic families Objectives The objectives of this chapter are to: understand the classification of digital integrated circuits examine characteristics of ICs determine the types of logic families Learning outcome At the end of this chapter, you will be able to: understand important characteristics of ICs define DL, RTL, DTL recognise important logic families 95

108 Introduction to Digital Electronics 7.1 Introduction In electronics, an integrated circuit (also known as IC, chip, or microchip) is a miniaturised electronic circuit (consisting mainly of semiconductor devices, as well as passive components) that has been manufactured in the surface of a thin substrate of semiconductor material. Integrated circuits are used in almost all electronic equipment in use today and have revolutionised the world of electronics. ICs are low-cost electronic circuits whose components are fabricated on a single, continuous piece of semiconductor material to perform a high-level function. They are usually referred to as a monolithic IC. They were first introduced in They are categorised as digital or linear ICs or according to the level of complexity of the IC. 7.2 Classification of Digital ICs Digital ICs are classified according to the complexity of the circuit, as the relative number of individual basic gates (2-input NAND gates) it would require to build the circuit to accomplish the same logic function or the number of components fabricated on the chip. Category Abbreviation Number of gates Small scale integration SSI <12 Medium scale integration MSI 12 to 99 Large scale integration LSI 100 to 9999 Very large scale integration VLSI 10,000 or more Table 7.1 Digital IC classification (Source: Digital IC can be further categorised into bipolar or unipolar IC. Bipolar ICs are devices whose active components are current controlled while unipolar ICs are devices whose active components are voltage controlled. 7.3 Characteristics of Digital ICs With the widespread use of ICs in digital systems and with the development of various technologies for fabrication of IC, it is necessary to be familiar with the characteristics of IC logic families and their relative advantages and disadvantages Fan-in Fan-in (input load factor) is the number of input signals that can be connected to a gate without causing it to operate outside its intended operating range. expressed in terms of standard inputs or units loads (ULs) Fan-out Fan-out (output load factor) is the maximum number of inputs that can be driven by a logic gate. A fan-out of 10 means that 10 unit loads can be driven by the gate while still maintaining the output voltage within specifications for logic levels 0 and 1. Example: A unit load for some particular logic family is as follows: 1UL = 50 µa HIGH state 1mA LOW state Determine the fan-in and fan-out for a gate in this family that has the following parameters: I OH = 400µA I OL = 10mA 96

109 I IH = 150µA I IL = 4 ma Solution: Fan-in = 150/50 = 3 UL or 4/1 = 4 UL Therefore, fan-in = 3. Fan-out = 400/50 = 8 UL or 10/1 = 10 UL Therefore fan-out = 8 UL Propagation Delays The time between the logic transition on an input and the corresponding logic transition on the output of the logic gate. The propagation delay is measured at midpoints. The delay before a change in the input is reflected in the output. High Input pulse Low High Output pulse 50% Low t PLH t PHL t PHL : delay time in going from logic 1 to logic 0 (turn-off delay). t PLH : delay time in going from logic 0 to logic 1 (turn-on delay) Noise Margin/Immunity Fig. 7.1 Propagation delay (Source: It is the ability of the gate to tolerate fluctuations of the voltage levels. V NH = HIGH-state noise margin V NL = LOW-state noise margin V IL = LOW-state input voltage V IH = HIGH-state input voltage V OL = LOW-state output voltage = HIGH-state output voltage V OH Where, V NH V NL = V OH -V IH = V IL - V OL Manufacturers specify voltage limits to represent the logical 0 or 1. These limits are not the same at the input and output sides. For example, a particular gate A may output a voltage of 4.8V when it is supposed to output a HIGH but, at its input side, it can take a voltage of 3V as HIGH. In this way, if any noise should corrupt the signal, there is some margin for error. 97

110 Introduction to Digital Electronics Consider the following case where the output of logic circuit A is connected to the input of logic circuit B. A Noise V o V i A Fig. 7.2 Noise immunity (Source: When the output of A is low, V O, the input to B, V i, should also be low. But because of noise, V i is not exactly V O but could be higher. As long as V i is not more than V IL, B will still take the signal as a LOW. If V i is more than V IL though, then the signal may not appear as a LOW. The effect of noise is shown in the following figure. 1 V OH V IH Power Dissipation Fig. 7.3 Effect of noise (Source: Power dissipation is the amount of heat that the IC dissipates in the form of heat. It is determined by the current, I CC that it draws from the V CC supply, and is given by V CC X I CC. I CC is the average value of I CC (0) and I CC (1). This power is specified in milli watts. V DD Int (Gata) Subthreshold SW C load load Gn Fig. 7.4 Power dissipation (Source: 98

111 7.4 Logic Families There are a variety of circuit configurations or more appropriately various approaches used to produce different types of digital integrated circuit. Each such fundamental approach is called a logic family. The idea is that different logic functions, when fabricated in the form of an IC with the same approach, or in other words belonging to the same logic family, will have identical electrical characteristics. These characteristics include supply voltage range, speed of response, power dissipation, input and output logic levels, current sourcing and sinking capability, fan-out, noise margin, etc. In other words, the set of digital ICs belonging to the same logic family are electrically compatible with each other. In the case where the output of an IC belonging to a certain family feeds the inputs of another IC belonging to a different family, we must use established interface techniques to ensure compatibility. 7.5 Types of Logic Family The entire range of digital ICs is fabricated using either bipolar devices or MOS devices or combination of the two. Bipolar families include: Diode logic (DL) Resistor transistor logic (RTL) Diode transistor logic (DTL) Transistor transistor logic (TTL) Emitter coupled logic (ECL) also known as current mode logic (CML) Integrated injection logic (IIL) The logic families that use MOS devices as their basis are known as MOS families, and the prominent members belonging to this category are: PMOS family (using P-channel MOSFETs) NMOS family (using N-channel MOSFETs) CMOS family (using both N- and P-channel devices) Features of some important logic families are discussed in following sections Resistor Transistor Logic (RTL) Resistor-transistor logic gates use Transistors to combine multiple input signals, which also amplify and invert the resulting combined signal. Often an additional transistor is included to re-invert the output signal. This combination provides clean output signals and either inversion or non- inversion as needed. Advantages RTL gates are almost as simple as DL gates, and remain inexpensive. Using low power supply for each gate. RTL integrated circuits are sometimes used as inexpensive small- signal amplifiers, or as interface devices between linear and digital circuits. Limitations RTL gates cannot switch at the high speeds used by today's computers These are not designed for linear operation. Low noise margin 99

112 Introduction to Digital Electronics V cc R o V o Rb Rb Rb V i1 V i2 V IN Diode Logic (DL) Fig.7.5 RTL (Source: In Diode logic, all the logic is implemented with the use of resistors and diodes. It is essential that the diode is forward biased so that it can conduct. In diode logic, the purpose of the diodes is to perform OR and AND operations. Diodes can also be used as a logical switch. The disadvantage of Diodes is that they tend to degrade the signals quickly. Diodes also cannot work for multiple stages, only one stage at a time. The diodes also cannot perform the NOT operation which limits their functionality. A Z = A + B B Fig. 7.6 Diode logic with basic OR gate (Source: 100

113 +V A B Z = A B Diode Transistor Logic (DTL) Fig. 7.7 Diode logic with basic AND gate (Source: In Diode-transistor logic, all the logic is implemented with the use of diodes and transistors. DTL has some advantages over DL and RTL. As the diodes can perform AND and OR operations but along with a transistor the output signal can be amplified. In DTL, the signal can be restored to full logic levels if we add a transistor at the output of the logic gates. This results in logic inversion. The switching speed of the transistor is limited due to the input resistor to transistor. DTL was used in early vacuum tube computers. + V A B X = A + B + C + D C D Fig. 7.8 DTL (Source: dspace.sngce.ac.in/bitstream/ /1442/2/2222.doc) Advantages The advantage of this circuit over its RTL equivalent is that the OR logic is performed by the diodes, not by resistors. Therefore, there is no interaction between different inputs, and any number of diodes may be used. Disadvantages A disadvantage of this circuit is the input resistor to the transistor. Its presence tends to slow the circuit down, thus limiting the speed at which the transistor is able to switch states. 101

114 Introduction to Digital Electronics Emitter Coupled Logic (ECL) In Emitter coupled logic, the transistors are prevented from going into deep saturation so that there are no storage delays. This logic is used in applications with high speed environment. ECL is considered to be one of the best because there is a very low propagation delay. In fact, it is the fastest bi-polar circuit available today. ECL was first introduced in This logic family bypasses TTL in terms of speed. ECL is also a non-saturated logic. The logic levels for ECL are normally -0.9V for high logic and -1.6 for low logic. The design of ECL consists of termination resistors which allow the signals to propagate with very low reflection. A + B + C A + B + C A B C V BB V EE Fig. 7.9 Emitter coupled logic (Source: dspace.sngce.ac.in/bitstream/ /1442/2/2222.doc) Transistor-Transistor Logic (TTL) In transistor-transistor logic, the logic gates are constructed around the transistors. It was first introduced in TTL uses bipolar transistors to construct its integrated circuits. TTL has become the standard logic circuit in many applications for a number of years. TTL greatly decreases the manufacturing costs because multiple emitters can be added in the input so no extra space is needed and a multiple input gate can be constructed easily. The output circuit has also been modified in recent years and the configuration is called "Totem pole". A commercial IC package of TTL includes three three-input gates, four two-input gates, or two four-input gates. The structure of the IC always remains the same. TTL refers to the technology for designing and fabricating digital integrated circuits that employ logic gates consisting primarily of bipolar transistors. It overcomes the main problem associated with DTL, i.e., lack of speed. Transistor transistor logic (TTL) is a class of digital circuits built from bipolar junction transistors (BJT) and resistors. It is called transistor transistor logic because both the logic gating function (e.g., AND) and the amplifying function are performed by transistors (contrast this with RTL and DTL). TTL is notable for being a widespread integrated circuit (IC) family used in many applications such as computers, industrial controls, test equipment and instrumentation, consumer electronics, synthesizers, etc. The designation TTL is sometimes used to mean TTL-compatible logic levels, even when not associated directly with TTL integrated circuits, for example as a label on the inputs and outputs of electronic instruments. The input to a TTL circuit is always through the emitter(s) of the input transistor, which exhibits a low input resistance. The base of the input transistor, on the other hand, is connected to the Vcc line, which causes the input transistor to pass a current of about 1.6 ma when the input voltage to the emitter(s) is logic '0', i.e., near ground. Letting a TTL input 'float' (left unconnected) will usually make it go to logic '1', but such a state is vulnerable to stray signals, which is why it is good practice to connect TTL inputs to Vcc using 1k ohm pull-up resistors. 102

115 The most basic TTL circuit has a single output transistor configured as an inverter with its emitter grounded and its collector tied to Vcc with a pull-up resistor, and with the output taken from its collector. Most TTL circuits, however, use a totem pole output circuit, which replaces the pull-up resistor with a Vcc-side transistor sitting on top of the GND-side output transistor. The emitter of the Vcc-side transistor (whose collector is tied to Vcc) is connected to the collector of the GND-side transistor (whose emitter is grounded) by a diode. The output is taken from the collector of the GND-side transistor. Fig 7.10 shows a basic 2-input TTL NAND gate with a totem-pole output. V cc R 1 R 3 T 3 V 11 V 12 T 1 T 2 V o T 4 R 4 Fig A 2-input TTL NAND gate with a totem pole output stage (Source: Complementary Metal Oxide Semiconductor (CMOS) LOGIC CMOS logic is a newer technology, based on the use of complementary MOS transistors to perform logic functions with almost no current required. This makes these gates very useful in battery-powered applications. The fact that CMOS will work with supply voltages as low as 3 volts and as high as 15 volts is very helpful. CMOS gates are all based on the fundamental inverter circuit shown. Note that transistors are enhancement-mode MOSFETs; one N-channel with its source grounded, and one P-channel with its source connected to +V. Their gates are connected together to form the input, and their drains are connected together to form the output. The two MOSFETs are designed to have matching characteristics. Thus, they are complementary to each other. When off, their resistance is effectively infinite; when on, their channel resistance is about 200. Since the gate is essentially an open circuit it draws no current and the output voltage will be equal to either ground or to the power supply voltage, depending on which transistor is conducting CMOS NOT Gate +V A Y = A Fig CMOS NOT gate (Source: dspace.sngce.ac.in/bitstream/ /1442/2/2222.doc) 103

116 Introduction to Digital Electronics When input A is grounded (logic 0), the N-channel MOSFET is unbiased, and therefore has no channel enhanced within itself. It is an open circuit, and therefore leaves the output line disconnected from ground. At the same time, the P-channel MOSFET is forward biased, so it has a channel enhanced within itself. This channel has a resistance of about 200, connecting the output line to the +V supply. This pulls the output up to +V (logic 1). When input A is at +V (logic 1), the P-channel MOSFET is off and the N-channel MOSFET is on, thus pulling the output down to ground (logic 0). Thus, this circuit correctly performs logic inversion, and at the same time provides active pull-up and pull-down, according to the output state CMOS NOR Gate This concept can be expanded into NOR and NAND structures by combining inverters in a partially series, partially parallel structure. The circuit is a practical example of a CMOS 2-input NOR gate. In this circuit, if both inputs are low, both P-channel MOSFETs will be turned on, thus providing a connection to +V. Both N-channel MOSFETs will be off, so there will be no ground connection. However, if either input goes high, that P-channel MOSFET will turn off and disconnect the output from +V, while that N-channel MOSFET will turn on, thus grounding the output. +V A Y = A+B B Fig CMOS NOR gate (Source: dspace.sngce.ac.in/bitstream/ /1442/2/2222.doc) CMOS NAND Gate The structure can be inverted, as shown. Here we have a two-input NAND gate, where a logic 0 at either input will force the output to logic 1, but it takes both inputs at logic 1 to allow the output to go to logic 0. This structure is less limited than the bipolar equivalent would be, but there are still some practical limits. One of these is the combined resistance of the MOSFETs in series. As a result, CMOS totem poles are not made more than four inputs high. Gates with more than four inputs are built as cascading structures rather than single structures. However, the logic is still valid. Even with this limit, the totem pole structure still causes some problems in certain applications. The pull-up and pull-down resistances at the output are never the same, and can change significantly as the inputs change state, even if the output does not change logic states. The result is uneven and unpredictable rise and fall times for the output signal. This problem was addressed, and was solved with the buffered, or B-series CMOS gates. 104

117 +V +V A B Y = A B Fig CMOS NAND gate (Source: dspace.sngce.ac.in/bitstream/ /1442/2/2222.doc) Comparison between Important Logic Families We have seen that different devices use different voltages ranges for their logic levels They differ in other characteristics. The most widely used families are: Complementary metal oxide semiconductor (CMOS) Transistor-transistor logic (TTL) Emitter-coupled logic (ECL) Parameter CMOS TTL ECL Basic gate NAND/NOR NAND OR/NOR Fan-out > Power per gate (mw) Noise immunity t PD (ns) (Propagation delay time) 1 MHz Excellent Very good Good Table 7.2 Comparison between important logic families (Source: Understanding the features and capabilities of different logic families is very important for a logic designer who is out to make an optimum choice for his new digital design from the available logic family alternatives. 105

118 Introduction to Digital Electronics Summary In electronics, an integrated circuit (also known as IC, chip, or microchip) is a miniaturised electronic circuit (consisting mainly of semiconductor devices, as well as passive components) that has been manufactured in the surface of a thin substrate of semiconductor material. Integrated circuits are used in almost all electronic equipment in use today and have revolutionised the world of electronics. Digital ICs are classified either according to the complexity of the circuit, as the relative number of individual basic gates (2-input NAND gates) it would require to build the circuit to accomplish the same logic function or the number of components fabricated on the chip. They are classified as SSI, MSI, LSI, and VLSI. With the widespread use of ICs in digital systems and with the development of various technologies for fabrication of IC, it is necessary to be familiar with the characteristics of IC logic families and their relative advantages and disadvantages. Fan-in (input load factor) is the number of input signals that can be connected to a gate without causing it to operate outside its intended operating range. Fan-out (output load factor) is the maximum number of inputs that can be driven by a logic gate. Power dissipation is the amount of heat that the IC dissipates in the form of heat. There are a variety of circuit configurations or more appropriately various approaches used to produce different types of digital integrated circuit. Each such fundamental approach is called a logic family. The idea is that different logic functions, when fabricated in the form of an IC with the same approach, or in other words belonging to the same logic family, will have identical electrical characteristics. The entire range of digital ICs is fabricated using either bipolar devices or MOS devices or combination of the two. Bipolar families include: Diode logic (DL), Resistor transistor logic (RTL), Diode transistor logic (DTL), Transistor transistor logic (TTL), Emitter coupled logic (ECL) also known as current mode logic (CML), Integrated injection logic (IIL). The logic families that use MOS devices as their basis are known as MOS families, and the prominent members belonging to this category are: PMOS family (using P-channel MOSFETs), NMOS family (using N-channel MOSFETs), CMOS family (using both N- and P-channel devices). Understanding the features and capabilities of different logic families is very important for a logic designer who is out to make an optimum choice for his new digital design from the available logic family alternatives. References Abdullah, M.N., IC Logic Families and Characteristics [Pdf] Available at: < Lectures/Dr-Mohammed-Logic/IC%20Logic%20Families%20and%20Characteristics.pdf> [Accessed 19 June 2013]. CC2510 Digital Logic and Computing Methods [Pdf] Available at: < notes/cc2510-lnlogicfamilies.pdf> [Accessed 19 June 2013]. Mandal, Digital Electronics & Integrated circuits - wbut'12, Tata McGraw-Hill Education. Kumar, A.A., Fundamentals of Digital Circuits, 2nd ed., PHI Learning Pvt. Ltd Sec 9 1 The TTL Family, [Video online] Available at: < 4&list=PLEE878F436D742570> [Accessed 19 June 2013] Lecture - 8 Qualitative discussion on TTL Circuits, [Video online] Available at: < com/watch?v=fuhsawkbx_a> [Accessed 19 June 2013]. Recommended Reading Bakshi, U.A. & Godse, A.P., Linear and Digital IC Applications, Technical Publications. Puri, V.K., Digital Electronics: Circuits and Systems, Tata McGraw-Hill Education. Dorf, R.C., Computers, Software Engineering, and Digital Devices, 3rd ed., CRC Press. 106

119 Self Assessment 1. An integrated circuit is a miniaturised. a. electronic circuit b. clock c. register d. gate Bipolar ICs are devices whose active components are controlled. a. voltage b. current c. pressure d. magnetic How is the Fan-in input output expressed? a. IC b. CL c. UL d. OL The propagation delay is measured at. a. minu points b. sub points c. endpoints d. midpoints is the amount of heat that the IC dissipates in the form of heat. a. Power dissipation b. Power delay c. Propagation dissipation d. Propagation delay Which of the following statements is true? a. Resistor-transistor logic gates use Resistors to combine multiple input signals. b. Resistor-transistor logic gates use Transistors to combine multiple input signals. c. Resistor-transistor logic gates use Transistors to combine single input signal. d. Resistor-transistor logic gates use Transistors to combine multiple output signals. In Diode logic, all the logic is implemented with the use of resistors and. a. capacitors b. semiconductors c. diodes d. circuits 107

120 Introduction to Digital Electronics In Emitter coupled logic, the transistors are prevented from going into deep so that there are no storage delays. a. current b. c. d. voltage pressure saturation The input to a TTL circuit is always through the emitter(s) of the input transistor, which exhibits a low input. a. resistance b. c. d. conductivity insulation electric flow 10. CMOS gates are all based on the fundamental circuit. a. exchange b. inverter c. direct d. connected 108

121 Chapter VIII Semiconductor Memories Aim The aim of this chapter is to introduce the concept of semiconductor memories explain memory organisation explicate the different memory types Objectives The objectives of this chapter are to enlist the categories of digital computer organisation explicate volatile and non volatile memory explain types of RAMs and ROMs Learning outcome At the end of this chapter, you will be able to understand the meaning of semiconductor memories describe Flash, Cache and Virtual memories identify the difference between RAM and ROM 109

122 Introduction to Digital Electronics 8.1 Introduction This unit concentrates on semiconductor memory and its physical and functional characteristics. The various memory types have also been covered. In digital computers, it is always required to store digital data and program coded in the binary form, so that it can be used at any further instant whenever required. A separate section, therefore, called memory (or storage unit) is set up in the computers to provide this facility. There are two separate memories in every computer: internal memory (or main memory) and auxiliary memory (or mass-storage memory). Internal memory stores digital data and the program of instructions that are used for internal operation of the computer where digital information is continuously being moved from one location to another. This memory constantly remains in contact with the CPU. Because the internal processing of data takes place at a fast rate, high-speed flipflops are commonly used in this memory. A large number of bipolar and MOS flip-flops integrated on a single chip has made it possible to make high-speed semiconductor memories at lower costs. The principle of storing data as charges on capacitors, has allowed formation of semiconductor memories with high-density storage and low-power requirements. Auxiliary memory is different from the internal memory. It stores massive amount of data which are not currently being used by the CPU, but they are transferred to the internal memory, whenever required. The auxiliary memory operates at much slower speed than the internal memory. The magnetic cores, disks, tapes or magnetic bubble memories are the nonvolatile devices which have been mostly used to form the auxiliary memories. However, the semiconductor flash-memory is preferred in modem computers because of its high-speed, small-size and low-power requirements. On the basis of the storage devices used, memories can be divided into two categories: magnetic memories-that use magnetic devices, and the semiconductor memories-that use semiconductor devices (bipolar or MOS transistors). Magnetic memories have large storing capacities, but they suffer from being large in size, having higher costs and operating with lower speeds, and therefore they are seldom used. Semiconductor memories, on the other hand, have smaller size, lower cost, faster speed and more reliability. A computer memory must be able to temporarily store the patterns of bits with which the processor is working and provide it immediate access to any location it requests. The storage of information is accomplished by using collections of individual storage elements, each of which is capable of maintaining a single bit. For a device to be useful as a memory element it must have two stable states, a mechanism for setting the device to one state or the other, and a mechanism for reading the state. Memory systems have evolved through a variety of devices that match this characteristic, from relays, vacuum tubes, delay lines, ferrite cores to semiconductor materials. The use of ferrite cores was prevalent for many years to provide the main memory for most computers. The cost and size of these memories, as well as their speed became a disadvantage as semiconductor memories were developed. The technique of storing information by the magnetic orientation of a ferrous material is now used for other types of storage (backup devices) than for the main memory. All microcomputers now use semiconductor memory which consists of RAM and ROM, made in the form of LSI circuits. The principal features of such circuits are low cost, high density and ease of use. Considerable differences exist in the types of semiconductor memory due to the wide range of manufacturing process available. These differences are in terms of: Power consumption Packing density Speed of operation Internal organisation Interface requirements Methods of storage Cost 110

123 Modern digital systems require the capability of storing and retrieving large amounts of information at high speeds. Memories are circuits or systems that store digital information in large quantity. Today, memory circuits come in different forms including SRAM, DRAM, ROM, EPROM, E2PROM, Flash, and FRAM. While each form has a different cell design, the basic structure, organisation, and access mechanisms are largely the same. In this chapter, we classify the different types of memory, and examine the major subsystems. Over the years, technological advancements have been driven by memory designs of higher and higher density. Electronic memory capacity in digital systems ranges from lesser than 100 bits for a simple function to standalone chips containing 256 Mb (1 Mb 210 bits) or more. Circuit designers usually speak of memory capacities in terms of bits, since a separate flip-flop or other similar circuit is used to store each bit. On the other hand, system designers usually state memory capacities in terms of bytes (8 bits); wherein each byte represents a single alphanumeric character. Very large scientific computing systems often have memory capacity stated in terms of words (32 to 128 bits). Each byte or word is stored in a particular location that is identified by a unique numeric address. Memory storage capacity is usually stated in units of kilobytes (K bytes) or megabytes (M bytes). Primarily because memory addressing is based on binary codes, capacities that are integral powers of 2 are most common. For example, 1K byte, 1,024 bytes and 64K bytes = 65,536 bytes. In most memory systems, only a single byte or word at a single address is stored or retrieved during each cycle of memory operation. Dual-port memories are also available that have the ability to read/write two words in one cycle. 8.2 Memory Organisation The preferred organisation for most large memories is shown in Fig This organisation is random-access architecture. The name is derived from the fact that memory locations (addresses) can be accessed in a random order at a fixed rate, independent of physical location, for reading or writing. The storage array, or core, is made up of simple cell circuits arranged to share connections in and vertical columns and horizontal rows. The horizontal lines, which are driven only from outside the storage array, are called wordlines, while the vertical lines, along which data flow into and out of cells, are called bitlines. A cell is accessed for reading or writing by selecting its row and column. Each cell can store 0 or 1.Memories may simultaneously select 4, 8, 16, 32, or 64 columns in one row depending on the application. 111

124 Introduction to Digital Electronics 1 Cell array "CORE" 2 n 2 m 1 Wordlines Row address... Row decoder Cell n Bitlines 2 n 1 2 m Column decoder/mux... Data 1 Column address m Fig. 8.1 Organisation of memory systems (Source: The row and column (or groups of columns) to be selected are determined by decoding binary address information. For example, an n-bit decoder for row selection, as shown in Figure 8.1, has 2 n output lines, a different one of which is enabled for each different n-bit input code. The column decoder takes m inputs and produces 2 m bitline access signals, of which 1, 4, 8, 16, 32, or 64 may be enabled at one time. The bit selection is done using a multiplexer circuit to direct the corresponding cell outputs to data registers. In total, 2 n *2 m cells are stored in the core array. An overall architecture of a 64 Kb random-access memory is shown in Figure 8.2. For this example, n=m=8. Therefore, the core array has a total of 65,536 cells. The memory uses a 16-bit address to produce a single bit output. Memory cell circuits can be implemented in a wide variety of ways. In principle, the cells can be based on the flip-flop designs since their intended function is to store bits of data. However, these flip-flops require a substantial amount of area and are not appropriate when millions of cells are needed. 112

125 2m= 256 Row decoder Column pull-ups Wordline 2n = 256 Bitline n = 8 Address input m = 8 Column decoder 2m Column MUX Read/write Sense en Write en Sense amplifier Read/write control Write driver Data in Data out Fig. 8.2 Overall architecture of memory design (Source: In fact, most memory cell circuits are highly simplified compared to register and flip-flop circuits. While the data storage function is preserved, other properties including quantisation of amplitudes, regeneration of logic levels, input-output isolation, and fanout drive capability may be sacrificed for cell simplicity. In this way, the number of devices in a single cell can be reduced to one to six transistors. Figure 8.2 illustrates a six-transistor memory cell. At the level of a memory chip shown in Figure 8.2, the desired logic properties are recovered through use of properly designed peripheral circuits. Circuits in this category are the decoders, sense amplifiers, column precharge, data buffers, etc. These circuits are designed so that they may be shared among many memory cells. Read-write (R/W) circuits determine whether data are being retrieved or stored, and they perform any necessary amplification, buffering, and translation of voltage levels. 8.3 Digital Computer Digital computers may be viewed both as logic manipulators and as information or data processing devices. With a meaningful list of orders or commands (a program), a general purpose digital computer is designed to accept information (data), manipulate the information logically or arithmetically as indicated by the list of commands, and display the results of the processing action. The term general purpose computer applies to that class of computing machines which have not been designed to solve a specific problem (for example, missile guidance), but rather to solve any computable problem. Although computability has a rigorous mathematical meaning, an intuitive understanding of the term is sufficient. A computable problem is one which can be stated mathematically or symbolically and for which a terminating solution procedure or algorithm can be outlined in an unambiguous stepby-step pattern. 113

126 Introduction to Digital Electronics Digital computers are generally viewed as a unit, that is, a single problem-solving machine, every computer is in fact a collection of a large number of inter-connected electro mechanical devices, all directed by a central control unit. Fortunately, an understanding of computer operation (and the ability to use a computer) does not require detailed knowledge either of electronics or of hardware construction. An overall view of the computer s organisation with emphasis on function rather than electrical or mechanical details is adequate Digital Computer Organisation A digital computer can be grouped into four general categories: Memory Input-Output Arithmetic Control Memory The memory or store is the heart of a digital computer. The memory of most existing computers is a collection of electronic devices made of ferromagnetic materials which can be permanently magnetised by appropriate electrical impulses. Nearly all such storage elements are stable in only one of two states the two-state polarity of the magnets produced in an individual storage element can be used to represent any binary choice, for example (+, -), (yes, no), etc. Due to the preponderance of arithmetic manipulations by computers, the polar orientation of the magnets is usually assumed to represent the two digits 0 and l, hence, the term digital computer. The memory is simply a part of the machine where a large number of digits can be saved. Since almost any kind of information (e.g., letters, symbols, etc.) can be coded as a sequence of digits, the memory can be viewed functionally as a place to store any kind of information. Most of the newer computers use a large number of small ferromagnetic toroids called magnetic cores as the store. Each small donut-shaped core is capable of being magnetised in one of two possible north-south polar orientations, and each can then be said to store or save one of the two digits 0 or l. By suitable electrical impulses the polarity of the core can be reversed, and hence the stored digit changed from 0 to l or vice-versa. Most computers designed for scientific (as opposed to business) applications employ the binary number system, i.e., the number system with a base 2, for internal arithmetic operations. Such computers are called binary computers. For illustrative purposes we will describe a hypothetical computer with a memory consisting of ten-state rather than two-state devices. Let each of the ten states represent one of the ten decimal digits, 0, l, ; then one storage element can be used to store any of the ten decimal digits. Let the total memory of this hypothetical computer consist of 10,000 such ten-state devices, so that a total of 10,000 digits may be stored in the memory at any one time. To simplify the problem or locating any sequence of digits in the memory, the over-all collection of storage elements in most scientific computers is divided into smaller collections containing just a few, say 10, digits called cells, words, memory or machine words, storage, memory or machine locations among others. A machine in which the number of digits in each word is not variable is said to have fixed word length. Each word in the memory is assigned a numeric address, usually in sequential order starting with address 0. In the 10,000 decimal digit memory, let the word length be fixed and equal to 10, so that the memory contains a total of 1000 words (this memory would normally be termed a lk store in computer parlance). Let there be a sign (+ or-) associated with each word as well. If we assign to the first collection of 10 digits, i.e., to the first word, the address 000, to the second word the address 001, to the third the address 002, etc., and to the last or l000 th word the address 999, just three digits are needed to describe the address of any of the 1000 machine words. It is very important to differentiate between the address of a memory word and the content of the memory word. The three-digit address specifies which word in the memory is to be examined. The content of that address is the ten-digit number (plus sign) stored in the memory elements of that particular word in the store. 114

127 The stores of most digital computers are built so that the content of a memory word may be retrieved or read without destroying it ( non-destructive read-out ); on the other hand, when a new number is stored or written into a memory word, the previous content of that word is lost ( destructive read-in ). This is completely analogous to the operation of a magnetic tape recorder. Recorded information may be played back without destroying it; when a new signal is recorded over previous information, the earlier recording is destroyed or erased in the process. Note that in our machine only a finite set of numbers (2x10 10 l altogether) can be represented, namely all numbers (ignoring any placing of a decimal point) to Thus it is not possible to represent irrational numbers (or for that matter any number with more than 10 significant digits) in the computer s memory. For this reason, information which is essentially continuous (e.g., an analog signal) must be put into discrete digital form before processing on a digital machine. Input-Output The function of the input-output equipment is to allow communication between the user of the machine and the store. There is a large number of such devices in use. Some of the more common input devices are (l) Punched card readers, (2) Punched paper tape readers, (3) Typewriters, (4) Magnetic tape units. Each of these devices has a substantial amount of mechanical hardware associated with it. For example, the punched card reader senses the location of the punched holes in a card by physically contacting a set of conducting brushes above the card and a platen below the card containing an electrode for each possible punched hole location. Complete contact between brush and platen is made only if a hole is present in a particular location on the card. A paper tape reader normally senses the punched holes photo-electrically. Patterns of holes and no holes in the tape can be detected as impulses of light and dark when the punched tape passes between a lamp and sensing photocells. On an input typewriter the depression of keys causes some electrical impulses to be sent to the computer. Between these predominantly mechanical input devices and the computer s store, which operates completely electronically, there are conversion devices which we will simply label the input buffers. The function of this buffering equipment is to accept impulses sent by the card reader, tape reader, typewriter, or any other input device, convert the impulses into appropriate internal form and store the accepted information in the memory. For example, a card might have holes punched in the first 10 columns to represent a 10-digit number. The card reader senses the locations of the holes on the card and sends some signals to the buffering equipment; subsequently the ten digits would be stored in some memory word. Which of the 1000 words is to be used is determined by the program. The output devices are generally quite similar to the input devices, e.g., a card punch, a magnetic tape, a paper tape punch, a typewriter, a printer, etc. Often similar input-output devices are housed in a single unit; for example, a card or paper tape read punch unit, a magnetic tape unit which can both write and read (i.e., record and play back), etc. Between the memory and the output devices there is again some buffering equipment. At this point our hypothetical machine consists of input devices, a memory, and output devices (with suitable buffering equipment at the interfaces). The machine can accept information from the outside, store the information in digital form in the memory, and display information present in the memory. Arithmetic Obviously it is not enough to have the ability to save and retrieve information. In order to solve a problem we would like to read data into some words of the memory, operate on these data in some meaningful way to produce results (which could be stored in other words of the memory) and finally to display the results stored in the memory. To carry out operations on information in the memory (for the moment these operations may be assumed to be arithmetic in nature), calculating equipment analogous to the cogs and mechanical links of a desk calculator is needed. In a digital computer, such operations are performed by strictly electronic devices. The arithmetic unit of a computer contains all the necessary circuitry to carry out the standard arithmetic operations on the contents of memory words (on the numbers stored in the memory) and, in addition, can perform many other manipulations such as the shifting or digit wise examination of numbers, the comparison of numbers for sign, relative magnitude and so forth. Each digital computer has a fixed number of distinctly different operations called machine instructions 115

128 Introduction to Digital Electronics which the arithmetic unit is capable of executing. Some instructions are used to control the reading and writing operations of the input-output devices. Most large machines have such operations in their instruction list. The instruction list for each type of machine is usually different from that of all other machines. One may consider the arithmetic unit to contain registers (similar to the sets of dials on a desk calculator) which have immediate two-way access to any word in the memory. Most computers have at least two such registers. For example, in the IBM 7090 the most important of these are called the accumulator (AC), and the Multiplier Quotient unit (MQ). Operations involving addition and subtraction are done in the accumulator, which corresponds in every way to the accumulating register (one of the sets of dials) in a desk calculator. For example, the 10 digits from location 000 could be put into the accumulator, the 10 digits from location 001 could be added to the contents of the accumulator, and finally the resulting contents of the accumulator, namely the sum of the two ten-digit numbers, could be stored back into the memory in location 002. For multiplication and division operations, the accumulator and the multiplier quotient unit are both used. Some of the instructions involve other registers in the arithmetic unit. Most machines, for example, have a set of very useful counting and address modification registers called index registers. With the addition of the arithmetic unit J the digital computer now begins to take a meaningful form. The machine is capable of reading data from the outside and entering it into the memory. The contents of various memory words can be manipulated in the arithmetic unit by means of the operations which the computer is designed to carry out. The results of these operations can be stored in the memory along with the original data and subsequently retrieved for display on the output equipment. The sequence of events is thus as follows: Read data into memory via the input equipment. Operate (in arithmetic unit) on data stored in memory. Store results of operations in the arithmetic unit in the memory. Retrieve results from the memory via the output equipment. Control Obviously, in order to produce useful results (to process data in a meaningful way) the computer must have associated with it a controlling device which supervises the sequence of activities taking place in all parts of the machine. This control equipment must decide (1) when (and with which input device) to bring information into the memory, (2) where to place the information in the memory, (3) what sequence of operations or manipulations on information in the memory is to be done in the arithmetic unit, (4) where intermediate or final results of operations in the arithmetic unit are to be saved in the memory, and (5) when (and on which output device) results are to be displayed. With the addition of the control unit (see Figure 1) we now have a machine which can accept data, operate on the data to produce results, and display the results for the machine user, i.e., a machine which is capable of solving suitably stated and defined problems, given the set of commands to be carried out. How does the machine user indicate what the machine is to do to solve his problem? First he must examine his problem and then outline a step-by-step procedure, sometimes called an algorithm, for its solution. Then he makes a list of commands from the machine s instruction list (called a program) which he wants the machine to execute to implement the algorithm. The instructions must be ordered in the proper sequence and only those instructions which the machine is designed to execute, namely those in the instruction list, may appear in the program. When one uses a desk calculator, the available instructions consist of addition, subtraction, multiplication, division, shifting, clearing registers, entering the contents of the keyboard into the registers, and so forth. Unless the calculator is designed to take square roots automatically, one cannot command the calculator to compute a square root. Instead, some numerical procedure which uses only the available operations is required. In a completely analogous way, a digital computer can be instructed to carry out only those instructions which have been incorporated into its design. When using a desk calculator the sequence of instructions to be executed is determined by the machine user. The user functions as the control unit in deciding which number or operation is to be 116

129 used next, etc. With the very high internal operating speeds of the digital computer (on the larger machines hundreds of thousands 01 individual instructions may be executed per second), it is impractical to have the machine user stand before the console pushing buttons in sequence as he does at the keyboard of a desk calculator. Consequently, some other approach is necessary to allow very rapid processing of machine instructions. It is because direct communication between the machine and its environment involves the use of slow mechanical equipment, any approach which requires such contact continuously is impossibly slow. The solution to this problem is as follows. The sequence of instructions, i.e., the program, is stored in the memory along with the data and results. Hence, general purpose computers currently available are known as stored program computers. Since only numbers, i.e., decimal digits may be stored in the machines memory; the instructions coded digits before being put in the memory. 8.4 Classification of Memory Semiconductor memory is fabricated on silicon chips in the same fashion as microprocessors and other digital devices. The low cost of semiconductor memory (as compared to other memory devices) is the main reason for the ready availability and low cost of microcomputers nowadays. The main characteristics of semiconductor memory are low cost, high density (bits per chip), and ease of use. A semiconductor memory is composed of a large number of semiconductor storage-cells which are fabricated, either or bipolar, or on MOS technology. Since each storage cell can store only a single bit, the memory must have as many cells as the number of bits to be stored in it. Commercially available chips of these memories have word-capacities of 256, 512, 1024 or more with the word-sizes of 1, 4 or 8 bits. Thus, a 256 x 8 bit memory can store 256 words of 8 bits each, providing a capacity of storing 256 x 8 bits. The number of words stored in a memory is generally a multiple of 1024 = Using the letter K for each 1024 words, the larger memories are designated as 1K for 1024 words, 2K for 2048 words, 4K for 4096 words, and so on. Still higher capacities are designated with the letters M (mega), G (giga) and B (byte). That is, 1MB (1 mega byte) = 1Mx 8= 1024K x 8 = 220 bytes 1GB (1 giga byte) = 1G x 8= 1024 M x 8 = 0 bytes In terms of bits, the capacities can also be expressed as 1Kb, 3Mb, 4Gb, etc. with b standing for bits. Apart from these characteristics, memory can be graded in terms of capacity and speed of access. A range of memory products exist, with differing characteristics. However, there are only two basic types: Those whose contents can be read and also written to (volatile). Examples of this type are DRAM and SRAM. Those whose contents can only be read (non-volatile). Some memory s contents may be permanent, while other memory chips may be removed from the computer and reprogrammed. Examples of this type are ROM, PROM, EPROM and EEPROM. 117

130 Introduction to Digital Electronics Semiconductor memory RAM (Volatile) ROM (Non Volatile) SRAM DRAM Masked ROM EPROM PROM UV EPROM EEPROM RAM (Random Access Memory) Fig. 8.3 Classification of Semiconductor memory types The RAM can be both read and, written, and is used to hold the programs, operating system, and data required by a computer system. In embedded systems, it holds the stack and temporary variables of the programs, operating system, and data. RAM is generally volatile as it does not retain the data stored in it when the system s power is turned off. Any data that needs to be stored while the system is off must be written to a permanent storage device, such as a flash memory or a hard disk. Read-write random-access memories (RAM) may store information in flip-flop style circuits or simply as charge on capacitors. Approximately equal delays are encountered in reading or writing data. Because read-write memories store data in active circuits, they are volatile; that is, stored information is lost if the power supply is interrupted. The natural abbreviation for read-write memory would be RWM. However, pronunciation of this acronym is difficult. Instead, the term RAM is commonly used to refer to read-write random-access memories. If the terms were consistent, both read-only (see below) and read-write memories would be called RAMs. The two most common types of RAMs are the static RAM (SRAM) and the dynamic RAM (DRAM). The static and dynamic definitions are based on the same concepts as those introduced in earlier chapters. Static RAMs hold the stored value in flip-flop circuits as long as the power is on. SRAMs tend to be high-speed memories with clock cycles in the range of 5 to 50 ns. Dynamic RAMs store values on capacitors. They are prone to noise and leakage problems, and are slower than SRAMs, clocking at 50 ns to 200 ns. However, DRAMs are much more dense than SRAMs up to four times more dense in a given generation of technology. The two types of RAMs have been explained below: Static Random Access Memory (SRAM) SRAM is type of semiconductor memory that does not need to be periodically refreshed since it uses bistable latching circuitry to store each bit. SRAM exhibits data remanence, but is still volatile in the conventional sense that data is eventually lost when the memory is not powered. A static RAM chip consists of a number of bistable elements called flip-flops. A flip-flop is a circuit consisting of 4 transistors, which can store 1 bit of data. The requirement of 4 transistors per bit of storage is the reason why the packing density of static RAM is so low. This is the major drawback of SRAM: a high component count per bit of storage, making it very expensive with high 118

131 power consumption (as compared to dynamic RAM). Nevertheless, SRAM offers very fast access times typically about 10ns (nano-thousand millionths). It is unlikely to be used as a main computer memory, being used instead as a fast cache memory. Dynamic Random Access Memory (DRAM) The necessity for higher memory capacities has led to the development of dynamic memory. Compared to static ram, it has the advantages of high storage density, low cost and low power consumption. Standard dynamic RAM chips are available with capacities of about 256k x 1 bit, and typical access times of 70ns. One bit of information is stored as an electrical charge on one of the legs of a FET (field effect transistor). Compare this with the 4 transistors per bit, for static RAM. A dynamic RAM chip contains all of the necessary electronics to access a given location, to write a 0 or 1 in a write cycle and to read its contents in a read cycle. The problem is that: the charge on the FET leg leaks away. Most dynamic chips are guaranteed to retain their data for 2 thousandths of a second (2ms). The answer is to rewrite the data to every location periodically, this is known as refreshing. In practice, it is only necessary to access a location to refresh its data. But nothing is that simple, and that is true here. Dynamic memories require a lot of external complex electronics to make them work. Dynamic memory tends to be much less reliable than static memory. Bits are easily corrupted, requiring further electronics for error detecting circuitry. The necessity of regularly refreshing every memory cell makes DRAM a slow memory with access times of 50ns considered as being fast. In short it can be said that dynamic memory: Is complex to use from the designers point of view Has a low cost Consumes less power (than static RAM) Has a high storage density (bits per unit area) Is used in large memory systems Is not as reliable as SRAM SRAM v/s DRAM Feature SRAM DRAM Storage cell Flip-flop Capacitor Storage capacity Small/Large Large Word size 1,4,8 bits 1,4 bits Speed High, low Lower Cost per bits Higher Lower Power consumption Large Small Read/Write operation Simple Complex Table. 8.1 Differences between SRAM and DRAM 119

132 Introduction to Digital Electronics ROM (Read Only Memory) The main benefit of such chips is that their contents will not be lost if the power is removed. These chips are used in a wide variety of electronic control circuits, from industrial machine tools to domestic washing machines. They are also the ideal choice for computer control. A computer s control programs require being non-volatile. By placing part of the operating system software into a ROM chip, the system BIOS, the basic machine control programs are available to be run as soon as the computer is switched on. The programs in the ROM provide the machine s basic input and output functions, to allow application programs to be loaded and run. Unfortunately, if the system is to be updated, the BIOS chip has to be replaced with a new chip which contains the new program routines. This requires opening the computer case and is a job for experienced support staff or technicians. ROM chips are only capable of performing required pre-determined programs. Due to the cost of manufacturing ROMs, they are only used in large quantity runs. This, in turn, means that they are only used when the manufacturer is certain that the programs they contain are debugged. Masked ROM The very first ROMs were hardwired devices that contained a preprogrammed set of data or instructions. The contents of the ROM had to be specified before chip production, so the actual data could be used to arrange the transistors inside the chip. Hardwired memories are still used, though they are now called masked ROMs to distinguish them from other types of ROM. The primary advantage of a masked ROM is its low production cost. Unfortunately, the cost is low only when large quantities of the same ROM are required. PROM The initials stand for Programmable Read Only Memory. With ROM, the program was dedicated at the production stage; the program itself determined the physical construction of the ROM chip. A cheaper method for small and medium scale use is a ROM-type chip that can be programmed, after the construction stage. Such chips are mass produced by a chip manufacturer, who has no idea of the use to which they will be put. Once the chip is purchased by a computer manufacturer the company s programs can be embedded in it. This is achieved by blowing fusible links inside the chip, to form the binary codes representing the program s machine code instructions. This is achieved using a special piece of equipment called a device programmer. Every intact link represents a binary 1, with a blown link representing a binary 0. Like the ROM, the PROM chip is also non-volatile. If the code or data stored in the PROM must be changed, the current device must be discarded. As a result, PROMs are also known as one time programmable (OTP) devices. EPROM The initials stand for Erasable Programmable Read Only Memory and it was introduced as a development tool. The problem with ROM and a programmed PROM was that, once produced, they were unalterable. This is perfectly fine for computer manufacture - once the program contents are fully debugged. The EPROM is used to test an embedded program. Like PROM, its links are blown to the needs of the test program. The EPROM can then be used on the test computer. If the program is satisfactory, it can be used to create mass ROM or PROM versions. If the program needs alteration, the EPROM is subjected to ultra-violet light for a few minutes. This heals the ruptured links, allowing the chip to be blown to the next test program. The blowing and wiping clean process can be repeated many times over, before the chip starts to degenerate. An EPROM chip is easily identified, as it has a glass window on top of the chip to allow entry of the ultra-violet light. Due to its expensive construction, it is only a viable alternative to ROM and EPROM for small scale use. Example EPROM chips would be the (64k - i.e. 8k x 8 bits) and the (512k - i.e. 64k x 8 bits). For continual development use, the EPROM is often replaced with a ROM emulator. This is a piece of equipment which plugs into the ROM socket and acts like an EPROM. It contains RAM to avoid the program-erase cycles. Since it is self-powered, it appears to the main computer as a piece of ROM. The two types of EPROMs are as follows: 120

133 EEPROM A variation on the EPROM is the EEPROM - the Electrically Erasable and Programmable Read Only Memory. Like the EPROM, it has the benefit of holding its contents when the power is removed. However its contents can be overwritten without resorting to prior cleaning with ultraviolet light. It is currently significantly more expensive than other memory devices but is a likely candidate for future use in computers. Many palmtop computers use ROM to store application programs, to overcome the storage problems associated with small machines. Due to their size, there is no space for a hard disc to store application software, so the machine stores a word processor, spreadsheet, personal organiser, etc. in ROM. In most computers, however, the application software is loaded into, and run from, main memory. UV EPROM UV EPROM is read-only memory that can be erased by the use of ultraviolet light and then reprogrammed. It is an integrated-circuit memory chip in which the stored information can be erased only by ultraviolet light and the circuit can be reprogrammed with new information that can be stored indefinitely. 8.5 Flash Memory Flash memory is a form of non-volatile memory (EEPROM) that can be electrically erased and reprogrammed. It is erased and programmed in blocks consisting of multiple locations (usually 512 bytes in size). Flash memory costs far less than EEPROM and therefore has become the dominant technology wherever a significant amount of non-volatile, solid-state storage is needed. A few examples of Flash Memory are as follows: A computer s BIOS chip USB flash drives CompactFlash (often found in digital cameras) SmartMedia (also mostly found in digital cameras) Memory Stick (found in digital cameras) A blank flash memory has all cells as 1 s. It can be read or programmed a byte or word at a time in a random fashion, but it can only be erased a block at a time. Once a byte has been programmed it cannot be changed again until the entire block is erased. Erasing is applied to one or more blocks by the application of a high voltage that returns all cells to a 1 state. It must be noted that flash memory is not the same as flash RAM (which requires some power to retain is contents). 8.6 Cache Memory Analysis of typical programs shows that most of their execution time is spent in a few main routines. Groups of instructions in a few localised areas are repeatedly executed while the remainder of the program is accessed relatively infrequently. This phenomenon is referred to as the locality of reference. If the active segments of a program and the variables used can be kept in a small fast memory then the total execution time can be greatly reduced. Such a memory is known as a cache memory. The cache is placed between the CPU and the main memory. It is built of a technology with higher access rate than main memory (SRAM). Their relative access times usually differ by a factor of 5 to 10. It is quicker to fetch an instruction or piece of data from cache into CPU than from main memory into CPU. The result of using cache memory is to dispense with wasted CPU time and to increase computer efficiency. Of course, the block of fast SRAM is likely to be substantially smaller than the computer s main memory. The cache memory can only hold a portion of the data which is resident in main memory. The aim is to ensure that only the data most likely to be required is stored in cache memory. When the content of a memory location is required to be read into the CPU, the cache is accessed and if the material is present there then it is transferred from the cache into the CPU without reference to the main memory. If the 121

134 Introduction to Digital Electronics material is not present in the cache then the contents of the block of memory words containing the location specified are transferred into the cache from the main memory one word at a time, and then the required word is transferred into the CPU. Due to the locality of reference principle it is then likely that during later read requests the required material may already be in cache. Usually a cache memory can store a number of blocks at any given time. The correspondence between main memory blocks and those in cache is specified by means of a mapping function. When the cache is full and a new block is to be placed there then a decision must be made as to which block to remove. The rules for making this decision constitute the replacement algorithm. There are a variety of mapping functions and replacement algorithms possible. The most common is the Least Recently Used (LRU) algorithm which will overwrite the block which has gone the longest time without being referenced. 8.7 Virtual Memory In a virtual memory system the processor sees a very large array of physical memory, which appears to be entirely composed of high speed main memory. In reality the physical memory is a small high speed RAM and a much slower disk system. The advantages offered by virtual memory are: it allows the execution of programs much larger than the physical memory would normally permit the programmer is freed from all concerns to do with a small main memory Virtual memory systems divide the main memory into pages of 1K to 16K bytes. This allows several pages of a virtual program to be resident in main memory at any time. 122

135 Summary Internal memory stores digital data and the program of instructions that are used for internal operation of the computer where digital information is continuously being moved from one location to another. The use of ferrite cores was prevalent for many years to provide the main memory for most computers. Memories are circuits or systems that store digital information in large quantity. Computability has a rigorous mathematical meaning, an intuitive understanding of the term is sufficient. The memory or store is the heart of a digital computer. Most of the newer computers use a large number of small ferromagnetic toroids called magnetic cores as the store. The arithmetic unit of a computer contains all the necessary circuitry to carry out the standard arithmetic operations on the contents of memory words. Each digital computer has a fixed number of distinctly different operations called machine instructions which the arithmetic unit is capable of executing. The contents of various memory words can be manipulated in the arithmetic unit by means of the operations which the computer is designed to carry out. Semiconductor memory is fabricated on silicon chips in the same fashion as microprocessors and other digital devices. In embedded systems, RAM holds the stack and temporary variables of the programs, operating system, and data. Read-write random-access memories (RAM) may store information in flip-flop style circuits or simply as charge on capacitors. A computer s control programs require being non-volatile. Due to the cost of manufacturing ROMs, they are only used in large quantity runs. The EPROM is used to test an embedded program. Many palmtop computers use ROM to store application programs, to overcome the storage problems associated with small machines. An EPROM chip is easily identified, as it has a glass window on top of the chip to allow entry of the ultra-violet light. In reality the physical memory is a small high speed RAM and a much slower disk system. Usually a cache memory can store a number of blocks at any given time. Flash memory costs far less than EEPROM and therefore has become the dominant technology wherever a significant amount of non-volatile, solid-state storage is needed. References Brown, W. D. & Brewer, J., Nonvolatile Semiconductor Memory Technology: A Comprehensive Guide to Understanding and Using NVSM Devices, Wiley-IEEE Press. Van De Goor, A. J., Testing Semiconductor Memories: Theory and Practice, John Wiley & Sons Inc. Lahiri, S. K., Skl-31 Semiconductor Memories, [Video online] Available at: < watch?v=omxqsvenf9o&list=pl8b1326f7b39af66f> [Accessed 28 May 2013] sec Memory Concepts, [Video online] Available at: < osgq&list=pl e4e9> [Accessed 28 May 2013]. Kamal, R., Advanced Processor Architectures and Memory Organisation [Pdf] Available at: < ac.in/downloads/embsysreved_ppts/chap_2lesson17emsysnew.pdf> [Accessed 27 May 2013]. Semiconductor Memory [Pdf] Available at: < Semiconductor%20Memory.pdf> [Accessed 24 May 2013]. 123

136 Introduction to Digital Electronics Recommended Reading Sharma, A. K., Advanced Semiconductor Memories: Architectures, Designs, and Applications, Wiley- IEEE Press. Itoh, K., VLSI Memory Chip Design (Springer Series in Advanced Microelectronics), 1st ed, Springer. Tang, D. D. & Lee Y. J., Magnetic Memory: Fundamentals and Technology, Cambridge University Press. 124

137 Self Assessment 1. The auxiliary memory operates at much speed than the internal memory. a. faster b. slower c. better d. higher What are circuits or systems that store digital information in large quantity? a. ROM b. c. d. RAM Memories Semiconductors Which of the following statements is true? a. Most memory cell circuits are highly complex compared to register and flip-flop circuits. b. c. d. Most memory cell circuits are less simplified compared to register and flip-flop circuits. Most flip-flop circuits are highly simplified compared to register and memory cell circuits. Most memory cell circuits are highly simplified compared to register and flip-flop circuits. memory is fabricated on silicon chips in the same fashion as microprocessors and other digital devices. a. Semiconductor b. c. d. Flash Cache Virtual may be viewed both as logic manipulators and as information or data processing devices. a. ROM b. c. d. RAM Semiconductor memory Digital computers Which of the following statements is true? a. The main characteristics of semiconductor memory are low cost, high density (bits per chip), and ease of use. b. c. d. The main characteristics of semiconductor memory are high cost, low density (bits per chip), and complexity of use. The main characteristics of cache memory are low cost, high density (bits per chip), and ease of use. The main characteristics of read only memory are low cost, high density (bits per chip), and ease of use. What store values on capacitors? a. SRAMs b. c. d. DRAMs ROMs EEPROM 125

138 Introduction to Digital Electronics memories require a lot of external complex electronics to make them work. a. Random b. c. d. Read only Dynamic Static chips are only capable of performing required pre-determined programs. a. SRAM b. c. d. ROM DRAM RAM Match the following 1. Virtual Memory A. This can only hold a portion of the data which is resident in main memory. 2. Flash Memory B. This is used to test an embedded program. 3. EPROM 4. Cache Memory a. 1-D, 2-C, 3-B, 4-A b. 1-D, 2-B, 3-C, 4-A c. 1-A, 2-D, 3-B, 4-C d. 1-D, 2-C, 3-A, 4-B C. D. This is a form of non-volatile memory (EEPROM) that can be electrically erased and reprogrammed. The processor sees a very large array of physical memory, which appears to be entirely composed of high speed main memory. 126

139 Application I When dealing with piezo audio transducers such as the CEP-1114, an oscillating frequency signal is required to produce a sound pattern from the buzzer. In order to accomplish this, a square-wave frequency signal from sort of wave generator such as an oscilloscope or a programmed PIC must be logically processed with a second frequency signal, to create a combination of high/low outputs which will turn the buzzer on and off creating a sound pattern. So, if one has used a square-wave signal from a PIC as one input into an AND gate and a second varying frequency as the other input, it is proven due to AND gate logic that when both signals are high the buzzer will produce a sound, and any other combination will turn the buzzer off. As shown in Fig. 1, the output is only high when both Input A and Input B are high. If Input B was changed or altered, this would alter the output signal sent to the buzzer. Imagine that Input B was stretched so that only one period was observed in the time give rather than two periods. This would extent the time that Input B is high and would increase the time that the output is high. Additionally, if variation of the waveform inputs is difficult or impossible, variation of the output can still be accomplished by simply changing the logic gate implemented. Output Input B Input A Fig. 1 And gate signal output (Source: Fig.2 CEP-1114 piezo buzzer (Source: 127