IDTF1653NLGI8. IDTF1653NLGI Datasheet FEATURES GENERAL DESCRIPTION COMPETITIVE ADVANTAGE PART# MATRIX DEVICE BLOCK DIAGRAM ORDERING INFORMATION

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1 IDTF653NLGI GENERAL DESCRIPTION This document describes specifications for the F653NLGI I/Q Modulator implementing Zero- Distortion TM technology for low power consumption with improved ACLR. This device interfaces directly to a high performance dual DAC. COMPETITIVE ADVANTAGE In typical multi-mode, multi-carrier basestation transmitters the modulator has limited linearity and high power consumption which penalizes the system ACLR and system Power consumptions budgets in a Digital- Pre-Distortion environment. The IDTF653 is designed to eliminate these penalties by embedding Zero-Distortion TM technology into the device such that very high IP3 and IP are achieved with minimal current draw. Power consumption 45% IM3 Distortion 4 db FEATURES Power Gain = 3dB Direct 00Ω differential drive from Tx DAC < 590mW Power Consumption -59 dbm/hz Output Noise -6 dbc/hz Internal LO Path Noise IP O = +64 GHz IP3 O = +36 GHz Excellent native LO and image suppression 600 MHz input db Bandwidth 600 MHz to 900 MHz RF BW Fast Settling for TDD (< 00 nsec) 3.3V Single Power Supply LO port can be driven single ended or differential 4mm x 4mm, 4-pin TQFN package PART# MATRIX Part# RF freq Range IP O Power Cons. IP3 O Noise DEVICE BLOCK DIAGRAM F dbm 587 mw +36 dbm -58 dbm/hz F dbm 587 mw +36 dbm -59 dbm/hz 0 90 Zero-Distortion TM ORDERING INFORMATION Omit IDT prefix 0.8 mm height package IDTF653NLGI8 RF product Line Green Tape & Reel Industrial Temp range Zero-Distortion TM Modulator RevO, April 05

2 IDTF653NLGI ABSOLUTE MAXIMUM RATINGS VDD to GND -0.3V to +3.6V STBY -0.3V to (VDD + 0.3V) BB_I+, BB_I-, BB_Q+, BB_Q- -0.3V to.8v LO_IN -0.3V to 0.3V RF_OUT (VDD-0.35V) to (VDD-0.05V) Continuous Power Dissipation.5W θ JA (Junction Ambient) +45 C/W θ JC (Junction Case) The Case is defined as the exposed paddle +.5 C/W Operating Temperature Range (Case Temperature) T CASE = C to +05 C Maximum Junction Temperature 50 C Storage Temperature Range -65 C to +50 C Lead Temperature (soldering, 0s) +60 C Stresses above those listed above may cause permanent damage to the device. Functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability Zero-Distortion TM Modulator RevO, April 05

3 IDTF653NLGI IDTF653 RECOMMENDED OPERATION CONDITIONS Parameter Symbol Comment min typ max units Supply Voltage(s) V DD All V DD pins V Operating Temperature T CASE Case Temperature deg C LO Freq Range F LO LO power -3dBm to +5dBm MHz BB Common Mode Voltage BB input voltage compliance range BB Freq Range V CM F BB T CASE = C to +05C V DD = 3.3 V LO level = 0dBm V For each BB pin 0 Vpeak F LO = 950 MHz, BB_IQ = 00 mvp-p P RF degrades < db DC 600 MHz Zero-Distortion TM Modulator 3 RevO, April 05

4 IDTF653NLGI IDTF653 SPECIFICATION See application circuit. Typical values are measured at V DD = +3.3V, F LO = 950 MHz, P LO = 0 dbm, T CASE = +5 C, STBY = GND, BB_IQ frequency = 49, 50 MHz, BB_I&Q levels = 00 mvp-p each (-3dBm and 4 db backoff from V DAC compliance), I & Q = 0.50V common-mode bias unless otherwise noted. Parameter Symbol Comment min typ max units Logic Input High V IH For STBY Pin.07 V Logic Input Low V IL For STBY Pin 0.68 V Logic Current I IH, I IL For STBY Pin μa Supply Current (ON) I SUPP Total V DD ma Supply Current (STBY) I STBY Total V DD, STBY = V IH.8 5 ma LO Power P LO dbm BB Input Resistance (Differential) LO port Impedance R BB Freq = 00 MHz 3 Ω Z LO Single Ended (RL < -0dB) Can be driven differentially 50 Ω RF port Impedance Z RF Single Ended (RL < -0dB) 50 Ω Power Gain G db Output 850 MHz IP3 O LO = 800 MHz 37 Output GHz IP3 O LO = 950 MHz Output GHz IP3 O3 LO = 800 MHz 3 Output 850 MHz Output GHz Output GHz Turn on time Turn off time LO (Carrier) Suppression Sideband (Image) Suppression IP O IP O IP3 O P ON P OFF LO supp SS LO = 800 MHz Differential baseband input LO = 950 MHz Differential baseband input LO = 800 MHz Differential baseband input STBY = low to 90% final output power STBY = high to initial output power db Native, Uncorrected F LO = 950 MHz Native, Uncorrected F LO = 950 MHz Differential baseband input dbm dbm nsec -39 dbm -34 dbc Output PdB PdB O Output Compression 5 dbm Output Noise NSD 0 MHz offset from LO BB I&Q levels = 0 V P-P dbm/hz LO Path Noise (internal) Φ N_LO +0 MHz offset -6 dbc/hz SPECIFICATION NOTES: Items in min/max columns in bold italics are Guaranteed by Test All other Items in min/max columns are Guaranteed by Design Characterization Zero-Distortion TM Modulator 4 RevO, April 05

5 Output Loss (db) IDTF653NLGI TYPICAL OPERATING CONDITIONS GRAPHS Unless otherwise noted, the following conditions apply: Baseband I&Q levels = 00 mv PP each (-3 dbm / Channel / Tone) Baseband I&Q tones = 49, 50 MHz Low Side Injection T AMB = 5C, V CC = 3.30 V, LO Power = 0 dbm V CM = 0.50 Volts Flo =.95GHz unless otherwise specified EVKit RF output Trace and Connector Losses De-Embedded EVkit RF output loss (Trace + Connector) degC / 5degC / 85degC / 00degC / RF Frequency (GHz) Zero-Distortion TM Modulator 5 RevO, April 05

6 Output IP (dbm) Output IP (dbm) Output IP3 (dbm) Output IP (dbm) Output IP3 (dbm) Output IP3 (dbm) IDTF653NLGI TYPICAL OPERATING CONDITIONS (--) OIP3 vs. T AMB OIP3 vs. V CC degC / / 0dBm 85degC / / 0dBm 00degC / / 0dBm 0 5 5degC / / 0dBm 5degC / / 0dBm 0 OIP3 vs. LO level OIP vs. T AMB degC / / 5dBm 5degC / / -3dBm degC / / 0dBm 85degC / / 0dBm 00degC / / 0dBm 0 OIP vs. V CC OIP vs. LO level degC / / 0dBm 30 5degC / / 5dBm 0 5degC / / 0dBm 0 5degC / / -3dBm 0 0 Zero-Distortion TM Modulator 6 RevO, April 05

7 Power Consumption (mw) Power Consumption (mw) Total Current (ma) Power Consumption (mw) Total Current (ma) Total Current (ma) IDTF653NLGI TYPICAL OPERATING CONDITIONS (--) I CC vs. T AMB I CC vs. V CC degC / / 0dBm 85degC / / 0dBm 00degC / / 0dBm degC / / 0dBm 5degC / / 0dBm I CC vs. LO level 00 Power Consumption vs. T AMB degC / / 5dBm 5degC / / -3dBm,00, degC / / 0dBm 85degC / / 0dBm 00degC / / 0dBm Power Consumption vs. V CC 300 Power Consumption vs. LO level,00 5degC / / 0dBm,00 5degC / / 5dBm,000, degC / / 0dBm 900 5degC / / -3dBm Zero-Distortion TM Modulator 7 RevO, April 05

8 Output RF Level (dbm) Output RF Level (dbm) Gain (db) Output RF Level (dbm) Gain (db) Gain (db) IDTF653NLGI TYPICAL OPERATING CONDITIONS (-3-) Gain vs. T AMB Gain vs. V CC degC / / 0dBm 85degC / / 0dBm 00degC / / 0dBm degC / / 0dBm 5degC / / 0dBm Gain vs. LO level RF Output Power vs. T AMB degC / / 5dBm 5degC / / -3dBm degC / / 0dBm 85degC / / 0dBm 00degC / / 0dBm Total Baseband Input Power = -0 dbm = 00 mv PP across 00Ω on I&Q RF Output Power vs. V CC -5 RF Output Power vs. LO level - 5degC / / 0dBm - 5degC / / 5dBm degC / / 0dBm -5 5degC / / -3dBm Total Baseband Input Power = -0 dbm = 00 mv PP across 00Ω on I&Q - Total Baseband Input Power = -0 dbm = 00 mv PP across 00Ω on I&Q Zero-Distortion TM Modulator 8 RevO, April 05

9 Native Image Suppresion (dbc) Native Image Suppresion (dbc) Native Carrier Suppresion (dbm) Native Image Suppresion (dbc) Native Carrier Suppresion (dbm) Native Carrier Suppresion (dbm) IDTF653NLGI TYPICAL OPERATING CONDITIONS (-4-) Unadjusted LO Suppression vs. T AMB Unadjusted LO Suppression vs. V CC degC / / 0dBm 00degC / / 0dBm degC / / 0dBm 5degC / / 0dBm Unadjusted LO Suppression vs. LO level Unadjusted Sideband Suppression vs. T AMB degC / / 5dBm 5degC / / -3dBm degC / / 0dBm 85degC / / 0dBm 00degC / / 0dBm Unadjusted Sideband Suppression vs. V CC Unadjusted Sideband Suppression vs. LO level degC / / 0dBm 5degC / / 0dBm degC / / 5dBm 5degC / / -3dBm Zero-Distortion TM Modulator 9 RevO, April 05

10 Baseband H3 Rejection (dbc) Baseband H3 Rejection (dbc) Baseband H Rejection (dbc) Baseband H3 Rejection (dbc) Baseband H Rejection (dbc) Baseband H Rejection (dbc) IDTF653NLGI TYPICAL OPERATING CONDITIONS (-5-) Baseband nd Harmonic vs. T AMB Baseband nd Harmonic vs. V CC degC / / 0dBm 85degC / / 0dBm 00degC / / 0dBm degC / / 0dBm 5degC / / 0dBm Baseband nd Harmonic vs. LO level -90 Baseband 3 rd Harmonic vs. T AMB degC / / 5dBm 5degC / / -3dBm degC / / 0dBm 85degC / / 0dBm 00degC / / 0dBm Baseband 3 rd Harmonic vs. V CC -90 Baseband 3 rd Harmonic vs. LO level -0 5degC / / 0dBm -0 5degC / / 5dBm degC / / 0dBm 5degC / / -3dBm Zero-Distortion TM Modulator 0 RevO, April 05

11 Input Balanced C P (pf) Output PdB (dbm) Input Balanced R P (ohms) Output PdB (dbm) Power Gain (db) Return Loss (db) Output Noise (dbm/hz) Output Noise (dbm/hz) IDTF653NLGI TYPICAL OPERATING CONDITIONS (-6-) Output Noise vs. Frequency Input Bandwidth (fixed LO =.09 GHz) degc / / 0 dbm 5degC / / 0 dbm 00degC / / 0 dbm 05degC / / 0 dbm Baseband Input Frequency (MHz) I&Q Input Parallel Resistance/Capacitance degc / I 5degC / I 00degC / I degc / Q 5degC / Q 00degC / Q 90 Baseband Input Frequency (MHz) degc / I 5degC / I 00degC / I degc / Q 5degC / Q 00degC / Q 0.5 Baseband Input Frequency (MHz) Output Noise vs. P OUT [V CC = 3.3V, T AMB = 5C] Output Power (dbm) LO & RF Port Return Loss Frequency (GHz) db Compression RF Port LO Port LO Frequency =.95 GHz LO Level (dbm) V SUPPLY degc 5degC 05degC Zero-Distortion TM Modulator RevO, April 05

12 LO Suppression (dbm) Sideband Suppression (dbc) IDTF653NLGI TYPICAL OPERATING CONDITIONS (-7-) Turn On Time Turn Off Time STBY RF signal RF signal STBY Turn on time <00ns Flo=GHz, 3.3V, 5deg Turn off time <30ns Flo=GHz, 3.3V, 5deg Polarity: LO =.0GHz, BB_I+/- leads BB_Q+/-.95G Polarity: LO =.0GHz, BB_I+/- lags BB_Q+/-.05G G.05G.95G G Carrier Suppression Nulling Performance Image Suppression Nulling Performance -0-0 degc 5degC 90degC degc 90degC 5degC 05degC 05degC Nulled Nulled -3 dbm 0 dbm 5 dbm -3 dbm 0 dbm 5 dbm -3 dbm 0 dbm 5 dbm -3 dbm 0 dbm 5 dbm 0.9 GHz.. GHz..4 GHz..8 GHz LO Frequency / LO Power / V SUPPLY -3 dbm 0 dbm 5 dbm -3 dbm 0 dbm 5 dbm -3 dbm 0 dbm 5 dbm -3 dbm 0 dbm 5 dbm 0.9 GHz.. GHz..4 GHz..8 GHz LO Frequency / LO Power / V SUPPLY Zero-Distortion TM Modulator RevO, April 05

13 IDTF653NLGI GENERIC DAC INTERFACE DAC LCM Idc=I bias +0.5I fs Vcm F653 IOUTxP Low Pass Filter BBP Rint IOUTxN I bias +0.5I fs 0 to 0 ma BBN Rint Rdac 50W Rdac 50W DC impedance: 50W per side AC impedance: 00W differential LCM DAC: low common mode voltage DAC usually has high output impedance and sourcing current out LPF: to filter out unwanted harmonics DC common mode voltage on BBP/BBN Vcm: Vcm=IDC x R dac //R dc_iqmod Vcm is determined by DAC bias current and IQ Mod input DC impedance Zero-Distortion TM Modulator 3 RevO, April 05

14 IDTF653NLGI PACKAGE DRAWING (4X4 4 PIN) Zero-Distortion TM Modulator 4 RevO, April 05

15 IDTF653NLGI PIN DIAGRAM TOP View (looking through the top of the package) GND BB_I+ BB_I- VDD STBY GND CO 0.35 mm Exposed Pad Package Drawing 4 mm x 4 mm package dimension 8 7 VDD LO mm x.60 mm exposed pad 0.5 mm pitch 6 RF_OUT LO- 4 4 pins mm height GND mm pad width mm pad length 3 GND BB_Q- BB_Q+ Zero-Distortion TM Modulator 5 RevO, April 05

16 IDTF653NLGI PIN DESCRIPTIONS Pins Name Function STBY STBY Mode. Pull this pin high for Standby Mode. Pull low or ground for Normal Operation., 5, 3, 9 GND Ground these pins. 6, 7, 8,,, 4, 5, 7, 0, 3 3, 4 LO+, LO- IDT recommends grounding these pins. Local oscillator (LO) 50 ohm differential or 5ohm each pin single-ended input. Pins must be ac-coupled. For 50 ohm singleended operation, ac-couple USED Pin to 50 ohm termination and ac-couple UNUSED pin to GND. 9, 0 BB_Q-, BB_Q+ Quadrature differential baseband input. Internally matched to 00 ohms. 6 RF_OUT RF output. Must be ac-coupled. 8, 4 VDD, BB_I+, BB_I- Power Supply. Bypass to GND with capacitors as shown in the Typical Application Circuit as close to pin as possible. In-Phase differential baseband input. Internally matched to 00 ohms. EP Exposed Pad. Internally connected to GND. Solder this exposed pad to a PCB pad that uses multiple ground vias to provide heat transfer out of the device into the PCB ground planes. These multiple via grounds are also required to achieve the specified RF performance. Zero-Distortion TM Modulator 6 RevO, April 05

17 3 IDTF653NLGI EVKIT SCHEMATIC J3 VR VDD TP R6 R4 C3 C7 0 GND BB_Q+ BB_Q- BB_I- BB_I+ STBY VDD T C5 VDD VR TP C6 VDD TP3 VDD L R5 C4 L R7 C5 R R3 VCC R J VDD 8 VCC C6 J C L5 3 GND LO+ U RFOUT 7 6 C J6 C8 4 LO- F653 5 VCC TP9 R8 VCC J9 5 6 GND 4 GND 3 PAD 5 R0 TP4 VCC R9 C7 TP8 R8 TP0 J4 VDD VDD VDD R4 TP7 VR4 TP6 TP5 VR3 L4 L3 VDD J0 R3 C C0 R C R J5 C8 C9 C3 C4 T J7 POWER SUPPLIES All supply pins should be bypassed with external capacitors to minimize noise and fast transients. Supply noise can degrade noise figure and fast transients can trigger ESD clamps and cause them to fail. Supply voltage change or transients should have a slew rate smaller than V/0uS. In addition, all control pins should remain at 0V (+/-0.3V) while the supply voltage ramps or while it returns to zero. Zero-Distortion TM Modulator 7 RevO, April 05

18 IDTF653NLGI EVKIT BOM Part Reference QTY DESCRIPTION Mfr. Part # Mfr. C 8pF ±0.5pF, 50V, C0G Ceramic Capacitor (040) GRM555CH8R0D MURATA C4,C6,C8,C0,C7 5 0nF ±0%, 6V, X7R Ceramic Capacitor (040) GRM55R7C03K MURATA C 39PF ±5%, 50V, C0G Ceramic Capacitor (040) GRM555CH390J MURATA C7,C9 00nF ±0%, 6V, X7R Ceramic Capacitor (040) GRM55R7C04K MURATA R3,R8,R9,C3-C6,L5 8 0Ω /0W Resistor (040) ERJ-GE0R00X Panasonic R5,R 4.9 Ω ±%, /4W Resistor (06) RMCF06FT4R9 Stackpole Electronics R 47.0KΩ ±%,/6W Resistor (040) RC040FR-0747KL Yageo VR,VR4 KΩ ±0%, /4W Resistor Trimmer TS63Y0KR0 Vishay/Sfernice J,J5,J8,J9 4 CONN HEADER VERT SGL X POS GOLD AR 3M J3,J4,J7,J0 4 Edge Launch SMA (0.50 inch width, round center contact) Emerson Johnson J,J6 Edge Launch SMA (0.375 inch width, flat center contact) Emerson Johnson T,T : Center Tap Balun ADT-T+ Mini Circuits U IQ MOD F653 IDT Printed Circuit Board F650 SE EVKIT REV (0) Coastal Circuits VR,VR3 DNP C3,C5,C,C, C8 DNP L,L,L3,L4 DNP R,R4,R6,R7,R0,R DNP R3,R4,R6,R8 DNP APPLYING V CM AT THE BASEBAND INPUTS With L, L, L3, and L4 unpopulated, the common mode voltage is set by VR and VR4. The voltage set by VR has a DC path through the balun transformer T to pins BB_I+ and BB_I-, as highlighted. This also applies for VR4, T, and pins BB_Q+ and BB_Q-. With this configuration, the same voltage will be applied to BB_I+ and BB_I- and the same voltage will be applied to BB_Q+ and BB_Q-. The I and Q common mode voltages may be different from each other to null LO (carrier) leakage. Zero-Distortion TM Modulator 8 RevO, April 05

19 IDTF653NLGI EVKIT PICTURE: Note: VCC connection on evaluation board is VDD Power Supply on the datasheet. VDD connection on evaluation board is used to set baseband pin common mode (CM) voltage (see schematic) Zero-Distortion TM Modulator 9 RevO, April 05

20 IDTF653NLGI TOP MARKINGS F653GI ZC44N Q4A06Y Part Number Date Code [YYWW] (Week 4 of 04) Die Step Lot Code Zero-Distortion TM Modulator 0 RevO, April 05