Design of a MIMO System for Interference Reduction in a Laptop System. EECS 522 Final Project Group 1 Roland Florenz Maksym Kloka Ben Sutton

Transcription

1 Design of a MIMO System for Interference Reduction in a Laptop System EECS 522 Final Project Group 1 Roland Florenz Maksym Kloka Ben Sutton

2 Outline Motivation Block Diagram/Concept Introduction Component Level: LNA Summer Filter Results Conclusion/Who cares?

3 Motivation Military jamming rejection Commercial laptop computers Our goal: Improve signal quality Reduce interference in a noisy environment Hear the person speaking with greater clarity

4 Reducing Interference sin( ωt) sin( ω( t + t d )) ADC t sin( ( d wt ω t + ))cos( d ) Wow! Guys who designed this probably took EECS 522 Methodology Apply principles of trigonometry to aid in the design Problem Frequency dependent attenuation cosine factor Implementation Utilize 100Hz-1.2kHz range as bandwidth of interest Use Matlab for optimum microphone spacing

5 Block Diagram Amplifies desired signal, attenuates interferer

6 LNA Low Frequency Challenge Normally, utilize inductors and capacitors Noise figure dominated by flicker noise Solutions: Larger transistors Lower bias current Flicker Noise Dominates at Low Frequency

7 LNA Design Tradeoff Cutoff frequency vs. noise figure More gain=>larger noise figure Solution: Cascode design Equivalent single pole filter at output Tradeoffs between gain, bandwidth, noise figure

8 Results LNA Device LNA Specification Harrison [4] Mohesni [5] LT1115 [7] TL07xM [8] This Work Input Referred Noise 2.2 μvrms (0.5Hz- 50kHz) 7.8 μvrms (0.1Hz- 10kHz) 0.9 nv/sqrt( 1kHz 18 nv/sqrt 1kHz 0.9 μvrms (10Hz- 10kHz) / kHz Power Consumption n/a n/a THD 1% 1.10% n/a n/a 0.38% Gain 39.5dB 39.3dB n/a n/a 38dB Process 1.5 μm CMOS 1.5 μm CMOS n/a n/a 0.13 μm CMOS Compares well with literature

9 Summer Methodology EECS 215 Problems Feedback changed biasing Big feedback resistor needed V out = VX + VY A( )sin( ω ot) = AVW sin( ωot) 2 Implementation Redesign with low-pass filter Gained Benefits Eliminated noise from feedback resistor

10 60-65dB Gain Amp. Schematic Adapted/modified from OTA by: [2] W.-K Duruk, A, & Kuntman, H.

11 Results dB Amp Specifications Goal Actual Noise Figure 6dB 55dB Power Consumption <20mW 540μW Bandwidth 50kHz 3MHz Gain 70dB 60-65dB THD <0.01% 1.2%

12 Output Filter Desired Characteristics: Cutoff frequency ~2kHz At least -40 db/decade stop band Challenges: Low frequency size prohibitive Passive filters inappropriate due to size

13 Filter Schematic Input and output LP filters with wider pass band ~7kHz Switching filter response given by: A v ( C + C ) ( jω) = 1 + τ jω τ eff = [3] [3] C 1 F s Switched capacitors and buffers are low power

14 Results Filter Device Filter Specification Goal Actual Power <0.1W 37μW Consumption Bandwidth 100Hz- 2kHz 2.2kHz

15 Results System Increased Attenuation with Increased Offset

16 Results Summary Table Specification LMV 1089 [9] Our System Supply Voltage 3.3 V 1.2 V THD <1% at 1kHz <1% in band Gain 12-54dB 55dB Input Referred Noise 5 μv 1 μv Power Consumption 3.63 mw 338 μw

17 Layout Implemented in IBM s 0.13μm technology Area: 550µmx750 µm mm 2 DRC/LVS Clean (1) LNA, (2) Summer, (3) Filter

18 Who cares? Military Cell phone users Computer users Everyone, including you, cares

19 References [1] Elko, G.W., & Meyer, J. (2009). Second-order differential adaptive microphone array. ICASSP, [2] W.-K Duruk, A, & Kuntman, H. (2005). A New cmos differential OTRA design for the low voltage power supplies in the sub-micron technologies. Turk J. Elec. Engin., 13(1), [3] D.L. Fried, Analog sample-data filters, IEEE J. Solid-State Circuits, vol 7, pp , August [4] R.R. Harrison and C. Charles, A low-power low-noise CMOS amplifier for neural recording applications, IEEE J. Solid-State Circuits, vol 38, pp , June [5] P. Mosheni and K. Najafi, A fully integrated neural recording amplifier with DC input stabilization, IEEE Trans. Biomed. Eng., vol 51, pp , May 2004 [6] M. H. Zarifi, J. Frounchi, S. Farshchi, and J. W. Judy A Low-Power, Low-Noise Neural-Signal Amplifier Circuit in 90-nm CMOS. [7] Linear Technologies, Ultralow Noise, Low Distortion, Audio Op Amp LT1115 datasheet, 1989 [8] Texas Instruments, Low-Noise JFET-Input Operational Amplifiers SLOS080J datasheet, Sept [Revised Mar. 2005]. [9] National Semiconductor, Dual Input, Far Field Noise Suppression Microphone Amplifier with Automatic Calibration Capability LMV1089 datasheet, July 6, Questions?