Performance Analysis of the Voltage Source Converter based Back-to-back Systems in Medium-voltage Networks

Transcription

1 Performance Analyss of the Voltage Source Converter based Back-to-back Systems n Medum-voltage Networks Der Technschen Fakultät der Unverstät Erlangen-Nürnberg Zur Erlangung des Grades DOKTOR-INGENIEUR Vorgelegt von Andreja Rašć Erlangen -

2 als Dssertaton genehmgt von Der Technschen Fakultät der Unverstät Erlangen-Nürnberg Tag der Enrechung:.4.9 Tag der Promoton: Dekan: Berchterstatter: Prof. Dr. -Ing. habl. Johannes Huber Prof. Dr. -Ing. habl. Gerhard Herold Prof. Dr. -Ing. Andreas Stemel

3 Analyse des Betrebsverhaltens von Spannungsumrchtern n Mttelspannungsnetzen Der Technschen Fakultät der Unverstät Erlangen- Nürnberg Zur Erlangung des Grades DOKTOR-INGENIEUR Vorgelegt von Andreja Rašć Erlangen -

4 As Dssertaton Approved by the Faculty of Engneerng Scences of the Unversty of Erlangen-Nürnberg Day of submsson:.4.9 Day of Examnaton: Dean : Prof. Dr. -Ing. habl. Johannes Huber Examners : Prof. Dr. -Ing. habl. Gerhard Herold Prof. Dr. -Ing. Andreas Stemel

5 Zusammenfassung Dese Dssertaton st m Fachgebet Elektrsche Energeversorgung angesedelt. Se hat de Optmerung des Betrebsverhaltens enes Spannungsumrchters (VSC = Voltage Source Converter) am Netz zum Zel. Es soll n jedem Betrebspunkt ene möglchst hohe Versorgungsqualtät gewährlestet werden. Um deses Zel zu errechen, müssen robustere Umrchter mt neuen Regelalgorthmen entwckelt werden. Herzu snd das statonäre Verhalten sowe de Reakton auf Störungen bzw. de Behandlung von Störungen des VSC zu untersuchen. In deser Arbet wurden en Zwepunktumrchter sowe en modularer mehrstufger Umrchter (MMC = modular multlevel Converter) analysert und für de Verwendung als Netzkupplung n Rücken-an-Rücken-Schaltung vorgeschlagen. Um das Umrchterverhalten mathematsch beschreben zu können, st en lneares zetveränderlches Modell (LTV = lnear tme varyng) für bede Umrchtervaranten entworfen worden. Das jewelge System wurde zwschen zwe Schaltvorgängen als lnear betrachtet. Da de Schaltfunktonen perodscher Natur snd, konnte her der statonäre Zustand berechnet werden. Mt dem LTV wurden de beden symmetrschen und unsymmetrschen Zustände der Zwepunktumrchter analysert. Da de Berechnung des statonären Zustands enen nedrgen Rechenaufwand erfordert, zegte de vorgeschlagene Methode ene gute Alternatve zu den numerschen Iteratonsprozeduren. Mt Hlfe der LTV-Analyse des mehrstufgen Umrchtersystems wurden de verschedenen Betrebspunkte, de von den Umrchterparametern abhängg snd, detektert. En spezelles Augenmerk wurde auf de Suche nach den optmalen Betrebspunkten unter Berückschtgung des Modulstroms gelegt. Da das Auftreten der zweten Harmonschen der Zwegströme und hre Abhänggket von den Umrchterparametern erkannt wurde, konnte se als Krterum zur Optmerung des aktuellen Moduls verwendet werden. De Resonanzpunkte der Umrchterzwegströme wurden auch ermttelt und dargestellt. Es wurde außerdem ene Analyse m Frequenzberech durchgeführt, um de Matrx der Partal-Impedanzen und -Admttanzen zu gewnnen und um de analytsche Lösung für

6 jede enzelne harmonsche Komponente fnden zu können. De Ergebnsse des LTV- Modells wurden von der Frequenzberechsanalyse bestätgt. Um enen VSC an das Netz zu schalten, wrd en spezeller Transformatorflussregler verwendet. Der Regler estmert der Transformatorfluss und generert ene Referenzspannung, de hn m lnearen Berech hält und glechzetg de Dauer des Enschaltvorganges reduzert. Um de Versorgungsscherhet krtscher Lasten aus zwe unabhänggen Netzen zu gewährlesten, werden dre Wechselrchter an enem gemensamen Zwschenkres betreben. Herzu wurde en spezeller Zwschenkres-Spannungsregler entwckelt. Deser ermöglcht, dass bede Wechselrchter ener Rücken-an-Rücken-Anordnung glechzetg Enfluss auf de Zwschenkresspannung nehmen können. De Versorgung der krtschen Last wrd vom drtten, an de Glechstrom-Sammelschene angeschlossenen, Wechselrchter gelefert. Es wurde weterhn en Algorthmus für de Elmnaton des Enflusses der Glechspannungsmessfehler entwckelt und analysert, der glechzetg de Regelung der Lastvertelung zwschen zwe Netzen erlaubt. De Dynamk und der statonäre Zustand der frequenzbaserten Lastflussalgorthmen wurden smulert als auch m Labor an enem Versuchsaufbau überprüft.

7 Acknowledgement The research work of ths thess has been carred out durng the years 5-9 at the Lehrstuhl für elektrsche Energeversorgung - Unversty of Erlangen Nürnberg, where I was workng as a PhD student. Ths thess s a part of the larger research project SIPLINK, fnanced by the company Semens AG. I would lke to express my grattude to my supervsor, Prof. Gerhard Herold, for acceptng me as a PhD student at the nsttute, and for hs valuable comments, gudance and encouragement. I also wsh to thank Prof. Andreas Stemel for acceptng to be the corrector of my work. The fnancal support by the Semens PTD TI department durng my PhD studes s greatly acknowledged. I also wsh to thank my Semens colleague Mr. Uwe Krebs for collaboraton and stmulatng dscussons on techncal matters and for the effort he made about my employment. I would lke to thank my colleagues: Dr.-Ing. H. Rubenbauer, Dr.-Ing. G. Ebner, Dr. Ing. C. Wendl, Dr. Ing. W. Meyer, Dpl.-Ing. M. Ramold, Dpl.-Ing. T. Kel, Dr.-Ing. J.A. Nasser, Dpl.-Ing. I. Mladenovc and other researchers of the nsttute, and to our secretares Mrs. J. Begel and Mrs. P. Gambel for the support and for the frendly atmosphere on the nsttute. To my colleagues from the workshop Mr. D. Leuschner, Mr. W. Ruschg and Mr. M. Oschmann, I would lke to thank for the support on the realzaton of the laboratory setup. Most of all I am grateful to my wfe Ana and to our trplets Mlca, Stevan and Đorđe for ther love, patence and support durng the preparaton of ths thess. And overall to my parents Đura and Vnka to whom I dedcate ths work.

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9 TABLE OF CONTENTS INTRODUCTION.... Motvaton and objectves.... Lterature overvew..... The analytcal descrpton and the control of the VSC Multlevel converters The nrush current elmnaton The load flow analyss wth the VSC Thess outlne and major results... 4 VOLTAGE SOURCE CONVERTERS AND THE BACK-TO-BACK SYSTEM TOPOLOGY Basc concept of Voltage-Sourced Converter (VSC) The back-to-back structure and fundamental frequency based power flow model.3 The VSC connectng two or more grds ANALYTICAL DESCRIPTION OF THE -LEVEL CONVERTER Lnear tme varyng model System equatons of the VSC System equatons for the Back-to-back operaton mode The steady-state soluton Influence of the swtchng frequency The case wth swtchng frequency fc = 3kHz The case wth swtchng frequency fc=45 Hz... 5

10 3.3 ZERO SEQUENCE OF THE SYSTEM Influence of the unequal swtchng frequences Influence of the IGBT s dead-tme Concluson and dscusson ANALYTICAL DESCRIPTION OF THE MODULAR MULTILEVEL CONVERTER The general dea of the modular multlevel desgn The crcut confguraton and prncples of operaton The analyss of the system wth one module per phase-arm Swtchng lnear tme varyng model of the MLM wth two modules per phase-leg The steady-state soluton examples The frequency-doman analyss of the Modular multlevel converter The resonance phenomena Optmal operatng pont n terms of IGBT s current The short crcut operatng pont The calculaton wth the fnte swtchng frequency General case of the modular multlevel converter The swtchng tme varyng model of the general MMC converter The nfluence of the unequal capactor values The averaged model The smulaton results Concluson and dscusson CONNECTION/RECONNECTION OF THE VOLTAGE SOURCE CONVERTER TO THE POWER NETWORK The problem defnton and system structure Resdual flux determnaton...74

11 5. Possble solutons for the nrush elmnaton Ramp-up functon wth voltage feedback: Transformer Flux Controller: The representaton of the frst and second dervatve n a d-q reference frame The state-space representaton of the system The flux controller desgn CONTROL SCHEMES OF THE VOLTAGE SOURCE CONVERTER DC voltage control Control desgn: State feedback controller: Compensatng the steady-state and transent characterstc: The deal operaton of two DC voltage controllers operatng n parallel: Problems of controllng the same varable by separate controllers: The measurement error- droop Back-to-back system wth double controlled DC voltage Frequency based power flow control The dea of the power flow regulaton: The equvalent dagram of the power/frequency loop: Steady-state power flow algorthm ncludng the back-to-back converters Modellng of the back-to-back system The algorthm for calculaton: Example of the multmaschne network contanng Back-to-back VSC Transent analyss of the back-to-back system connectng two weak networks Optmzaton of the control parameters... 7 EXPERIMENTAL RESULTS... 7

12 7. The setup descrpton Hardware descrpton of the lab. setup DSpace rapd prototypng system The Dead tme generator The results of the experments Connectng of the VSC to the network Double controlled DC voltage CONCLUSION AND DISCUSSION... 3 APPENDIX The lst of abbrevatons and symbols...33 LITERATURE... 37

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15 Introducton. Motvaton and objectves The surge of applcatons of power electroncs n ndustral, commercal, mltary, aerospace, and resdental areas has drven many nventons n devces, components, crcuts, controls and systems. Whle the tempo of these nventons wll contnue to enrch power electroncs technology, the demand for compact, low cost, hgh dynamc performance, hghly relable and effcent power electroncs products has ncreased steadly over the years. To reach ths goal, a number of ssues need to be addressed. Among these ssues, modularty and parallelablty s one of the key components because t s desrable and nevtable to use a modular archtecture wth standardzed modules. The use of modular or parallel converters provdes many advantages, ncludng the followng prmary consderatons. () Hgh relablty. A double controlled mult-converter system provdes redundancy, thus ncreases relablty, whch s crtcal n some applcatons, such as stand-alone dstrbuted power systems on shpboard, drllshps, man-frame computers and servers, etc. System relablty can be drastcally mproved by usng a parallel structure nstead of a sngle-converter soluton. () Hgh power. Due to the fundamental lmtatons of semconductor devces, a sngle converter always has lmted power capablty. One way to acheve a hgh power level s to use modular structure. Any number of seral connected modules can be chosen, accordng to the specfc power requrements encountered. (3) Dstrbuted power. A desgned archtecture has to be used n some dstrbuted power systems due to low-voltage dstrbuton bus and hgh-current requrement. Wth the new desgn, the dstrbuted power systems can be easly constructed and expanded. (4) Hgh performance. The hgh performance s acheved usng the novel control technque, as well as optmzng the parameters that are n use. Defnng the goals,

16 Introducton and knowng the lmts, the hghest performance can be acheved by usng the modular desgn, enablng the possblty for flterless operaton. (5) Enablng technology for emergng applcatons. Wth ncreasng concern about envronmental ssues, nterest has grown n envronmentally safe power generaton systems. One promsng canddate s a fuel cell generaton system, whch features hgher electrcal effcency and cleaner exhaust gas. The fuel cell requres hgh current (but low-voltage) converters, and s therefore sutable for a ths arrangement. Untl recently, back-to-back operaton was not a common practce n three-phase power converson because of nteractons that cause addtonal overhead requrements, such as transformers and flters. Recently, some actve controls and converter desgns have been proposed to mnmze the nteractons so that the overhead requrements can be reduced. Wth actve controls, the operaton s becomng a promsng soluton n three-phase power converson. However, the exstng actve controls are more complcated when more converters are employed. Stll the optmal soluton for energzng the transformer can be found. In ths work, a back-to-back three-phase converter structure connectng two threewre networks takng n account the network dynamcs as well as the transformer characterstcs s presented. The drect connecton of three-phase converters presents attractve characterstcs, such as smplcty, easy expandablty and mantanablty. Even wth all these advantages, there are potental rsks. Couplngs and nteractons may exst n the system. The objectve of ths work s to comprehensvely address the ssues of the three-phase converters by exact modellng of the swtchng procedures. The back-to-back system when both converters share n the control the DC voltage, each capable to avod the transformer nrush current, s covered n ths work.. Lterature overvew Ths secton provdes a lterature survey of prevous work on voltage source converters n medum-voltage networks, n whch the most relevant prevous work s dscussed. A classfcaton of the papers s made based on the nature of the references

17 . Lterature overvew 3 even though several of them cover more than one topc. However, the references at the end of ths thess are sorted n alphabetcal order... The analytcal descrpton and the control of the VSC Snce the power electronc devces brng the great nfluence to the network, an exact mathematcal descrpton s apprecated. The analyss of the system s often provded n tme-doman usng the teratve procedures. Most of commercal smulaton software use ths technque n order to fnd the results [], [7]..[]. The pece-wse lnear technque for the STATCOM devce s presented n [3][6][7]. The method uses the system symmetry n order to fnd the steady-state soluton. The analyss of the network commutated converters s presented n [9][]. Ths analyss s performed n state-space, and the steady sate soluton has been found. Another method for analysng the perodcally swtched networks s the analyss n frequencydoman[34]. If the swtchng functon s represented wth ts Fourer seres, the equvalent mpedance matrx could be found[4]. If the harmonc nteracton of the converter s not of the nterest of the calculaton, the averaged model s appled [33]. Dfferent control and modulaton technques for the VSC are presented n lterature. The common used control technques are the current predcton technque[57], the vrtual-flux control [35],[58], and the hysteress current control[4]. Also dfferent modulaton technques are developed n order to mnmze the harmonc contents of the swtchng functons... Multlevel converters Snce the actual voltage level of the IGBT s not so hgh [6], dfferent multlevel desgns are proposed. The dode clamped multlevel converter s presented n [3] and the modulaton strateges n[39] [48]. The proposed topology has the lmt n the number of levels. Also the cascade multlevel nverters are presented n [] []. The cascade nverter has the advantage that the output voltage can be tuned by the number of modules. However ths topology s not sutable for the back-to-back operaton. In order to acheve the fne tunng of the output voltage, and to make the back-to-back operaton possble, the modular multlevel converter s presented n[36]. The papers[36][37][38] gve the prncple of operaton of the MMC, propose the modulaton topology and gve the smulaton results. The same authors present

18 4 Introducton the laboratory setup n[]-[4], and the frst expermental results. The smlar topology s analysed by [56], and smulaton and expermental results are presented. However, n the avalable lterature, no analytcal descrpton of the proposed topology could be found...3 The nrush current elmnaton The nrush current phenomena s detected and presented already n[][][3] [46]. Snce the nrush current can damage the power systems elements, dfferent technques for the nrush elmnaton are proposed n [][4][5] [47][5]. All of these technques use addtonal equpment n order to lmt the nrush current. The work presented n[43], uses the seral connected VSC that measures the transformer current, and generates the compensaton voltage, that lmts the nrush. Snce all of these methods use the addtonal equpment, and prolong the connecton perod, a new control algorthm should be found that elmnates the nrush and mnmzes the connecton tme...4 The load flow analyss wth the VSC The man task of the back-to-back converter system s to transfer the power from one network to another. Dfferent steady-state analyss technques that nclude the models of the FACTS devces are presented n [45][59]. All of these methods are based on the Newton-Raphson teratve procedure. If the VSC based DC dstrbuted system s appled, dfferent load sharng methods are proposed[9][59]..3 Thess outlne and major results Ths Thess s embedded n the feld of the electrc power dstrbuton. Its am s the optmzaton of the VSC (Voltage Source Converter) behavour when t s used as nterface connected to the grd of electrcty generaton system, n order to delver or to demand energy to the grd wth the best possble qualty. To acheve ths objectve, the desgn of more robust converters was proposed and the new control algorthms that mprove the behavour of the VSC n steady-state as well as under possble dsturbances were analysed.

19 .3 Thess outlne and major results 5 At the desgn framework, n ths Thess a back-to-back two level, as well as the modular multlevel converter (MMC) s analysed and proposed for connectng the power grds. In order to mathematcally descrbe the converter behavour, the lnear tme-varyng model (LTV) s developed for both the -level and modular multlevel nverter. The system s consdered lnear between two swtchng nstants. Snce the swtchng functons have a perodcal nature, the steady-state of the system s calculated. Usng the (LTV) model, both balanced and mbalanced operatons of the - level converter are analysed. Snce the calculaton of the steady-state requres a low computatonal effort, the proposed method showed a good alternatve to the numercal teratve procedures. Applyng the LTV method to the modular multlevel converter, the dfferent operatng ponts are determned dependng from the converter parameters. Specal attenton was pad on fndng the optmal operatng pont concernng the module current. Snce the presence of the second harmonc of the converter s arm current and ts dependence from the converter parameters s determned, t s used to optmze the module current. The resonance ponts of the converter s arm current were also detected and presented. The analyss n the frequency-doman was performed n order to fnd the system s partal mpedances and admttances, and to fnd the analytcal soluton for each harmonc component. The results obtaned wth the LTV model, were confrmed by the frequency-doman analyss. Connecton and reconnecton of the VSC to the power network s realzed wth the transformer flux controller. The controller estmates the transformer flux and generates the reference voltage that keeps the transformer flux n the lnear area and smultaneously mnmzes the connecton tme. In order to secure the power supply for the crtcal load, the double controlled DC voltage controller was developed, meanng that the both converters of the back-toback systems control the DC voltage. The crtcal load s suppled by the thrd converter connected to the DC bus. The algorthm for elmnatng the nfluence of the DC voltage measurement error, smultaneously provdng the controlled load

20 6 Introducton sharng s developed and analysed. At the end, the dynamc and the steady-state of the frequency based load flow algorthm s presented. The proposed control algorthms were smulated and tested on a real-tme hardware.

21 . Basc concept of Voltage-Sourced Converter (VSC) 7 Voltage source converters and the back-to-back system topology. Basc concept of Voltage-Sourced Converter (VSC) The concept of FACTS Controller conveys that the Voltage-Sourced Converter s the basc block n STATCOM, SSSC, UPFC, IPFC, and some other controller. Therefore, ths chapter wll dscuss ths converter. As already explaned, the conventonal thyrstor devce has only the turn-on control; ts turn-off depends on the current comng to zero as per crcut and system condton. Devces such as the Gate Turn-off Thyrstor (GTO), Integrated Gate Bpolar Transstor (IGBT), MOS Turn-off Thyrstor (MTO), ntegrated Gate-Commutated Thyrstor (IGCT), and other smlar devces have turn-on and turnoff capablty. These devces (referred to as swtchng devces) are more expensve and/or have hgher losses than the thyrstor wthout turn-off capablty. However, swtchng devces enable converter concept that can have sgnfcant overall system cost and performance advantages. In prncple these advantages result from the converters, whch are self-commutatng aganst the lne-commutatng converters. Compared to the self-commutatng converter, the lne-commutatng converter must have an AC source connected to the converter, whch consumes reactve power, and suffers from occasonal commutaton falures n the mode converter of operaton. Therefore, unless a converter s requred to operate n the two laggng current quadrants, only (consumng reactve power whle convertng actve power), converters applcable to FACTS controllers would be of the self-commutatng type. There are two basc categores of self-commutatng converters: Current-Sourced Converter n whch the drect current always has one polarty and the power reversal takes place through both DC voltage polartes Voltage-Sourced Converter n whch the drect voltage always has one polarty and the power reversal takes place through several DC current polartes. Conventonal thyrstor-based converters, beng wthout turn-off capablty, can only be Current-

22 8 Voltage source converters and the back-to-back system topology Sourced Converters, whereas turn-off devce-based converters can be of ether type. For economc and performance reasons, Voltage-Sourced Converters are often preferred over Current-Sourced Converters for FACTS applcatons. Here Voltage-Sourced Converters wll be dscussed, whch form the bass dea for several FACTS controller. Snce the drect current n a Voltage-Sourced Converter flows n ether drecton, reverse, the swtchng devces don t need reverse voltage capablty. Thus, a Voltage- Sourced Converter valve s made up of an asymmetrc swtchng devce such as a GTO, whch s shown n wth ant-parallel dode. Some devces, such as the IGBTs and IGCT, may have a parallel reverse dode bult n as part of a complete ntegrated devce sutable for Voltage-Sourced Converters. However, for hgh power converter, the provson of separate dodes s advantageous. In realty, there would be several swtchng devce-dode unts n seres for hgh-voltage applcaton. In general, the symbol of one swtchng devce and wth one parallel dode, wll present a valve of approprate voltage and current ratng requred for the converter. Wthn the category of voltage sourced-converter, there are also a wde varety of converter concepts. The basc functonng of Voltage Sourced-Converter s shown n Fgure.. The nternal topology of the converter valves s represented n a box wth a symbol nsde. On the DC sde, the voltage s un-polar and supported by a capactor. Ths capactor s large enough to handle at least a unstaned charge/dscharge current that accompanes the swtchng sequence of the converter valves and shfts n phase angle of swtchng valves wthout sgnfcant change n the DC voltage. In ths chapter, the DC capactor voltage wll be assumed constant. It s also shown on the DC sde that the Coverter current can flow n another drecton. It can exchange DC power wth connected DC system n the ether drecton. u dc c c dc VSC ac L, r 3-Phase Network u ac u Tr u G Control Fgure.: Basc prncple of the voltage source converter

23 . Basc concept of Voltage-Sourced Converter (VSC) 9 Shown on the AC sde s the generated AC voltage connected to AC system va an nductor. An AC voltage source wth nternal mpedance, a seres nductve nterface wth the AC system (usually through a seres nductor and/or a transformer) s essental to ensure that the DC capactor s not short-crcuted and dscharge rapdly nto a capactve load such as a transmsson lne. Also, an AC flter may be necessary followng the seres nductve nterface to lmt the consequent current harmoncs enterng the AC system. Bascally, a VSC generates an AC voltage from a DC voltage through ts swtchng functon. Wth a VSC, the magntude, the phase angle and the frequency of output voltage can be controlled. In order to further explan the prncples, shows a dagram of a sngle-valve operaton. The DC voltage, the U dc s assumed to be constant, supported by a large capactor, wth the postve polarty sde connected to the anode sde of the swtchng devces. The operaton of the half brdge VSC s presented n Fgure. T D C U d / L A u ac T D C Fgure.: The operaton of the half-brdge VSC When the swtchng devce s turned on, the postve DC termnal s connected to the AC termnal A, and the AC voltage wll jump to +U d. If the current happens to flow from +U d to A (through the devce ), the power would flow from the DC sde to AC sde (converter acton). However, f the current flows from A to + U d t wll flow through dode even f the devce s called turned on, and the power would flow from the AC sde to the DC sde (rectfer acton). Thus, a valve wth combnaton of swtchng devce and dode can handle the power flow n ether drecton, wth the turnoff devce handlng converter acton, and wth the dode handlng rectfer acton. Ths valve combnaton and ts capablty to act as a rectfer or as a converter wth the

24 Voltage source converters and the back-to-back system topology nstantaneous current flow n postve (AC to DC sde) or negatve drecton, respectvely, s a basc ssue n the Voltage- Sourced Converter concepts Full-brdge SPWM converter The full brdge converter shown n Fgure.3 can be ether bpolar or un-polar swtched. In the bpolar swtchng scheme, transstors T and T4 are swtched on together, when m(t) >c(t), as are T and T3, when m(t) <c(t), as presented n Fgure.4. The control voltage m(t) s snusodal of the frequency equal to the desred output frequency and ampltude determned by the requred RMS output voltage. The carrer frequency s generally much hgher than the frequency of the modulatng waveform. Regardless of the drecton of current flow n the load, the load voltage waveform s determned by the state of the swtches. T D T3 L T D T4 C U d u ac Fgure.3: The full-brdge VSC The ampltude of each SPWM voltage pulse across the load s now ±U d. Ths swtchng scheme s called bpolar, as opposed to un-polar n whch both swtches n a dagonal par may not be swtched on or off smultaneously. Two swtches n the same leg of the converter are never turned on together because that causes the consttuton of a short crcut across the DC source. The bpolar scheme s obtaned by a comparator based on the followng rule: When m(t) >c(t), T and T4 are on T and T3 are off, When m(t)<c(t), T and T3 are on and T and T4 are off. If the PWM swtchng or carrer frequency s far hgher then the frequency of the modulatng waveform t can be assumed that the modulatng wave changes a lttle over a swtchng perod.

25 . The back-to-back structure and fundamental frequency based power flow model m(t) ( ) c(t) ( ) mt ct T ON 3T ON T ON 4T 34 ON +U d V +U d U d V U-U d t /s Fgure.4: The PWM technque for the full brdge converter The average output voltage over each swtchng perod s then equal to the depth of modulaton (or the effectve duty cycle over the swtchng perod) tmes the supply voltage, U d. It should be expected that the fundamental output voltage waveform should be gven by the average voltage durng each swtchng perod. Ths s gven by the dotted snusodal of whch can be formulated as the followng: U max = mu for m d. The back-to-back structure and fundamental frequency based power flow model The fundamental frequency power through the back-to-back system presented n Fgure.5 s obtaned by changng of the magntude of the modulaton ndex m, and ts angle δ of both converters. In order to obtan these parameters, the equaton for power flow through the seral reactance s used for both sdes of the converter:

26 Voltage source converters and the back-to-back system topology 3UU g sn( δ) 3UU g sn( δ) P = ; P = (.) X X Q g g δ 3U U U cos( ) = ; Q X U U = m 3 ; U m 3 g UUg δ 3U cos( ) = (.) X U = (.3) For the gven DC voltage U dc and for the prescrbed load sharng parameter k = P/ P3, the equaton set can be solved analytcally. The equatons for the modulaton ndexes of the both converters are presented as follows: m m g g a 8 X ( k P Q ) 7U 48U Q X = (.4) 3U U dc g g g a 8 X (( k) P Q ) 7U 48U Q X = (.5) 3U U dc g kp δ = arcsn( ) ( k P Q ) X 9U 6U X Q a+ 4 g g a ( kp ) δ = arcsn( ) (( k) P + Q ) X + 9U 6U X Q a g g a (.6) (.7) 3-Phase Network P Q P Q VSC VSC T X a X U a dc U g U VSC 3 T U U g 3-Phase Network P3 3-Phase Network 3 Q3 Fgure.5: The power flow through the VSC back-to-back system

27 .3 The VSC connectng two or more grds 3 Usng these equatons, the maxmal power transfer capacty can be calculated, snce the value of the modulaton ndex s lmted to.5. The obtaned results are used later for the analytcal descrpton of the VSC n order to analyse dfferent operatng ponts (for example, power flow from the converter, load sharng, reactve power generaton etc.)..3 The VSC connectng two or more grds The back-to-back system can be conssted of more than two converters connected to the same DC bus. The energy s then dstrbuted wthn the DC bus. The nvestgated DC dstrbuton network model conssts of sx converters: three of them are operatng as sources and others are feedng power to loads. The converters are connected to galvancally separated AC power sources or loads. The sources and loads are modelled as three-phase grds. The grds are galvancally separated,.e. wthout common reference, to avod a low mpedance path for the zero-sequence. Later n Chapter 3.8, the zero sequence phenomenon, wll be dscussed, when the common ground s assumed. To nvestgate the transent response of the DC bus voltage controllers, the power references for the power fed to the loads are changed n steps. Therefore, the dynamcs of the generators, wnd turbnes, etc. mght nterfere wth the dynamcs of the voltage control. Ths s further dscussed n Chapter 6, where a dstrbuted system operated between two generator-drven networks s nvestgated. Fgure.6 shows a sxconverter DC power system confguraton, representatve for the power systems consdered n the analyss. Each converter has a front nterface wth an nductve connecton to the source. Therefore, the end nterface connected to the DC bus s capactve. Consequently, the front sde of the converter s current controlled and the end sde s voltage controlled. In Fgure 3., the th converter sub-system of the sx ncluded n the DC network s shown. The DC bus capactor s used to partly decouple the AC and DC systems, so that a dsturbance on one sde s not reflected on the other sde of the converters.

28 4 Voltage source converters and the back-to-back system topology ~ ~ ~ P U dc P U dc P3 U dc3 P4 U dc4 ~ P5 U dc5 ~ P6 U dc6 ~ Fgure.6: The dstrbuted DC power lnk connectng 6 AC power grds

29 3 Analytcal descrpton of the -level converter In ths chapter a contnues, tme varyng model of the -level VSC wll be dscussed. The focus has been gven on fndng an alternatve to the dscrete teratve procedures those have standardly been used for the analyss and smulaton of the power electroncs converters. Ths approach employs an exact analytcal soluton technque, to obtan the steady-state behavour of the VSC where all of the dstorton effects are taken nto account. The analytcal solutons, found by ths approach, are compared wth the smulaton results, obtaned by MATLAB/SIMULINK/SmpowerSystems tool. 3. Lnear tme varyng model The back-to-back system wll be consdered as to be a rectfer/nverter system. The equatons wll be gven for those two systems separately. The Fgure 3- shows the basc connecton of the VSC to the network, through a seral mpedance. 3-Phase Network (u a,u b,u c ) L,R abc C R dc u dc Fgure 3-: The basc desgn of the VSC converter

30 6 3 Analytcal descrpton of the -level converter The VSC s modelled as a lnear network wth a topology that changes dependng on the state of the swtchng devces (IGBTs). The analyss s performed assumng the followng facts: The system s lnear between two swtchng occurrences Swtchng functons occur at predefned tme nstants, as determned by the PWM or some other swtchng technque. The swtchng frequency s assumed to be three tmes the nomnal network frequency Over each tme nterval, durng whch the system does not change the state, the crcut equatons can be solved usng the standard lnear technques. The results obtaned for the current tme nterval, can be used as an ntal condtons for the equatons of the next tme nterval. If the swtchng pattern s perodcal durng the tme wth perod T, the steady-state soluton over the same perod can be evaluated. The steady-state occurs when all the observed state values, return to ther ntal condton after one perod. For the 6-pulse systems the perod of symmetry s 3 π. 3.. System equatons of the VSC As shown n Fgure 3-, two operaton prncples exst: The rectfer operaton mode The nverter operaton mode For each of them, the set of dfferental equatons can be wrtten. The dfferental equaton set can be expressed n ether the abc or αβ reference frame Rectfer operaton mode Observng the Fgure 3-, the followng equatons can be wrtten: abc abc abc dc abc R = S u + u L L L dc aa bb cc dc dc u = ( S + S + S ) u C R C (3.) (3.)

31 3. Lnear tme varyng model 7 Where S abc represents the swtchng functon: S abc =, f the upper swtch s turned on, S abc = f the lower swtch s turned on. The assumpton s that the swtchng functons for the upper and the lower IGBTs are complementary functons. For PWM, swtchng functon has analytcal form: Sabc mabc c + mabc c = (3.3) where c represents the carrer sgnal. The equaton set has four state varables that fully descrbe the system behavour. The soluton can be found takng nto account all harmonc nteractons, and not only the fundamental. The rpple on the DC capactor s also consdered. The prevous equatons can be wrtten n space-vector representaton [5], usng the followng transformatons for voltages, currents, and gatng sgnals respectvely. ua uα u u = T b β 3 (3.4) u c a α = T b β 3 (3.5) c Sa Sα S S = T b β 3 (3.6) S c where.5.5 T = 3 3 (3.7) The nverse of the T transformaton gves the values of the phase currents and voltages. The nverse s represented as a T t where superscrpt t denotes transpose.

32 8 3 Analytcal descrpton of the -level converter The swtchng functons are not anymore the two level functons, but they take on a multlevel form as t s shown n Fgure 3-. Applyng the transformatons (3.4)-(3.7) on the (3.), the followng matrx representaton s obtaned. R S α α L L L R α uα β = S β β + L L L u β 3 3 u dc u dc Sα Sβ C C R dc (3.8) m abc,, S α t /s t /s S β.5 S β t /s S α Fgure 3- The space-vector components of the swtchng functon S, for fc=3f In matrx representaton, the system has the followng form: x= A x+ B u (3.9) The soluton of that knd of system, for each tme nterval can be found n the followng form:

33 3. Lnear tme varyng model 9 t A ( ) e ( t t ) ( ) ( ) e t t A τ x = x t + Bu ( τ ) dτ (3.) t The descrbed equaton set s pecewse lnear, but t s not a homogeneous system. In order to obtan the homogenous system, the lne voltage s consdered deal. For the π deal source, the voltage dervatves are the values shfted by and multpled by the angular frequency ω. The system obtans the followng homogenous form: R α Sα L L L α β R S β β L L L u = dc 3 3 u dc Sα Sβ C C R u dc α uα ω u β u β ω (3.) Snce the system has a homogeneous form, the soluton can be found by calculatng the matrx exponentals or egenvalues. The system can be wrtten n a short form: x= A x (3.) S αβ For the rectfer operaton mode, the fnal soluton can be expressed as: M e tn ( tn tn ) e tn ( tn tn )... e ( t t t M M x = ) x (3.3) ( ) n where M s the matrx of the egenvalues of the system, descrbed by the matrx A. ( ) 3... Inverter operaton mode Smlar to the rectfer mode, and accordng to Fgure 3-, the followng equatons can be wrtten for the nverter operaton mode: abc abc abc dc abc R = S U + u L L L (3.4) It s obvous that the order of the system s lower, snce the DC voltage s consdered constant (for example deal battery source). That means that state varables are the phase currents, so the complete system can be descrbed, by calculatng these values.

34 3 Analytcal descrpton of the -level converter Applyng the same transformatons (3.4)-(3.7) to the equatons (3.4) as for the rectfer mode, the followng matrx representaton for the nverter operaton mode s obtaned: R S α α L L L α R uα β = S β β + L L L u β u u dc dc (3.5) Analogue to the prevous chapter, t s possble to fnd the soluton, but the descrbed system s not homogenous. Assumng that the network voltage contans only a fundamental frequency postve sequence component, t s possble to consder t as a state varable nstead of an nput. Assumng that the DC voltage s also constant, meanng that ts dervatve s zero, the same concluson can be made. For the nverter operaton mode, the homogenous system representaton of the form: x= AS αβ x (3.6) can be descrbed wth the followng matrx equaton: α R S α L L L α β R β Sβ = L L L u udc dc uα u α ω u β ω u β (3.7) The soluton for the gven equaton set that descrbes the nverter operaton, analogue to the prevous chapter, can be found n the followng form: M e tn ( tn tn ) e tn ( tn tn )... e ( t t t M M x = ) x (3.8) ( ) n ( ) 3.. System equatons for the Back-to-back operaton mode Snce t s possble to generate an analytcal equaton set for any of the VSC operaton modes, t wll be possble to develop the system capable to transfer the power n any drecton. Concatenatng the equatons of the rectfer operaton mode wth the

35 3. Lnear tme varyng model equatons of the nverter operaton mode, descrbed n the prevous chapters, the backto-back system representaton can be desgned as n Fgure Phase Network (u a,u b,u c ) L,R abc C R dc u dc 3-Phase Network (u a,u b,u c ) L,R abc C Fgure 3-3:Back-to-back system confguraton The followng equatons are descrbng the back-to-back system: abc = R abc Sabcudc + uabc L L L abc = R abc Sabcudc + uabc L L L u ( ) ( ) dc = Sa a + Sb b + Sc c + Sa a + Sb b + Sc c udc C C RdcC (3.9) (3.) (3.)

36 3 Analytcal descrpton of the -level converter Transferrng ths equaton set nto the space-vector representaton, by applyng the Clarck s transformaton (3.7), and by assumng that the system voltages consst of the fundamental postve sequence component only, the complete system for the back-toback operaton mode can be descrbed as: R Sα L L L α R α S β β L L L β R α S α α L L L β R β S u β dc = L L L u dc u α u α Sα Sβ Sα Sβ u β C C C C RdcC uβ u ω α u α u ω β u β ω ω The soluton of the above system obtans the followng form: (3.) M ( t ( ) e n tn ) e ( tn tn )... e ( t t t = tn M tn M x ) x = Φ x (3.3) n ( ) ( ) tot 3..3 The steady-state soluton The perodc soluton of x(t), can be found by usng the fact that the state vector after a complete tme perod T, must equal the ntal state x(): ( + ) = ( ) = ( ) x t T Φtot x x (3.4) or n other way usng the angular representaton: ( π ) = ( ) xss x ss (3.5) The observaton of the space-vectors can be done by plottng the solutons usng the equaton (3.3). From the space-vector plot, t can be concluded that the perod of symmetry of as: π 3 exsts. Over that nterval, the steady-state equatons can be derved

37 3. Influence of the swtchng frequency 3 where: π x = Θ x 3 ( ) Θ= dag ( Ξ Ξ Ξ Ξ ) (3.6) and Ξ s the transformaton matrx whch can be wrtten n the form: π π cos sn 3 3 Ξ = (3.7) π π sn cos 3 3 Consequently, only a thrd of perod analyss s requred to determne the steady-state operatng pont of the back-to-back -level converter. Imposng the steady-state constrant equaton on the dynamc soluton (3.3) equaton yelds: ( ) ( ) Θ Φ x (3.8) tot ss = Parttonng of ths equaton leads to: ( ) ( ) E F xˆ ss = G H z (3.9) where xˆ ss () s the steady-state soluton of the system states, and z () s the ntal condton of the grd voltage. The matrxes E, F, G, H represent the parttons of the matrx A from equaton(3.). The fnal steady-state soluton of the back-to-back system s gven by the followng expressons: ( ) = ( ) xˆ ss E F z (3.3) ss () t = ( ) x Φ x (3.3) tot ss 3. Influence of the swtchng frequency The swtchng frequency of the voltage source converters brngs the sgnfcant nfluence to the waveforms of the DC voltage and lne currents. The hgher value of the swtchng frequency brngs the lower rpple of the lne currents and therefore the lower harmonc contents. At the other hand, the swtchng loses of the semconductors are

38 4 3 Analytcal descrpton of the -level converter drectly proportonal to the swtchng frequency. The dfferent types of the semconductors are mplemented at the dfferent frequency ranges. Also the nfluence of the swtchng dead tme s drectly proportonal to the swtchng frequency. Some typcal cases are dscussed n the followng chapters. 3.. The case wth swtchng frequency fc = 3kHz In Fgure 3-4 the symmetrcal operaton of the back-to-back system s assumed. The MW load on the DC sde s modelled. The load s shared between two networks that are connected wth the back-to-back converter. a, A I a (A), I a (A), I (A) β A 5 I β (A) β - - A I β (A) t /s (a) t(s) -5 I - α (A) - u dc V 5 4 U dc (V) (b) α A - I α (A) - - (c) α A 3 t(s) t /s Fgure 3-4:The steady-state soluton for fc=3khz:lne currents and zero sequence (a), space-vectors of the lne currents(b),(c), DC voltage(d) (d)

39 3. Influence of the swtchng frequency 5 Both converters are operatng wth the swtchng frequency of the 3 khz. The swtchng frequency of ths range s typcal for the low-voltage, hgh current IGBTs. Observng the space-vectors of the lne currents t can be concluded that the low THD s obtaned. The DC-voltage waveform s also presented, and shows the very low value of the 3 khz rpple. 3.. The case wth swtchng frequency fc=45 Hz The same crcut confguraton s modelled as n prevous chapter, wth the dfference n the swtchng frequency. It s to expect that the lower swtchng frequency ntroduces the hgher harmonc contents n the current and voltage spectrums. The space-vectors of the currents show the 6 pulse symmetry, and the nfluence of the swtchng frequency. From the DC voltage waveform the x45 Hz oscllaton could be seen. a, A I a (A), I a (A), I (A) β A 5 I β (A) β A - - I β (A) t(s) (a) α A -5 I α (A) - - (b) t /s 5 U dc (V) I α (A) t(s) (c) α (d) t /s A Fgure 3-5: :The steady-state soluton for fc=9f :lne currents and zero sequence (a), space-vectors of the lne currents(b) and (c), DC voltage(d) u dc V

40 6 3 Analytcal descrpton of the -level converter 3.3 ZERO SEQUENCE OF THE SYSTEM The back-to-back confguraton of the voltage source converters presented n Fgure 3-3 show that the zero-sequence dynamcs are governed by zero sequence of the swtchng functons. Snce the zero-sequence current s determned by the dfference n ther common-mode voltages for a sngle converter, the common-mode voltage does not cause any zero-sequence current because physcally there s no such current path. The zero sequence channel s actually an open crcut. Besdes, the common-mode voltage does not affect the converter control objectves, such as voltage regulaton and current control. Therefore, the zero-sequence channel s normally not consdered n the control desgn for a sngle converter. When the two converters are operatng n parallel, or the zero sequence path of the back-to-back system exsts, the zero-sequence current path s formed. A small dfference between the two common-mode voltages may cause a large zero sequence crculatng current, because the zero channel s an undamped crcut wth only nductors, and ther ESRs n practcal cases. L + L SU SU Fgure 3-6: The zero sequence path of the system The zero sequence of the swtchng functon for the swtchng frequency f c =3f s presented n Fgure 3-7. It could be notced that for the low values of the swtchng functons, the zero sequence current s more domnant. When the swtchng functons of the both sdes of the converter have the same value, the resultng zero sequence vector depends on the power flow through the converter. When the both sdes of the back-toback converter supply the common DC load (the thrd converter connected to the DC

41 3.3 ZERO SEQUENCE OF THE SYSTEM 7 bus), the zero sequence vector s equal to zero. If the back-to-back converter transfers the power from one sde to another, the zero sequence current has the maxmal value. m a, m b, m c (a) t(s). S (b) t(s) Fgure 3-7 Zero sequence of the swtchng functon S for f c =3f 3.3. Influence of the unequal swtchng frequences Assumng that the left sde of the back-to-back converter has the zero-sequence swtchng-functon S wth the frequency f c, and the rght sde of the converter has the zero-sequence swtchng functon S wth the frequency f c, the resultng zero sequence vector accordng to Fgure 3-7 wll contan the both frequency components. For the case when f c =45 Hz and f c = 3 45 Hz, the zero sequence current s shown n Fgure 3-8(a).

42 8 3 Analytcal descrpton of the -level converter 5-5 I (A) 5-5 I β (A) - - I β (A) (a) t(s) I α (A) U dc (V) 5 (b) I α (A) (c) 995 t(s) (d) Fgure 3-8: The steady-state soluton for the unequal swtchng frequences of the left and rght sde of the converter 3.3. Influence of the IGBT s dead-tme In addton to nvokng mnmum pulse wdth modulatons, dead tme has another detrmental effect whch occurs at every swtchng event. Ths effect can be examned by consderng one leg of the three-phase PWM nverter. Four possble commutaton sequences exst as shown n Fgure 3-9. The carrer rato s only three n order to llustrate ths effect more readly. Assumng that the lne current s postve and transstor T s swtchng from OFF to ON, whle transstor T transtons from ON to OFF after a slght delay Δt d. Durng the dead zone, D conducts and D blocks the current to the postve bus. The output voltage s clamped to the negatve bus whereas the transton to the postve bus s desred. Assumng next that the T transtons from ON to OFF, and T from OFF to ON, then D conducts and D blocks the current flow durng the dead zone. Ths condton results n the correct voltage beng appled to the output termnals.

43 3.3 ZERO SEQUENCE OF THE SYSTEM 9 Two addtonal condtons exst when the output current s negatve. Assumng that T transtons from OFF to ON and T from ON to OFF after slght delay. Durng dead zone D conducts and D blocks the current.. Ths condton leads to the desred voltage at the output termnals. The fourth condton s when T changes ts state from ON to OFF and T from OFF to ON. In the dead zone, D conducts and D blocks, makng the output voltage clamped to the postve bus. Ths condton results n a gan n voltage at the output termnals. t d T deal t d T deal T real T real Loss T ( >) Gan T ( <) Fgure 3-9 The steady-state soluton for the unequal dead-tme between phases One should note that the error voltage s n phase wth the current and therefore has the effect of addng the resstance n seres wth the load. Snce the error voltage pulses should result n equal and opposte voltage across the load, low frequency odd-harmonc components wll now appear across the load. The average voltage devaton over a half cycle of the nverter output s gven by: NΔtd U Δ U = dc (3.3) T where N s the number of swtchng per cycle, and T s one cycle perod. Snce the dead tme ncreases (decreases) the output voltage for the negatve (postve) half cycle current, the average voltage devaton can be represented as a square wave that has the magntude of Δ U. If the dead tme for the postve arm of the converter s equal to the dead tme of the negatve arm, the spectrum of ΔU contans the frst

44 3 3 Analytcal descrpton of the -level converter harmonc and odd harmonc components, and no DC value. Therefore, there s no zero sequence system exstng. If there s a dfference between the dead tmes td and td, the zero sequence wll appear n the lne currents and n the DC voltage. The dfferent cases of the unequal dead tmes are calculated by equaton (3.3). However, the sxth-cycle symmetry s not vald anymore. Therefore the half-cycle symmetry s appled. The equaton (3.6) becomes: ( π ) sn ( π ) ( π ) cos( π ) cos Ξ = (3.33) sn The results are shown n the followng fgures. A I (A) β A 5 I β (A) β A I β (A) (a) t(s) t /s I - α (A) - (b) α A u dc U dc (V) V I α (A) - - (c) α A t(s) t /s (d) Fgure 3- The nfluence of the IGBT s dead tme to the swtchng functon S

45 3.4 Concluson and dscusson 3 a, A 5 β A t /s α A β A α A u dc V t /s Fgure 3-: The steady-state soluton for the unequal dead-tmes n upper and lower arms 3.4 Concluson and dscusson The analytcal approach for analysng the steady-state of the -level converter, as an alternatve to the numercal teratve procedure, was developed and dscussed. The models developed for the rectfer and nverter operaton were concatenated n order to get the model for the back-to-back system. The equatons wrtten for the system between two swtchng tme nstants were transferred n the space-vector form. Also the zero-sequence was consdered. The equatons were solved n the state-space, and the steady-state soluton s obtaned. Both symmetrcal and asymmetrcal modes were analysed. The nfluence of the swtchng frequency was consdered and dscussed.

46 3 3 Analytcal descrpton of the -level converter The technque used a drect soluton of the steady-state followed by a drect soluton of the VSC harmoncs, thus avodng the numercal errors and convergence problems assocated wth teratve methods. Furthermore, the proposed method s capable of calculatng all uncharacterstc harmoncs assocated wth the operaton of a VSC under unbalanced system voltage or unbalanced nverter frng condtons. Dfferent unbalanced workng condtons caused by the asymmetrcal frng of the IGBTs are modelled, and the nfluence of ths effect to the lne currents and to the DC voltage s presented. All equatons have been solved usng the MATLAB scrpts, showng very low computatonal effort.

47 4 Analytcal descrpton of the modular multlevel converter 4. The general dea of the modular multlevel desgn Hgh-power converters for utlty applcatons requre transformers for the purpose of enhancng ther voltage and current ratngs. The use of lne-frequency transformers, however, not only makes the converter heavy and bulky, but also nduces the so-called dc magnetc devaton when a sngle-lne-to-ground fault occurs. Recently, many scentsts and engneers of power systems and power electroncs have been nvolved n multlevel converters ntended for achevng large-capacty power converson wthout transformers. Two of the representatves are: ) the dode-clamped multlevel converter (DCMC), and ) the capactor-clamped multlevel converter (CCMC). A three-level DCMC, or a neutral-pont-clamped (NPC) converter s already n practcal use. If the number of voltage levels s more than three n a DCMC, nherent voltage mbalance occurs n the seres-connected dc capactors, thus resultng n requrng an external balancng crcut (such as a buck-boost chopper) for a par of dc capactors. Furthermore, a sgnfcant ncrease n the clampng dodes requred renders assemblng and buldng of each leg more complex and dffcult. The smlar problems exst n a CCMC n terms of clampng capactors. To solve the mentoned problems, a modular multlevel converter has been proposed. Fgure 4- shows a crcut confguraton of a three-phase modular multlevel nverter. It s characterzed by each arm based on a module, each of whch s a stack of cascaded multple bdrectonal PWM choppercells shown n Fgure 4-. The modular multlevel converter s sutable for hgh- or medum-voltage power converson due to easy assemblng and flexblty n converter

48 34 4 Analytcal descrpton of the modular multlevel converter desgn, and therefore there s a bg opportunty of puttng t n the practcal use. The authors of []- [4], however, have made no detaled descrpton of starcase modulaton, especally about a crucal ssue of how to acheve voltage balancng, and ncluded no expermental result. Ths work deals wth a modular multlevel converter wth focus on ts control method and operatng performance. The am s to use the modular multlevel desgn as a medum-voltage power converter n a power ratng of to MVA, a dc-lnk voltage of to kv, and a swtchng frequency of to 3 Hz. Combnng averagng control wth balancng control enables the converter to acheve voltage balancng wthout any external balancng crcut. The deregulaton of nternatonal energy markets and the trend to decentralzed power generaton are ncreasng the demand for advanced power electronc systems. For ths applcaton feld multlevel converters wth arbtrary number of voltage levels seem to be the most sutable types, avodng the drect seres connecton of semconductors n combnaton. Besdes these ponts, a lot of other mportant aspects have to be taken nto account for these applcatons. Man techncal and economcal aspects for the development of multlevel converters are: Modular realzaton: - scalable to dfferent power- and voltage levels - ndependent of the state of the art of fast developng power devces Multlevel waveform: - expandable to any number of voltage steps - low total harmonc dstorton - dynamc dvson of voltage to the power devces Hgh avalablty: - use of approved devces - redundant operaton Falure management: - fal safe operaton on devce falures

49 4. The crcut confguraton and prncples of operaton 35 - avodance of mechancal destructon (hgh current magnetc forces and arcng) Investment and lfe cycle cost: - standard components - modular constructon 4. The crcut confguraton and prncples of operaton Fgure 4- llustrates a three-phase nverter based on the MMC. Each leg of the crcut conssts of a stack of n two-quadrant converters for bdrectonal current and two seral nductors. Each chopper-cell conssts of a dc capactor and two IGBT swtches that forms a bdrectonal chopper. For the purpose of the modular and scalable realsaton, the addtonal central components for example DC capactor lke n the - level converter should be avoded. The DC-lnk capactor of conventonal voltage source nverters presents an example of such a component ndependent of ts realzaton out of a number of seres connected capactors or not. The subsystems of the new concept are two termnal devces composed of swtches and a local DC-storage capactor. No addtonal external connecton or energy transmsson to the modules s needed, for full 4-quadrant operaton of the converter system. As t wll be showed latter, the modules can be consdered as an deal transformers wth the non-lnear transfer rato. Regardless of the sgn of the current a, the termnal voltage U x, of each module can be swtched to ether V or to the voltage U c. By swtchng a number of modules n the upper and lower arm, the output voltage s adjusted. A sutable and smple realzaton of the module s gven n Fgure 4-. The followng crcut equaton can be wrtten from Fgure 4-: n Udc = U + L( m+ m) (4.) = where, the U dc s a supply dc voltage, U s an output voltage of each chopper-cell, L s a seral nductance, and m and m are postve and negatve arm currents, respectvely.

50 36 4 Analytcal descrpton of the modular multlevel converter The voltage law loop gven by (4.) s referred to as the dc loop, whch s rrelevant to the load. L L L U man M an U mb M bn M cn a b Phase leg U ma M a U mb M b M c U dc Medum voltage network U ma M a U mb M b U mc M c L a b c Phase arm U man M an U mbn M bn U mcn M cn L L L Fgure 4-: Modular multlevel desgn The structure descrpton A sutable and smple realzaton of the module s gven n Fgure 4-. The nterface s composed solely of two electrcal termnals and one b-drectonal fbre-optc nterface. Ths reduces the costs for manufacturng and mantenance, too. The voltage of any module can be freely controlled by software. The ndvdual voltages of the modules may even be chosen unequal. Ths can be used to ncrease the number of resultng voltage steps (e.g. together wth PWM-operaton). In contrast to the conventonal voltage source nverter a common central capactve storage s for the concept of MMC dspensable. Ths advantage smplfes the protecton of the converter aganst mechancal destructon n case of a short crcut, sgnfcantly. In addton, a defectve

51 4. The crcut confguraton and prncples of operaton 37 module can be replaced by a redundant module n the arm by a control acton wthout use of the mechancal swtches. Ths results n an ncreased safety and avalablty. x T D c D C u c u x Fgure 4-: The basc module of the converter The module can operate n one of the sx states. For each state, the swtchng functon as well as the current path s determned. The states are llustrated n Fgure 4-3. Fgure 4-3: States and the current dstrbuton nsde the module

52 38 4 Analytcal descrpton of the modular multlevel converter 4.3 The analyss of the system wth one module per phase-arm The system wth one module per phase-arm s presented n Fgure 4-4. Ths s the basc confguraton of the modular multlevel converter and the calculaton performed for one module can be extended to the arbtrary number of modules. a T D b c T5 D5 L L T9 D9 C C C3 u P D T6 D6 T D uxa uxb u xc 3-Phase Network (u a, u b, u c ) L a b c R dc U dc a b c T3 D3 T7 D7 T D L L u N C4 C5 C6 T4 D4 T8 D8 T D uxa uxb u xc Fgure 4-4: The confguraton of the modular multlevel converter wth one module per phase-arm For the system presented n Fgure 4-4, the voltage and current equatons could be wrtten: u u u L + L + r + x P = (4.) u L L r ux+ un = (4.3) p x L L r r x N u u u + u = (4.4) = (4.5) where subscrpt denote the phase ( ( abc,, ) the phase voltages. For the rectfer operaton the DC voltage can be wrtten as: ), and the network voltages u, u, u are a b c

53 4.3 The analyss of the system wth one module per phase-arm 39 n up un Rdc = + =, and for the nverter operaton: up + un = Udc. The dfferental equatons for the capactor voltages and currents are: = C u ; = C c c c u c The voltage and current vectors n (4.)-(4.5) have the followng form: ua a a u = u b ; = b ; = b ; u c c c a = b c (4.6) For the module presented n Fgure 4-, the relaton between the module and capactor currents and voltages are: ca Sa a cb Sb c = = b cc Sc c (4.7) uxa Sa uca x = u xb Sb u = cb ux c Sc ucc u (4.8) for the upper arm, and uxa Sa uca x = u xb Sb u = cb uxc Sc ucc u (4.9) ca Sa a cb Sb c = = b cc Sc c (4.) for the lower arm. The transformaton matrx T αβ wll be ntroduced on the smlar way as n chapter 3:

54 4 4 Analytcal descrpton of the modular multlevel converter.5.5 T αβ = 3 3 In Addton, fort he purpose of the zero-sequence defnton, the transformaton matrx T wll be ntroduced as: [ ] T = The matrx T s defned as concatenaton of two prevously defned matrces Swtchng lnear tme varyng model of the MLM wth two modules per phase-leg Applyng the space-vector transformaton, the equatons (4.)-(4.5) obtan the form: αβ ( L+ L ) αβ L αβ r αβ r αβ + xαβ = u u αβ ( L+ L) αβ L αβ r αβ r αβ + xαβ = u u ux + ux L + L r 3R = (4.) (4.) (4.3) The equatons should be rearranged n the manner to sut the state-space representaton. ( ) ( ) αβ ( ) L L + LL + L+ L + L uαβ uxαβ uxαβ r L+ L rl = αβ αβ ( ) αβ ( ) x x ( ) Lu L + LL L+ L u + Lu r L+ L αβ αβ αβ αβ rl = αβ x x L r Rdc u + u 3 = (4.4) (4.5) (4.6),for the rectfer operaton, or x x L r Udc u + u 3 = (4.7) for the nverter operaton.

55 4.3 The analyss of the system wth one module per phase-arm 4 In order to complete the equaton set, the followng relatons between the capactor voltage and the leg current must be ntroduced. Based on the equatons (4.), the space-vector representaton s developed: xαβ = αβ cαβ u T S T u (4.8) ucαβ = TαβST αβ C (4.9) Now the complete equaton set can be wrtten n a state-space matrx form: x= Ax αβ uαβ A A5 A6 A αβ 7 A A5 A6 αβ A33 A35 A36 A 37 αβ = A 44 A45 A46 A5 A5 uc αβ uc αβ A63 A64 u cαβ A u 77 cαβ uαβ (4.) where the matrx coeffcents are havng the followng form: r A = A 33 = L LL + L+ L A A T S T 5 36 L LL αβ = = + L A A T S T 6 35 L LL αβ = = + L A 7 = L LL + 3R A = A 44 = L

56 4 4 Analytcal descrpton of the modular multlevel converter A5 = A6 = A45 = A46 = TS T L A = A = T S T 5 63 C αβ A5 = A64 = T ST C A 77 = ω Snce the soluton of the exact VSC equatons depends on the swtchng methodology, a specfc swtchng pattern must be specfed before analyss s carred out. The soluton of the dfferental equatons set (4.), s gven n the followng form: M e tn ( tn tn ) e tn ( tn tn )... e ( t t t M M x = ) x (4.) ( ) n where M..M tn are the matrxes of the egenvalues of the system for the ntervals (t - t.t n -t n- ). ( ) The steady-state soluton of the swtchng model The perodc soluton of x(t), s found by statng that the state-vector after a complete perod T, must equal the ntal state x(): ( t + T) = ( ) = ( ) x Φtot x x (4.) Or n other way: ss ( π ) = ( ) x x (4.3) ss The analyss of the space-vectors can be done by plottng the solutons usng the formulatons(4.). From the space-vector plot, t can be concluded that the perod of symmetry of π π exsts. Over the nterval, the steady-state equatons can be 3 3 derved to be: where: π x = Θ x ( ), (4.4) 3 Θ= dag( Ξ Ξ Ξ Ξ Ξ ) ; (4.5)

57 4.3 The analyss of the system wth one module per phase-arm 43 and T s the π transformaton matrx wrtten n the form: 3 π π cos sn 3 3 Ξ = (4.6) π π sn cos 3 3 Consequently, only a thrd of perod analyss s requred to determne the steady-state operatng pont of the modular multlevel converter wth one module per phase-arm. Imposng the steady-state constrant equaton on the dynamc soluton equaton yelds: ( ) ( ) Θ Φ x (4.7) tot ss = Parttonng ths equaton gves: ( ) ( ) E F x ss = G H z (4.8) where xss() s the steady-state soluton of the system states, and z() s the ntal condton of the grd voltage. The matrxes E, F, G, H represent the parttons of the matrx A from equaton (4.). The fnal soluton s gven by the followng expresson. ( ) = ( ) y E F z (4.9) 4.3. The steady-state soluton examples From the state vector y, all converter voltages and currents can be derved. By usng the space-vector of the network voltage z, t s possble to generate symmetrcal as well as asymmetrcal operatng ponts. It s possble to analyse the nfluence of the crcut parameters and the swtchng frequency as well. In the followng examples, the power flow of MW, wth kv capactor voltage s presented. The module capactors are chosed to have the value of mf. The dfferent operatng ponts are analysed depended from the arm nductance L. The nductance L res s formally ntroduced to mark the value of the arm nductance when the system reaches the resonance frequency of the f n.

58 44 4 Analytcal descrpton of the modular multlevel converter The case wth the L >>L res At Fgure 4-4, relatve hgh value of the arm nductance s used. Presented are the space-vectors and the waveforms of the lne as well as of the arm currents. β A abc A α β, A5 A a, A 5 t /s α, A t /s Fgure 4-5: The space-vectors and the tme waveforms of the lne current (up) and arm currents (down), when L >>L res From the Fgure 4-5 t can be seen that the arm current conssts of the DC offset and the frst harmonc. The hgher harmoncs are damped due to the arm nductance. The o symmetry of the space-vector can be seen. The waveforms of the capactor voltages as well as the DC voltage are presented n Fgure 4-6.

59 4.3 The analyss of the system wth one module per phase-arm 45 u c, V u dc V t /s t /s Fgure 4-6: The module capactor voltages (left) and the DC voltage (rght) when L >>L res The case wth L =L res / The followng example llustrates the case when arm nductance has the lower value. Snce the connecton of the converter arms represent low-damped LC crcut (damped only wth the losts n the arm nductance and losts n semconductors), t s to expect that the arm current contans the harmoncs determned by the values of the LC crcut. It wll be shown later that the resonant frequency depends also from the modulaton ndex m. From the space-vectors and waveforms of the arm current, t can be concluded that the ampltude s much hgher than n the prevously descrbed case. The arm current contans the nd and the 4 th harmonc addtonally to the DC and the st harmonc. The capactor voltage waveform and the DC voltage waveform are presented n Fgure 4-8. Observng the Fgure 4-8, t can be concluded that the capactor voltage has a smaller devaton from the DC value n comparson wth the prevously descrbed case.

60 46 4 Analytcal descrpton of the modular multlevel converter β A abc A α A β, a A t /s, A α, A t /s Fgure 4-7: The space-vectors and the tme waveforms of the lne current (up) and arm currents (down), when L =L res / u c, V 5 u dc V t /s t /s Fgure 4-8: The module capactor voltages (left) and the DC voltage (rght) when L =Lres/

61 4.3 The analyss of the system wth one module per phase-arm The current dstrbuton nsde the module The followng Fgure represents the current dstrbuton nsde the module. The module current drecton and the swtchng states determne whether the dodes or the IGBTs are n conductng state. For the postve arm current and the swtchng state on, the dode D conducts. For postve arm current and the swtchng state off, the IGBT s conductng. Analogue, t can be derved for the two remanng swtchng elements and the negatve arm current. Analytcally, the equaton for the current dstrbuton nsde the module can be wrtten as a functon of the arm current and the swtchng functon. These relatons are gven n (4.3)-(4.33). x T T D D c S C T D D Fgure 4-9: The current dstrbuton nsde the module T D x x = S (4.3) x + x = S (4.3) ( S ) x x T = (4.3) + ( S ) x x D = (4.33)

62 48 4 Analytcal descrpton of the modular multlevel converter T D A A T D A A t / s Fgure 4-: The currents of the IGBTs and dodes when L =L res Ths soluton makes possble to compare dfferent operatng ponts, and to optmze the operaton lke power factor, capactor voltage etc. In Fgure 4- and Fgure 4-, two dfferent operatng ponts are presented. The table below gves the RMS and mean values of the module currents. From the fgures t could be seen that the operatng pont wth L =L res, offers the more equal use of the semconductors. Snce the current through the IGBT T s the man lmtng factor for the module desgn, the man optmzng task would be to fnd the pont where ths current has a mnmal value. T D A A T D A A Fgure 4-: The currents of the IGBTs and Dodes for L=L res /5 t/ s

63 4.3 The analyss of the system wth one module per phase-arm 49 Table 4.: Comparson of the mean and the RMS values of the semconductor currents for two dfferent values of L I T (A) I D (A) I T (A) I D (A) Case (RMS) Case (Mean.) Case (RMS) 5 69 Case (mean.) The frequency-doman analyss of the Modular multlevel converter The analyss n the frequency-doman can be performed by representng the currents, voltages and swtchng functons from equatons(4.6), (4.7) and (4.8) wth equvalent Fourer seres. x (jω) T m(jω) D c (jω) C u x (jω) D Fgure 4-:The basc module used for the frequency-doman calculaton For the module current x, the equvalent Fourer representaton can be wrtten n the followng form: Ix n jkωt = Ik e k= n (4.34) It s assumed that for the harmonc number k > n, the ampltude of the harmoncs s zero. The same representaton can be wrtten for the swtchng functon S. In the

64 5 4 Analytcal descrpton of the modular multlevel converter averaged model, the swtchng functon whch s dscontnuous n nature, s substtuted wth the modulaton functon m. For that functon the Fourer representaton s wrtten: M n j ( jω) = M e l= n l ωlt (4.35) Agan s assumed that for the harmonc numberl > n, M ( lω ) =. From equaton (4.7) and Fgure 4-, usng the representaton(4.34), and (4.35), the expresson for the capactor current s wrtten: n n n n jωkt jlωt ( j ) e e e j( k+ l) ωt I ω = M I = I M = I M (4.36) c x k l k l k= nl= n k= nl= n For the proper operaton of the converter, the DC component of the capactor current must be zero. Ths condton s satsfed when: I = k+ l cdc Further, the expresson for the capactor voltage obtans the followng form: j ( ) ( k+ l j e ) ωt Uc ω = IkMl + Uc ( ) (4.37) j k l ωc k l ( + ) Here, the ntal condton of the capactor voltage must be taken nto account. Usng the equaton(4.8), the representaton n frequency-doman obtans the followng form: U ( k l m) t jm t x ( j ) k l me c () me j( ) I M M ++ ω k l C U M ω ω = + (4.38) + ω k l m m Parttonng the (4.38) gves followng matrx representaton: U C n, n C n, C x n n, n I x n U x = C, n C, C, n I x U xn C I n, n Cn, C n, n xn (4.39) where the coeffcents:

65 4.3 The analyss of the system wth one module per phase-arm 5 C, = l Ck, = MlMm j( k+ l) ωc ; [ ] m MlMm j( k+ l) ωc ; [ ] l m ( n... n, k =, l = m) (4.4) ( k, n... n, = k, l+ m= k) (4.4) represent the partal mpedances of the module presented n Fgure 4-. It s mportant to notce that the partal mpedances are the functon of the modulaton ndex. In other words, for the same crcut confguraton and the same current reference, the output current spectrum s functon of the modulaton ndex m. The equatons (4.) and (4.3) n a frequency-doman representaton, obtan the form: a ( jω) jω ( ) a ( jω) xa ( jω) ( ) ( ) = U L+ L I + U jωl I jω R I jω U a a a dc ( jω) jω ( ) a ( jω) x ( jω) ( ) ( ) + = U L+ L I U jωl I jω R I jω U a a dc (4.4) (4.43) Substtutng (4.39) n (4.4) and (4.43), the matrx representaton of the followng form s obtaned. Ua Z Z Ia = Ua Z Z Ia (4.44) The coeffcents Z,Z,Z,Z are derved usng the (4.39), (4.4) and (4.4), and have the followng form: Z ( ) C n, n+ R jnω L + L C n, C nn, = Z = C, n C, + R C, n Cn, n Cn, C n, n+ R+ jnω ( L + L) (4.45)

66 5 4 Analytcal descrpton of the modular multlevel converter Z jnω L = Z = jω L jnω L (4.46) The voltage vector s a dfference between the network voltage and the ntal condton of the capactor voltage. ( ) j U U U c M m e m ω = t (4.47) m The equaton (4.44) completely descrbes the one phase of the modular multlevel converter n frequency-doman. Performng the same operatons for other two phases, t s possble to get the full equaton set n a frequency-doman: Ua Ia Z = Z Z3 Uc Ic (4.48) Snce the current vector n the equaton (4.48) s varable, and the voltage vector can be defned n advance, more sutable representaton s to use Y matrx nstead of the Z matrx. The Y matrx represents the nverson of the Z matrx gven n equaton (4.48). I a Ua Z = Z = Y U c Z I 3 Uc (4.49) The Y matrx descrbes the nfluence of each voltage harmonc to the current harmonc spectra. It contans the nformaton of the resonance pont, and can help fndng the optmal operaton pont of the converter. In the followng examples a few characterstc operatng ponts are descrbed.

67 4.3 The analyss of the system wth one module per phase-arm The resonance phenomena The MW rectfer operaton s consdered lke n the prevous secton. The nfnte fne swtchng functon s assumed, meanng that the modulaton ndex spectrum contans only the DC component and the frst harmonc. Ths smplfes the equaton (4.39) to: U C n, n C n, n C x n n, n I x n U x = C, C, C, C, C, I x U xn C I n, n Cn, n C n, n xn (4.5) The matrx of the partal mpedances s a Hermtan matrx, meanng that t s a square matrx wth the complex entres whch s equal to ts own conjugate transpose. It s to notce that varaton of the arm nductance brngs the sgnfcant changes to Y matrx. From the system symmetry t s possble to conclude that all even harmoncs are closed nsde the converter, and only odd current harmoncs flow nto the network. Snce the modulaton functon contans only the frst harmonc, the resonance of the second harmonc that flows only nsde the converter s possble. Usng the equaton(4.49), the ampltude of the second harmonc arm current s calculated as a functon of the arm nductance. The results are shown n Fgure 4-3:

68 54 4 Analytcal descrpton of the modular multlevel converter I( ).5I() ϕ( ) π L res r e s L π L res r e s Fgure 4-3: The second harmonc ampltude and phase n the functon of the arm reactance L L From Fgure 4-3, t could be seen that for L =L res the second harmonc of the arm current has a resonance. At the resonance pont, the coeffcents of the Y matrx, as well as the harmonc content of the arm current s represented n Fgure 4-4. Y j (, ) I a k I a ( (A) ) 3 j k Fgure 4-4: The system admttance and the arm current spectra at the resonance pont Snce the second harmonc of the arm current makes sgnfcant changes to the capactor voltage, mplctly t has the nfluence to the network current also. The waveforms of the arm current as well as the network current are shown n Fgure 4-5. The

69 4.3 The analyss of the system wth one module per phase-arm 55 dsturbances at ths pont are sgnfcant, whch brngs the concluson that ths operatng pont s absolutely not allowed. a A I a (A) t(s) (a) t /s a A 4 I a (A) 4 t(s)..4 t /s Fgure 4-5:The lne current waveform (a) and the arm current waveform (b) at the resonance pont Optmal operatng pont n terms of IGBT s current As shown n the prevous secton, the current dstrbuton nsde the module s not balanced. Snce the module current contans the sgnfcant DC component, the current ntegral of the upper par IGBT-Dode s much larger then the current ntegral of the lower IGBT-Dode par. From the Fgure 4-3t could be seen that the second harmonc of the arm current changes ts phase at the resonance pont. The dea s to choose the approprate value of the second harmonc of the arm current n order to mnmze the dfferences n the current ntegrals for the postve and the negatve half-perod. For the L =L res, the Y matrx coeffcents and the spectrum of the arm current are represented n Fgure 4-6.

70 56 4 Analytcal descrpton of the modular multlevel converter Y j (, ) 8 I a ( k ) 7 j k Fgure 4-6: The system admttance and the arm current spectra at the optmal operatng pont The waveforms of the lne current as well as the arm current are shown n Fgure 4-7. From the waveforms t could be notced that the peak value of the arm current n the postve halve perod s sgnfcantly lower. The results obtaned by the calculaton n the frequency-doman are comparable to the results obtaned n the tme-doman. a A I a (A) t(s) t /s a A I a (A) (a). t(s).4 t /s Fgure 4-7: The lne current waveform (up) and the arm current waveform (down) at the optmal operatng pont

71 4.3 The analyss of the system wth one module per phase-arm The short crcut operatng pont The short crcut s represented by the very low value of the network voltage. The modulaton ndex s chose n order to keep the frst harmonc of the current at the nomnal value. The crcut confguraton remans the same, only the modulaton ndex dffer the short crcut case from the nomnal operatng pont. Snce the partal mpedances n (4.39) are hghly dependable of the modulaton ndex, t can be concluded that the resonance pont at the short crcut case s dfferent from the resonance pont at the nomnal operaton, wth the same crcut confguraton. The coeffcents of the admttance matrx and the arm current spectrum for L=L res /5 are presented n Fgure 4-8. Y(, j ) 5 I a ( k ) I a (A) A 8 j k Fgure 4-8: The system admttance and the arm current spectrum when short-crcut occurred The calculaton wth the fnte swtchng frequency In the realty, the swtchng functon has a fnte frequency, and has an nfluence to the system admttance. The partal mpedance matrx contans not only the coeffcents C,,,, k C, C + as n (4.5) but also the coeffcents C, + k, C, + k, C + + where k s the coeffcent n the spectrum of the swtchng frequency. Performng the operatons gven by equatons (4.4) (4.49), the admttance matrx coeffcents, as well as the spectrum of the arm currents can be calculated. The waveforms of the lne current as well as the arm current are gven n Fgure 4-9. The partal mpedance matrx obtans the form:

72 58 4 Analytcal descrpton of the modular multlevel converter Z C- n,-n C- n,-n+ k = C, k C, C, k Cnn, k Cnn, (4.5) For the swtchng frequency, the 7 th harmonc s assumed. From the waveform t could be seen that the swtchng frequency has more nfluence to the arm current than to the lne current, because, due to the system symmetry, the even harmoncs are closed nsde the converter. The system admttance coeffcents and spectrum of the arm currents are presented Fgure 4-. The arm nductance s chosen to be equal to % of the resonance nductance. a A I a (A) t(s)..4 (a) t /s I (jw) a A I a (A) t(s)..4 t /s Fgure 4-9: The lne and the arm current waveform for the L =L res /

73 4.4 General case of the modular multlevel converter Y(, j ) 4 I a ( k ) 4 j 3 4 k Fgure 4-: The system admttance and the current spectra for L =L res / 4.4 General case of the modular multlevel converter The modular multlevel converter conssts of the arbtrary number of the basc modules connected n cascade. The modular multlevel converter n a back-to back confguraton s shown n Fgure 4-. The general conclusons made for the converter wth one module per phase-arm, could be extended to the converter wth arbtrary number of modules. For the converter wth n modules per phase-arm, the state vector wll be extended for the 6n capactor voltages. For the medum-voltage applcaton, the reasonable number of the modules would be between and, dependant from the power ratng and from the mplemented semconductors.

74 6 4 Analytcal descrpton of the modular multlevel converter Network (ua,ub,uc) L L L L Cn Cn Cn Cn uxan uxbn uxbn =( n) a b c =( n) uxa L C C C Cn Cn uxb uxc Load a, b, c Rdc Udc L L L Lc C C C uxa uxb uxc =( n) a b c =( n) Cn Cn Cn Cn uxan uxbn uxcn L L L Network (ua,ub,uc) Fgure 4-: The back-to-back connecton of the modular multlevel converter wth n modules per phase-arm

75 4.4 General case of the modular multlevel converter The swtchng tme varyng model of the general MMC converter As a bass for the calculaton of the states of the modular multlevel converter wth arbtrary number of modules, the results obtaned n secton 4. wll be used. The expresson (4.8) wrtten for the n modules, obtans the followng form: L L L C n C n u xan u xbn u xbn =( n) a b c C C C Network (u a,u b,u c ) u xa L u xb u xc a, b, c Fgure 4-: The descrpton of the modular multlevel converter wth n modules per phase-arm a ca xαβ = Sbju cbj j k S u S u ck cck u T (4.5) The total voltage of the n seral connected modules s equal to the sum of the separated module voltages. Each capactor voltage can be separately controlled and therefore becomes the system state. The new state vector contans the space-vectors of the arm currents, all capactor voltages and the space-vector of the network voltage. It s presented n(4.53). T = αβ αβ uca ucan ucb ucbn ucc uccn uαβ y (4.53)

76 6 4 Analytcal descrpton of the modular multlevel converter The calculaton wth the total voltage as a system state, nstead of the vector of the ndvdual voltages, would brng the conformance wth the calculaton of the system wth one module per phase-arm. The man problem s that the ntal condton at a tme nstant τ + s not equal to the condton at a tme nstant τ. ( τ ) ( τ ) x x (4.54) + Therefore the calculaton wth the extended matrx y, s more sutable. Assumng that the system s lnear between two swtchng nstants τ and τ, for the output vector y, t could be wrtten: ( τ ) ( ) y y y (4.55) = τ +Δ The dfference n the output vector y, between two swtchng nstants can be calculated usng the dfference n the state vector x. Assumng that all capactors have the same values, the voltage s dstrbuted over S modules. Snce the module voltage change occurs only when the module s swtched on, the followng expresson can be wrtten: S Δ u a c = Δuc Sa (4.56) Introducng the matrx G as a relaton between the state vector and the output vector, the followng expressons could be wrtten: where ( ( τ ) ( )) Δ y = G x x (4.57) τ

77 4.4 General case of the modular multlevel converter 63 I5x5 S a Sa San S a Sb S b G = S bn Sb S c Sc Scn Sc Ix (4.58) The arm currents and the network voltages are drectly transferred from the state vector nto an output vector. The soluton of the state vector can be agan found usng the matrx of the egenvalues of the system between two swtchng nstants. M e ( τ τ x τ = Φ x τ = ) x τ (4.59) ( ) ( ) The coeffcent ( ) ( ) M ( τ -τ ) n (4.59) represents the matrx of the egenvalues, and e τ. x τ represents the state vector at tme nstant The matrx that descrbes the system behavour between two swtchng nstants can be wrtten n the followng form:

78 64 4 Analytcal descrpton of the modular multlevel converter αβ uαβ A A5 A6 A αβ 7 A A5 A6 αβ A33 A35 A36 A 37 αβ = A 44 A45 A46 A5 A5 ucαβ ucαβ A63 A64 u cαβ A u 77 cαβ uαβ (4.6) The only dfference between equatons (4.) and (4.6) s n the followng coeffcents: 5 63 C αβ = = A A T S T (4.6) 5 = 64 = C A A T S T (4.6) Instead of havng one swtchng functon lke n equaton(4.), now the sum of the swtchng functons of the one phase-arm s used. The state vector at the tme nstant τ can be calculated startng from the ntal condtons of the output vector. The operaton of fndng the state vector from the output vector represents the nverson to the procedure descrbed by (4.57). ( τ ) = ( τ ) x Γ y (4.63) The matrx Γ descrbes the relaton between the state and the output vector at the tme nstant τ. I5x5 Sa S an Γ = Sb Sbn Sc Scn I x (4.64) Substtutng (4.57), (4.59) and (4.63) at (4.55) the expresson for the output vector at tme nstant t, t could be wrtten as:

79 4.4 General case of the modular multlevel converter 65 ( τ ) = ( τ ) + ( ) ( τ ) y y G Φ I Γ y (4.65) The soluton of the (4.65) s recursve and can be found for each tme perod. For the purpose of the smplcty, the matrx ( τ ) = ( ) τ Ψ s ntroduced. y Ψ y (4.66) ( ) Ψ = I+ G Φ -I Γ (4.67) Calculatng the matrx Ψ for each tme perod between swtchng nstants τ-τ -, the soluton n closed form for the output vector y at an arbtrary tme nstant can be found as: ( τ ) = ( ) y Ψ Ψ Ψ Ψ y (4.68) The steady-state soluton The steady-state soluton s found when all the values of the output vector return to ther ntal condton after tme perod T. ( + ) = ( ) = ( ) y t T tot y t y t Ψ (4.69) The perod T for the converter wth n modules per phase-arm s gven as: T = n T where T s the base 5 Hz perod. Parttonng the Ψtot matrx nto four sub matrxes, and applyng the operaton smlar to (4.8) the steady-state soluton can be found: ( ) ( ) E F y = G H z ( ) = ( ) (4.7) y E F z (4.7) The case wth multlevel PWM The swtchng functon of the multlevel PWM s presented n Fgure 4-3. Presented s the snusodal natural PWM technque. The modulaton functon s compared wth multple carrers and the resultng swtchng acton s generated as:

80 66 4 Analytcal descrpton of the modular multlevel converter c c c 3 c 4.. t / s Fgure 4-3: The swtchng functon of the snusodal natural PWM for n=3 S sgn m C = ( + ( )) where (...n ) k, k, k ( a, b, c) Ths modulaton technque does not provde balanced usage of the swtchng devces. Therefore addtonal technques must be mplemented n order to keep balanced operaton. In practce realsed soluton s to measure the capactor voltages and the arm currents, and to use them as crtera for the swtchng functons. The sorted look-up table of the capactor voltages s made and the number of the swtchng devces that should be swtched on s determned. Dependent from the arm current drecton, the devces are swtched on n order defned by the look-up table The case wth full block swtchng When the full block swtchng technque s used, the modulaton functon s compared to the n advance predefned constant values. These values are the functon of the number of levels n the phase-arm n. 3 3 c = + + n n n n The swtchng functons are agan defned as:

81 4.4 General case of the modular multlevel converter 67 = ( + sgn ( )) where (... n ) Sk, mk C, k ( abc,, ) (4.7) The addtonal balancng technque must be agan provded n order to obtan the equal usage of the swtchng devces. S t /s Fgure 4-4: The waveform of the block swtchng The balanced operaton could be obtaned by crcular shftng of the elements of the vector c. Each tme the swtchng acton occurs, the elements of the vector c are shfted one place to the rght. The excepton s when the sum of the swtchng functons s zero. Then the shftng of the elements should not be performed. Ths technque s descrbed n Fgure 4-5. S S S 3 S t/ s Fgure 4-5:The swtchng functon descrpton that equals capactor voltage waveforms

82 68 4 Analytcal descrpton of the modular multlevel converter Presented s the 4-level converter. The symmetrcal operaton s obtaned after 4 cycles. Performng the calculatons (4.5)-(4.7), and usng (4.7) as a swtchng functon, the followng results are obtaned. u c V 3 U c (V) a b c,, A I a (A), I b (A), I c (A) 9 8 t(s) (a) - t(s) t /s (b) t /s β A 5 I β (A) * a A 5 I T,I D,I T,I D (A) -5-5 I α (A) (c) α A - t(s) (d) t /s Fgure 4-6 The capactor voltages (up left), lne currents(up rght), space-vector and nstant values of the arm currents (down) In Fgure 4-6 the capactor voltages of the modules are presented. It could be seen that the same operaton s obtaned for all modules The nfluence of the unequal capactor values When the capactors have the unequal values, t can brng the unsymmetrcal behavour. The equatons of the system reman the same, and only the followng parameters of the matrx (4.6) are changed.

83 4.4 General case of the modular multlevel converter C αβ A = A = T S T (4.73) 5 = 64 = C A A T S T (4.74) Snce the capactors are no longer equal, each capactance must go nto the sum and must be ndvdually consdered. The case when capactance C has % tolerance, and capactor C has tolerance of -%, s presented n Fgure u c V U c (V) abc A I a (A), I b (A), I c (A) 8 - t(s) (a) t /s β A 5-5 I β (A) I α (A) - - (c) α A t(s) (b) t /s I T,I D,I T,I D (A) * a 5 A -5 - t(s) (d) t /s Fgure 4-7:The case wth unequal capactor values: The capactor voltages (up left), lne currents (up rght), space-vector and nstant values of the arm currents The voltage of the capactor C s % lower and the voltage of the capactor C s % hgher than the other capactance voltages The averaged model For the frequency-doman analyss of the modular multlevel converter wth n modules per phase-arm, t s assumed that the balancng operaton of the capactor voltages

84 7 4 Analytcal descrpton of the modular multlevel converter occurs deally fast, meanng that each module capactor has the same voltage waveform. Then the complete system can be represented as the equvalent system wth one module ω per phase-arm and the modulaton functon m= M e whch has the same n l= n spectrum as the swtchng functon defned n the secton.4.. and The case of the modular multlevel converter wth 8 modules per phase-arm, and mplemented multlevel PWM, s presented n Fgure 4-8. l j lt I a (A) I a (A) a A a A t(s) t(s) (a) t /s (b) t /s Y(, j ) 5 Y I a ( k ) 8 I a (jω) 4 j 4 6 k n Fgure 4-8:The lne and the arm current (up), the admttance matrx and the current spectrum of the modular multlevel converter wth 8 modules per phase-arm The smulaton results In order to verfy analytcally obtaned results, the smulaton model of the system presented n Fgure 4-4 s developed. The closed loop control for the proposed system s developed and mplemented n order to smulate dfferent operatng ponts. The thermal behavour of the semconductors s modelled usng the software tool PLECS. In ths

85 4.4 General case of the modular multlevel converter 7 example, the MW nverter operaton was smulated usng the Infneon module FFR7KE3. Observng the phase-leg current waveform and juncton temperature of the module IGBTs and Dodes, t can be concluded that about -5 % better performance s obtaned when the phase-leg current contans the second harmonc wth 5 % of the fundamental than the case when only fundamental and DC component exst. The results of the smulaton are presented n: a A T o C 8..3 t /s..3.4 t /s Fgure 4-9: (a )the current of the phase-leg for L>>Lres(blue) and L=Lres (green), (b) the juncton temperature of the IGBTs(up), dodes(down) Concluson and dscusson The analytcal descrpton of the modular multlevel converter s presented. Dscussed are the analyses n tme as well as n frequency-doman. The steady-state soluton n closed form s found. By performng the analyss n the tme-doman, the steady-state of the module capactor voltages as well as the steady-state of the arm and lne currents s found. Addtonally, usng the swtchng functons and the current vector, the current dstrbuton nsde the module s calculated. Snce ths approach represents the exact modellng of the voltage source converter, the results obtaned for the currents of the swtchng devces, can be used for the calculaton of the conductng and swtchng loses. The dfferent operatng ponts are dscussed n connecton to the arm nductance value as well as n the connecton wth the swtchng frequency. Consderng the deal swtchng functon, the resonance pont for the second harmonc s defned. It was shown that ths pont must be avoded n order to obtan stable operaton of the converter. It s also ponted that the second harmonc can be used to obtan the optmal

86 7 4 Analytcal descrpton of the modular multlevel converter current dstrbuton nsde the modules. Wth the approprate choce of the arm nductance, t s shown that the converter s mnmum 5 % better exploted. The calculaton n tme-doman s supported wth the analyss n the frequency-doman. The partal admttance matrx s developed, and the nfluence of the crcut confguraton as well as the nfluence of the modulaton functon to the converter performance s analysed. The results obtaned n the frequency-doman correspond to the results obtaned n the tme-doman. Also the dfferent modulatng technques are presented and dscussed The analyses are performed startng from the basc confguraton wth one module per phase-arm, and extended to the arbtrary number of modules. The results obtaned, show that the presented confguraton can be used n varety power ranges n the medumvoltage networks.

87 5. The problem defnton and system structure 73 5 Connecton/Reconnecton of the voltage source converter to the power network The problem of the connecton of the voltage source converters to the power network exsts when the converter transformer s energzed from the converter sde. Ths chapter deals wth the man problems of the transformer energzng, and proposes the procedure for the nrush elmnaton, smultaneously mnmzng the connecton perod. 5. The problem defnton and system structure The man confguraton of the converter s shown n Fgure 5-. It s assumed that the DC voltage exsts at the DC bus, and that the transformer should be energzed usng VSC. Durng that process, some of the followng crcumstances must be taken nto account: The resdual flux The DC premagnetzaton The angle of the appled voltage u dc c c dc VSC ac L, r Crcut breaker 3-Phase Network u ac u Tr u G Control Fgure 5-: The confguraton when the converter transformer s energzed by the VSC The resdual flux n the transformer s the flux that exsts n the transformer after ts deenergzaton (Fgure 5-). Ths value s not easy to be measured, but some ndrect technques are descrbed n the lterature. One of them presented n lterature s based on the measurement of the voltage ntegral durng deenergzaton. The one, used n the present work s based on the measurement of the DC value of the magnetzaton current

88 74 5 Connecton/Reconnecton of the voltage source converter to the power network durng the frst few cycles of the energzng. Snce the maxmal resdual flux that can exst n transformer s about 75% of the nomnal value, the appled voltage durng the process of the resdual flux determnaton should be about % of the nomnal voltage, to ensure lnear operaton of the transformer. 5.. Resdual flux determnaton The resdual flux at the transformer can be ndrectly measured durng the transformer startup. The magnetzng current that flows through transformer wndngs wll have a small offset value I that s n correlaton wth the resdual flux n the correspondng lmb. The other factor that can have an nfluence on the estmated flux s the angle of the appled voltage φ(v). Φ r = f ( I, ϕ ( v )), wth Imax I I mn = From Fgure 5- and some geometrcal calculatons, the followng equaton can be wrtten: di Φ + I + I = I dφ r c c (5.) whch gves: dφ Φ r = I (5.) di

89 5. The problem defnton and system structure 75 Φ I max I mn Φ r -Ic Ic I Fgure 5- The smplfed hysteretc characterstc for resdual flux determnaton The appled voltage wll brng some flux offset to the measured current. That offset s most depended to the voltage angle at the zero tme nstant. That offset can be calculated based on the followng formula: π ( ) Φ φ = u ωt+ φ dωt (5.3) Fnally the resdual flux can be descrbed as: π dφ Φ r = I u( ωt+ φ) dωt (5.4) di Based on the magnetzng characterstc of the transformer (Fgure 5-3), whch can be modeled as a lnear, arctan, or tanh functon, and the frng angle correcton factor, the resdual flux can be estmated. The dfference between the startng and the hysteretc curve wll gve the small offset n calculaton, but that effect s not domnant for ths calculaton.

90 76 5 Connecton/Reconnecton of the voltage source converter to the power network I β I α Fgure 5-3- Magnetzng characterstcs of the transformer and premagnetsaton n β- axs Φ mag Φ r Φ dc I dc I mag The problem of the DC premagnetzaton occurs when the frng of the IGBT-s, s not deal. When no zero sequence exsts, two extreme stuatons can be found: Rdc Sdc.5 = dc Tdc.5 (5.5)

91 5. Possble solutons for the nrush elmnaton 77 and Rdc Sdc = dc Tdc (5.6) where the equatons represent premagnetzaton at α- and β-axs. The typcal nrush current, caused by the DC-premagnetsaton from equaton (4.6) s shown n Fgure Possble solutons for the nrush elmnaton In the case when no resdual flux exsts, the nrush can be mnmzed by rampng up the converter voltage. The ampltude of the flux when rampng up the voltage space-vector of the converter accordng to: uc t t e j ω( t t = u ) n (5.7) T R results n: Φ jω( t t ) ( t t) = e + Φ jt ωt ωt n R R R (5.8) The evaluaton of the frst dervatve shows that extreme values are located at t=t +k T, as well as at t=t and t=t +T R. The absolute maxmum wll be reached at t=t+tr, whch results n: Φ Φn jωt e R je jωtr ωtr = (5.9) The frst term represents the addtonal resdual flux, whereas the second term corresponds to the statonary flux at the consdered tme pont. The magntude of the frst term s gven by: ΔΦ Φ n = jωt R e ωt R (5.)

92 78 5 Connecton/Reconnecton of the voltage source converter to the power network It can not be ensured by the control of the converter to gude the flux to the mnma under all condtons. Thus the local maxma should be used as desgn crtera. The results of the equaton (5.) for dfferent values of the tme T R are:. two cycles (T R =.4s):.%. fve cycles (T R =.s): 5.8% 3. ffty cycles (T R =s):.54% Fgure 5-4: The deal magnetzng of the transformer wth ramp up functon In the systems where the seral resstance has very low value, meanng that the dampng of the system s very low, the nrush current wll flow caused by exstence of ether resdual flux or DC premagnetzaton. The equaton for one phase, that descrbes behavor of the transformer, s: t t Φ d un sn ( ωt+ φ) = R( t) + L+ TR dt (5.) where R and L are the parameters of the flter nductance. Φ If the transformer magnetzng characterstc s defned as a snh functon, ths equaton can be solved numercally, usng the standard teratve procedure. If the resdual flux exsts, and for the low value of the R, the numercal results of the equaton are gven n Fgure 5-5.

93 5. Possble solutons for the nrush elmnaton 79 abc a b c..4 t /s Fgure 5-5: The nrush current caused by resdual flux when ramp up functon appled In addton to ths dsturbance, n converter systems, the mprecse frng of the power electroncs devces s also possble. The dsturbance caused by mprecse frng can be descrbed as a voltage offset, or voltage drft. For the transformer flux analyss, the voltage offset can cause more dangerous stuaton. The equaton (5.) s expanded as follows: t t Φ d un sn ( ωt+ φ) + Udc = R( t) + L+ TR dt (5.) The equaton s solved agan usng the standard numercal ntegraton procedures, and the results are shown n Fgure 5-6. abc a b c..4 t /s Fgure 5-6:The nrush current caused by DC unbalance when ramp up functon appled

94 8 5 Connecton/Reconnecton of the voltage source converter to the power network 5.. Ramp-up functon wth voltage feedback: If the control s realzed wth the voltage feedback, the feedback wll try to mantan the value of the transformer termnal voltage, and to avod the dampng. Ths effect would support the nrush current. Assumng that the voltage controller s a proportonal controller wth the factor K p, the equaton (5.) can be extended as follows: t t Φ d Kp un sn ( ωt+ φ) utr = R( t) + L+ TR dt (5.3) It could be shown that, constant K p wll multply the dervatve term n the equaton, and wll cause a slower dampng. Ths effect s showed n Fgure 5-7. abc a b c..4 t /s Fgure 5-7:The nrush current caused by resdual flux when ramp up functon appled and a voltage feedback.4 abc t /s Fgure 5-8:No nrush current caused by DC unbalance when voltage feedback used

95 5.3 Transformer Flux Controller: 8 Applyng the smlar analyss, t can be shown that the feedback wll tend to elmnate the error caused by mprecse frng of the IGBT-s, and would have the postve effect. The results shown n Fgure 5-8, present the magnetzng procedure wth ramp-up voltage functon and the voltage feedback, when a mprecse frng of the IGBTs exsts. 5.3 Transformer Flux Controller: As descrbed n the prevous examples, the correct modelng of all of the relevant factors for the transformer nrush s desred. There s a need to model a transformer wth both electrcal and magnetc parameters. Usng the system presented n Fgure 5-, wth the opened breaker, the equaton n phase doman can be descrbed as: uaca a a uψa d u acb R b L b u = + Ψb dt + uacb c c uψ c uψa ma Φ Φ Φ d uψb = dag( ( a) ( b) ( c)) mb d ωt uψc mc ma uψa mb dag u = Ψb R m mc uψ c (5.4) (5.5) (5.6) where u ac - s the phase voltage on the VSC. Φ As mentoned at the begnnng of the chapter, the term, can be represented n several ways, and for ths analyss, t wll be adopted that the Flux wll not reach the Φ saturaton lmt. That means that the term wll have the constant value L m. Consderng the flux of the core as an ntegral of the phase voltage, the equaton for one phase n S doman can be wrtten as: Rm Φ = = L ( s) U ( s) U ( s) T c s R Rm Rm RmR s s+ L Lm L LmL (5.7)

96 8 5 Connecton/Reconnecton of the voltage source converter to the power network where ( abc,, ) The above equaton s also vald when the voltages and fluxes are represented wth ther space-vectors The representaton of the frst and second dervatve n a d-q reference frame In order to transform the set of equatons (5.7), n the d-q reference frame, the followng transformatons wll be used: d x α dt d x β dt d x d ωxq (5.8) dt d xq + ωxd (5.9) dt x d xd d dx α q ω ω xd (5.) dt dt dt d x β d xq d x ω d dt dt d t xq + ω (5.) 5.3. The state-space representaton of the system Transferrng to (dq) reference frame, and usng the state-space representaton, the equatons obtan the followng form: Φd Φ d k ω ω k kω k Φ q Φ ω k kω k q k u d ω = + u q Φ d Φd Φ Φ q q (5.)

97 5.3 Transformer Flux Controller: 83 Φd Φd Φq = + Φ q Φd Φ q (5.3) where: k and k coeffcents are derved from equaton (5.6). Startng from ths form, one can obtan the full controllablty and observablty of the system. Based on the transformer confguraton, as well as the groundng of the system, ths equaton set can be extended wth the equaton of the zero sequence. The zero sequence of the flux wll exst for the 4-lmb and 5-lmb transformers. The approach s based on the estmaton of the transformer flux, n order to brng the approprate pulse pattern, to the IGBT-s. The basc assumpton of the method s that the flux wll stay always at the lnear part of the characterstc. The fluxes of the d and q axes are coupled. The followng equatons based on the equatons (5.7) and (5.8),after some calculatons show the method for decouplng and the flux control. ω Φ d = ( u ) d + s+ ω Φq s + ks k k ( ω ) ω Φ q = u q s+ ω Φd s + ks k k ( ω ) (5.4) (5.5) The flux controller desgn The equaton set represents the control n an open loop. The nput sgnal wll be the sum ω of the controllng sgnal u dq, and the decouplng term s + ω Φdq. k From the equatons one can conclude that the descrbed system s of the second order. For the proposed system, the state controller has been desgned. In order to elmnate the dsturbances n a steady-state, the addtonal ntegral acton s appled. If the frst term of the equatons (5.4), (5.5) s defned as:

98 84 5 Connecton/Reconnecton of the voltage source converter to the power network ( ) G s = s + ks k ( ω ) (5.6) the system n closed loop wll be: W ( s) + + Ks K s K Rs () ( ) ( ) s Ks + Ks + KRs () ( ) ( ω ) G s = = Ks K s K s k K s K k s K Gs ( ) s (5.7) The functon R(s) represents the plant mrror, and constants K, K, and K are the coeffcents of the feedback and ntegrator respectve. The coeffcents K and K must be chosen so that the response to the step nput s not allowed to have the overshoot. The overshoot could cause the flux whch s above the knee of the magnetc characterstc of the transformer, and the nrush could flow. Also the settlng tme should not be too long because the purpose of the method s to connect the VSC to the network at the shortest tme possble. The dagram for control and decouplng s shown n Fgure 5-9. State feedback d Φd* Plant mrror d + Dsturbance d s + ks + k Φd Φq* Plant mrror q + - decouplng feedback Dsturbance q Transformer Kphq Kphd s + ks + k Φq State feedback q Fgure 5-9: The system representaton ncludng feedbacks and decouplng The dfferent scenaros are analyzed. Frst, t s assumed that there s no resdual flux n the transformer core. The response to the flux step n the d-q reference frame s

99 5.3 Transformer Flux Controller: 85 presented n Fgure 5-. Then the resdual flux s added as an ntal condton for the calculaton. The results wth the transformer resdual flux are presented n Fgure 5-. Φ d, Φ q Phd Phq.. t /s Fgure 5-:The estmated flux n the d and q axs when no resdual flux exsts Φd, Φ q.. t /s Fgure 5-:The estmated flux n the d and q axs wth the exstng resdual flux The frst goal of the proposed method s to obtan that the flux of the transformer follows the reference value, and after short tme to be equal wth the vrtual flux of the power network, whch s chosen as a reference. When the flux of the transformer equals the reference value, the voltage of the transformer s n the phase wth the network voltage, and the connecton to the network could be performed. (Fgure 5-).

100 86 5 Connecton/Reconnecton of the voltage source converter to the power network Φ β Φ β.4.4 Φα Φα Fgure 5-: The response of the system to the reference flux exctaton (left), and to the dsturbance wth DC offset (rght) The second goal was to desgn the control system that wll be nsenstve to the dsturbances n the excter, n ths case the mprecse frng of the IGBT-s. The system response to the dsturbances s shown n Fgure 5-(rght). For the purpose of the testng of the system, the complete MATLAB/SIMULINK model contanng the mproved transformer model wth magnetc couplng of the phases and nonlneartes, and the expermental setup has been developed. As the result of smulaton, the voltage waveform durng connecton procedure s presented n Fgure 5-3. U abc V 4 4 Remanent flux estmaton Buldng up the voltage B reaker reclosng..4 t /s Fgure 5-3: The voltage waveform of the transformer durng connecton procedure

101 5.3 Transformer Flux Controller: 87 The results ndcate that the proposed algorthm could be successfully used for the fast connecton and specally, for reconnecton after the fault clearance n the network. The fast reconnecton s needed at some solated systems, such as offshore drll shps, where delayed power supply can cause damage n equpment and delay n producton.

102

103 6. DC voltage control 89 6 Control schemes of the voltage source converter 6. DC voltage control The DC voltage control s based on the keepng the capactor voltage on the defned value usng the converter current as a control parameter. The structure of the system s gven n Fgure 6-. u dc c c dc VSC ac L, r 3-Phase Network u ac u Tr u G Control Fgure 6-:The converter system for DC voltage regulaton Startng from equaton that defnes capactor current: du dc dc = C + c (6.) dt and actve power balance between AC and DC network: P dc dc = P dc ac u = u + u + u (6.) 3 3 that can be wrtten also n (d,q) reference frame (u q can be chosen to be equal zero), ( ) 3 3 Pac = udd + uqq = udd (6.3) the equaton for control varable dc can be obtaned. dc 3 u = d d (6.4) u dc

104 9 6 Control schemes of the voltage source converter The current d, s controlled n nner loop, and the transfer functon of nner loop must be also consdered. If the tme constant of the nner current loop s represented as τ, the equaton for DC voltage loop can be wrtten n state-space representaton as follows: x x = + x x τ [ u] (6.5) where, x = u, dc x = τcs The control n open loop, defned n equaton (6.6), can be graphcally represented as n Fgure 6-. * d τ s+ d ud udc dc C s udc Fgure 6-: Control n open loop The equvalent system from Fgure 6-, transferred n dq reference frame, for descrpton of the DC voltage control, s gven n Fgure 6-3. The two networks connected wth the back-to-back system are presented. The AC sde of the converter s modelled n dq reference frame. On a DC sde the actve load s modelled through the deal current source. The followng chapter deals wth the DC voltage control, smultaneously takng nto account the load sharng of the DC load.

105 6. Control desgn: 9 Network R L Actve load DC Network L e d u d u d dc C dc R L L e q uq uq P+I control q Iq* = f(v d ) Udc H(s) Udc* d Fgure 6-3:The equvalent dagram descrbng a AC-DC connecton 6. Control desgn: In order to control the DC voltage, the equatons n d-q reference frame are transferred n the frequency-doman. 6.. State feedback controller: Snce the system has two states, two feedbacks can be appled. The measured DC voltage s multpled by the constant k, and the d component of the lne current s multpled by the constant k. The transfer functon for the DC voltage loop can be wrtten as: ( ) G s = C τ s + Cs = k + C k + ( k+ ks) s + s+ C τ s + Cs Cτ Cτ (6.6) In order to acheve good system behavour, the constants k and k wll be chosen n that way that overshoot s not bgger then %, and the settlng tme s about.5 s.

106 9 6 Control schemes of the voltage source converter 6.. Compensatng the steady-state and transent characterstc: The system has a good response to the referent voltage, but has the non-zero steadystate value, when the dsturbances are appled. In order to compensate the dsturbances, the ntegral control n seres wth the system should be appled. The mplemented ntegral acton wll elmnate the steady-state error, but t wll change the transent behavour of the complete system. In order to compensate the negatve effect of the ntegrator, the feed-forward transfer functon R(s) s ntroduced. The transfer functon s presented at (6.7) and the block dagram n Fgure 6-4. ( Ks + Ks + K ) R( s) Gs () ( ) s Ks+ K s + KRs () W s = = 3 Ks + Ks + K ( ) ( ) τcs + C+ K s + Ks + K + Gs s (6.7) It could be shown that for the chosen transfer functon R(s) = G(s), the output s not longer dependent from K, and the transfer functon W(s) obtans the form from equaton(6.6). * udc s + K s+ K R( s) + - K s + - τ Cs + Cs udc K p K p + - Fgure 6-4The control loop descrbng the equaton ( 6.6) 6..3 The deal operaton of two DC voltage controllers operatng n parallel: The dea of the parallelng the DC voltage control s ntroduced for the purpose of the redundancy. The standard back-to-back-system has one controller that gves the current reference whle the second makes the DC voltage control. If the converter wth DC voltage control fals, there s no chance for the redundancy. The prevously descrbed DC control s n ths work realsed two tmes, the one for each voltage sourced

107 6. Control desgn: 93 converter. The equaton (6.7) s stll vald, and the transent responses are represented n Fgure 6-5. u dc dc dc load DC. bus p.u load. p.u. dc(p.u) dc(p.u) Udc(p.u)..4 t / s Fgure 6-5Response of the DC voltage and converter currents It could be clearly seen, that for the gven stuaton, and for the all parameters deal, the performance s not dfferent from the system wth one controller Problems of controllng the same varable by separate controllers: The man problem s that the voltage measurement s not deal, and as lke that, t can brng lot dsturbances n the system. The followng nomenclature s adopted: u dc - DC voltage - DC current flowng from the converter - DC current flowng from the converter I - DC current of the actve load u err - the DC voltage measurement error of the converter Startng from the equaton (6.4) and Fgure 6-4 the followng equatons could be wrtten: k ( ) I s = k+ ks+ U( s) τ s+ s (6.8) ( ) u udc ue rr = + (6.9)

108 94 6 Control schemes of the voltage source converter Udc ( s) = ( I( s) + I( s) + I( s) ) (6.) Cs k I( s) = k+ ks+ Udc ( s) τ s+ s (6.) Solvng the followng system of dfferental equatons n frequency-doman, the followng results are obtaned: ( ) ( ) ( + ) F s F() s F() s Cs I( s) = I( s) Uerr s F s + Cs F( s) + Cs Fs ( ) Udc() s = I() s Ue rr s Fs ( ) + Cs Fs ( ) + Cs ( ) ( ) (6.) (6.3) ( ) F s ks + ks + k = s ( τ s+ ) ; (6.4) It could be seen that the functon F(s) has astatsm of the frst order, and therefore, t wll cause nfnte steady-state error n the second term of the equaton (6.). t = si s = I u (6.5) ( ) () lm ( ) err t s u t = su s = I u (6.6) () lm ( ) e dc dc rr t s The transent response of the currents and the DC voltage s presented n Fgure 6-7. u dc dc dc dc(p.u) dc(p.u) Udc(p.u)..4 t / s Fgure 6-6: Response of the DC voltage and converter currents to the Udc measurement error

109 6. Control desgn: The measurement error- droop One of the possble solutons to ths problem s to add a droop characterstc to the DC controller. As a result, a droop characterstc s obtaned, as shown n Fgure 6-8. The slope of the droop curve s proportonal to the DC gan. Based on the droop characterstc, the power can be controlled wthn a certan range by controllng the voltage wthn specfc ntervals. Both converters can be controlled ndependently and the objectve of modular desgn can be acheved. * udc + - s + Ks+ K R ( s) + - K s + - τ Cs + Cs udc K p K p + - K d Fgure 6-7: The system control loop ncludng droop Adoptng the same nomenclature as n a prevous analyss, the followng equatons, could be wrtten. k k () () I = R s D I s k+ ks+ Idc k D I() s τ s+ s s ( ) k k () () I s = R s D I s k+ ks+ Udc ( s) k D I() s τ s+ s s Applyng the capactor voltage, equatons (6.5) and (6.6) t can be shown that: ( + ) Fs () Fs () Fs () Cs I() s = I() s Uerr s Fs ( ) + Cs Fs ( ) + Cs ( + ) Fs () Fs () Fs () Cs I() s = I() s Uerr s Fs ( ) + Cs Fs ( ) + Cs Fs ( ) Udc ( s) = I s Ue rr s F s + Cs F( s) + Cs ( ) ( ) ( ) ( ) ( ) (6.7) (6.8) (6.9) (6.) (6.)

110 96 6 Control schemes of the voltage source converter where : ( τ s+ )( ks+ ks + k ) Fs () = s s+ + k R s D k Ds ( τ ) ( ) (6.) It can be seen that functon F(s) has a fnte steady-state value. After some calculatons, t can be shown that: () t lm si( s) I uerr t s D = = (6.3) () t lmsi( s) I uerr t s D = = + (6.4) D udc() t lmsudc ( s) I ue rr t s = = (6.5) However, the droop method has a fundamental lmtaton n that good voltage regulaton and good load sharng cannot be acheved smultaneously. P Poor load sharng Poor voltage regulaton u dc Fgure 6-8: The droop characterstcs Fgure 6-9, and equatons (6.), and (6.) show that a good voltage regulaton requres a hgh DC gan, whle a hgh DC gan could cause poor load sharng f the two converters are not dentcal. The curves wth good voltage regulaton cause a large power mbalance f there s even a small varaton n ther droop characterstcs, whle the curves wth good load sharng have large voltage varaton (a dashed lne s a varaton of a sold lne). In the next secton, a novel droop method usng gan schedulng s proposed n order to mprove both voltage regulaton and load sharng.

111 6.3 Back-to-back system wth double controlled DC voltage 97 Not only does the proposed method mantan modularty, but t also has much better performance than the droop method. 6.3 Back-to-back system wth double controlled DC voltage In equatons (6.)-(6.) t s obvous that the droop has an nfluence on the u dc and. If we nclude another feedback, based on the load current I, t wll be shown that the nfluence of the DC voltage droop and nfluence of the Dc voltage measurement error can be completely removed. The equatons (6.5) and (6.6) are now extended as follows: k k ( ) () () ( I s = R s D I s k+ ks+ ) U( s) k D I() s + τ s+ s s k RsD I s τ s+ s + () ( ) ( ) k k () () I s = R s D I s k+ ks+ Udc ( s) k D I() s τ s+ s s k R sd I s τ s+ s + () ( ) The prevous equatons together gve the followng result: ( + ) ( + ) Fs () F () s Fs () Fs () Cs I() s = + F() s I() s Uerr s Fs ( ) + Cs Fs ( ) + Cs ( + ) Fs () F () s Fs () I() s = + F() s I() s Uerr s Fs ( ) + Cs Fs ( ) + Cs + F ( s) Fs () Udc() s = I() s Ue rr s Fs ( ) + Cs Fs ( ) + Cs ( ) ( ) ( ) (6.6) (6.7) (6.8) (6.9) (6.3) wth: KRsD () () + KDs F s = s( τ s+ ) + kr( s) D kds ; (6.3) The steady-state equaton can be obtaned based on the fnte value theorems, lke n the prevously descrbed stuatons: D D () t lm ( s I( s) ) I uerr t s D D = = (6.3)

112 98 6 Control schemes of the voltage source converter D D () t lm ( si( s) ) I uerr t s D D = = + (6.33) D+ D udc() t lm sudc() s I ue rr t s = = (6.34) The set of the equatons shows that by choosng the parameter D =D/, the voltage u dc, becomes ndependent from the load current I. Also from the frst two equatons, t can be seen that the load current dstrbuton through the converters are almost equal, dfferng only by the voltage measurement error. Choosng the factor D>, the value of the second member s under the value of the current measurement error, and as lke that, satsfes the system crtera. Hence, the value of the parameter D should not be too hgh, n order to satsfy the stablty crtera. jim Root locus D> Re Fgure 6-9: The root locus of the system dependant on D parameter The coefetent D, doesn t have to be the same on the both converters. If we defne the feedback factor of the controller as D, and feedback factor of the controller as D, the equatons (6.8)-(6.3) obtan the followng form: D D () t lm si( s) I uerr t s D D = = (6.35) D D () t lm si( s) I uerr t s D D = = + (6.36)

113 6.3 Back-to-back system wth double controlled DC voltage 99 D+ D + D u t = su s = I u (6.37) () lm ( ) dc dc e rr t s Ths set of equatons show that wth the adjustng of the factors D and D, the load flow through the converters can be obtaned. The only condton that must be fulflled s that the sum of the D and D must be equal to the droop factor D. The fnal structure of the proposed method s descrbed n Fgure 6-, and the tme response of the voltages and currents to the dfferent values of the D and D, are descrbed n Fgure 6-. Fgure 6-: The confguraton of the back-to-back system, based on the parallel control of the DC voltage

114 6 Control schemes of the voltage source converter u dc dc dc (A) (A) Udc(V)..4 t / s u dc dc dc (A) (A) Udc(A)..4 t / s Fgure 6-: The response of the voltage and converter currents to the load current step response, and for the dfferent values of D and D As sad before, the back-to-back system besde ts power flow abltes has the possblty to control the DC voltage n the manner that each VSC can operate ndependently. That means that f the one VSC s attached by any knd of fault, the other VSC s able to keep the DC voltage at the same level, wthout any addtonal swtchng acton. To avod the addtonal swtchng acton, the correctons sgnal whch s added n order to compensate the DC voltage measurement error, must be lmted. In normal operaton, ths sgnal s equal: () t D () t D I() t δ = + (6.38)

115 6.4 Frequency based power flow control From equaton (6.33), t can be shown, that the value δ ( t ) = u err/ at the steady-state. That means that assumng the u err as the only dstorton of the DC voltage, the value δ ( t ), can be lmted to u δ errmax err = (6.39) The lmtatons of the correctng sgnal brngs the non-lnearty to the system. To avod the nfluence of the non-lneartes, only the steady-state value wll be lmted, whle the transents wll sustan. The response of the system, to the dsturbances when one of the VSC trp, s shown n Fgure 6-. u dc (A) Udc(V) VSC Swtched VSC-swtched off..4 t / s Fgure 6-: The response of the DC voltage and converter current, when converter fals 6.4 Frequency based power flow control 6.4. The dea of the power flow regulaton: The rapd development of power electroncs has made t possble to desgn power electronc equpment of hgh ratng for hgh-voltage systems. Many regulaton problems resultng from transmsson system may be, at least partly, mproved by use of the equpment contanng FACTS controllers. The de-regulaton (restructurng) of power networks wll probably mply new loadng condtons and new power flow stuatons. In order to deal wth the power flow regulaton problem, the solutons wth back-to-back

116 6 Control schemes of the voltage source converter systems must provde mathematcal and computer models of the controllers. Ths s consdered to be rather new mpetus n the feld The equvalent dagram of the power/frequency loop: The system descrpton contanng the FACTS devce that connects two networks s gven n Fgure 6-3. ( ) Pc = f ω ω re f Network + + Load Governor + ΔP ω Turbne - + Droop ( ) Pc = f ω Droop ( ) Pc = f ω ω re f Governor Load Pc = f ω ( ) ΔP Turbne ω Network Fgure 6-3: The equvalent graphc of the power/frequency loop The frequency dfference across the back-to-back system s used as an nput sgnal n order to mprove the operaton of the two nterconnected networks. = f ( ω, ω ) P f ( ω, ω ) Pc P + P = P c = c c dc The analyss of the transent behavour of the descrbed system, demands the knowng of the network parameters, the number of the generators, the type of the generators and correspondng governor and exctaton systems. Then, the voltage and frequency dependence of the load, and fnally the structure and the number of the voltage source converters appled for frequency regulaton. The analyss performed and descrbed, wll

117 6.4 Frequency based power flow control 3 be the steady-state analyss usng the mproved Newton-Raphson method for load flow and voltage condtons. The transent analyss s gven at the end of the chapter. The method gven below s defned for the connectng of the two asynchronous networks, but the prncple can be extended to the arbtrary number of networks and controllers Steady-state power flow algorthm ncludng the back-to-back converters For the post dynamc quas steady-states of the observed system, those follow the uncertantes and the reacton of the prmary governor control from one sde and the VSC from the other, the followng balance equaton could be wrtten for any bus n the network: n = sn Θ + j j sn j Θj j= j ( ) P U Y UU Y δ δ (6.4) n = cos Θ j j cos j Θj j= j ( ) Q U Y UU Y δ δ (6.4) where: U -s the voltage of the bus Y j s the admttance of the branch between buses and j δ, δ j - are the voltage angles of the voltages on bus and j Θ j s the argument of the admttance Y j For the buses of the generators whose prme mover s not blocked, the followng equatons can be wrtten: P Where: P = tot R Pn + R Pn n e,, n (6.4) n s the number of the generators P tot s the total load n the system ncludng the loses and the power flow through the VSC

118 4 6 Control schemes of the voltage source converter R s the droop f the -th generator R e s the equvalent droop of the complete system P n s the nomnal power of the -th generator Analogue to the prevous equaton, the partcpaton of the th generator to the power debalance wll be: Δ P = Pdeb R P + R P n e n n (6.43) Modellng of the back-to-back system For the busses of the VSC, dependng of the operaton mode, a few sets of equaton could be wrtten. For the operaton mode of the nterest of the power balance n the system, the smplest way s to represent the busses as the constant actve and reactve power snks. If there s the a frequency dependant actve power flow control algorthm appled, and the reactve power control n order to keep the voltage level of the provsonal bus to the n advance prescrbed value V, the nfluence of the VSC control should be consdered. For the power flow regulaton, the frequency dfference across the back-to-back system s taken as an nput sgnal. The lnear functon for the DC load sharng, and the power transfer through the converter of the frequency dfference can be wrtten as: ( ) Pc.5 UdcIdc k f f = + (6.44) ( ) Pc.5 UdcIdc k f f = + (6.45) The DC load s represented as a constant power snk. For the purpose of the reactve power regulaton, two ndependently controlled voltage/reactve power loops exst. There are two possble solutons for reactve power control: Frst s that the reactve power nput s fxed. In that case the bus wll be of the (P(f),Q) type. Second s that the reactve power s used to keep the voltage level at bus, on the n advance prescrbed value U. Then, the bus wll be of (P(f),Q(U)) type or (P(f),U) type.

119 6.4 Frequency based power flow control 5 The VSC back-to-back based system equvalent crcut s shown at the followng fgure. I dc I c Bus C Bus C U dc U c, δ U c, δ U I U I U I + + = c c c c dc dc Fgure 6-4: The representaton of the back-to-back system, for load flow analyss The algorthm for calculaton: As sad before, the algorthm s based on the Newton-Rapson teratve technque, and sharng of the power debalance from slack node between actve elements accordng to equaton (6.43). Graphcally, the algorthm s descrbed n the flowchart n Fgure 6-5. Normally the calculaton begns wth the defnng of the system. The bus types, number of the generators, loads, nterconnected systems, etc. Then, for each of the n nterconnected systems, the followng calculatons are performed: Intal calculatons, based on the equaton(6.4). The slack node power dstrbuton, based on equaton (6.4) Jacoban calculaton based on the followng equatons: P P ΔP δ U Δδ. Q = Q Q U (6.46) Δ Δ δ U Frequency determnaton based on the generator characterstcs P = (6.47) g f fn R P gn

120 6 6 Control schemes of the voltage source converter Based on the calculated frequences and the equatons (6.46) and (6.47), the power transfer through the converters s calculated. At the end, the error between the calculated and n-advance prescrbed values s calculated, and compared to the error tolerance parameter ξ. If the condton s not satsfed, the calculaton procedure goes n teraton, otherwse, prnts the results. Defne bus types (nput and output varable) =,n Intal calculaton (gen. power, power transfer) Power debalance correcton Calculate Jakoban Recalculate frequency Recalculate converter power transfer Calculate error Error < ξ Output: Generator power, voltage level, power transfer Fgure 6-5: Flowchart- algorthm for solvng power flow/voltage condton

121 6.4 Frequency based power flow control Example of the multmaschne network contanng Back-to-back VSC The example system s presented n Fgure 6-6. Each network must have an ndvdual slack node. The power debalance of the network, s defned based on a slack node. Snce the node, s the vrtual node, the power debalance n that node must be equal to zero. Snce the voltage source converter has lmted modulaton ndex, the constraned load flow algorthm should be appled. If the converter has reached ts lmt, the frequency debalance must be covered from the other converters of the system. The presented algorthm for the example network defned n Fgure 6-6 s mplemented usng the MATLAB scrpt, and the dfferent condtons are smulated. The results are presented n the followng tables: U δ P(f),U Y Y Y 34 5 VSC Y U δ 4 3 Y 34 Y 3 P(f),U Y 3 P 3,Q 3 Pdc P 3,Q 3 P(f),U Fgure 6-6: The example system used for provng the algorthm Table 6.: Changng DC load from to(p.u), wthout bus voltage (reactve power) regulaton: f a f b P 4 P 4 U 4 U 4,983,98 -,5,5,993,3,975,97 -,476 -,4,96,98,965,963 -,8 -,,98,959

122 8 6 Control schemes of the voltage source converter Table 6.: Changng DC load from to (p.u), wth bus voltage (reactve power) regulaton: f a f b P 4 P 4 V 4 V 4 Q 4 Q 4,983,98 -,5,5,99,99, -,,975,97 -,475 -,5,99,99,,74,966,963 -,793 -,7,99,99,384,37 From the results, t can be concluded that the voltage source converter n back-to-back realsaton, can be successfully used for power balancng between two or more networks. Addtonally, t could be seen that the voltage or reactve power control have almost no nfluence on actve power control, and can addtonally mprove the voltage condtons n the network Transent analyss of the back-to-back system connectng two weak networks For the sake of the transent analyss, the controller tme constants as well as the tme constants of the generator system must be consdered. The controller uses the PLL algorthm for the frequency measurement. Snce the frequency can not be obtaned nstantly, the tme constant of the PLL block should be also consdered. Also the addtonal load on both networks s modelled (P l, P l ). Usng the results obtaned n secton 6.4 for the DC voltage control, and consderng the power flow through the converter when the double controlled DC voltage algorthm s appled, and the proposed lnear functon for the power flow control (6.44),the followng block dagram can be presented. The blue shadowed block represent the VSC control loop defned n chapter 6.3. The yellow shadowed block represents the equatons for the generator governor, and the frequency control loop. From the dagram, the equaton for the current of one sde of the VSC can be descrbed as follows:

123 6.4 Frequency based power flow control 9 Fgure 6-7: The control loop used for the transent analyss

124 6 Control schemes of the voltage source converter K f fpll f PLL d =, Ts nom nom T s f f ( )( f ) + + (6.48) where f PLL and f PLL are the frequences measured by the PLL unt, T f s the tme constant of the frequency controller. The equaton (6.48) s transformed to comply wth the state-space representaton: T + Tf Kf Kf ds d s d f nom PLL f nom PLL TT f TT f TT f f TT f f + + = (6.49) Ths equaton n the tme-doman has the followng form: T + Tf Kf Kf d = d d + f nom PLL f nom PLL TT f TT f TT f f TT f f (6.5) Applyng the same transformatons for u dc, the followng equatons n tme-doman can be wrtten: D DC = DC DC + d + T T CN u T u u u u DCref (6.5) For the frequences f PLL und f PLL, usng the generator power balance equatons, one can wrte: f f P = + P PLL, PLL, m, e, TPLL πj,tpll πj,tpll (6.5) By wrtng the electrcal power as a sum of the load and transferred power: Pe = PL + PK (6.53) The equaton (6.5) obtans the followng form: f PLL, f = PLL, + m, L. K, PLL P, PLL P T πj T πj,tpll πj P,TPLL (6.54) The mechancal power of the generator can be wrtten as a functon of the referent and the measured frequency: ( ref ) P = f f m,,, Tde,s+ d, (6.55)

125 6.4 Frequency based power flow control or d P P f f f, T PLL m, = m, PLL, PLL + ref, Tde, Tde, Tde, Tde, (6.56) Next, the T de und T de und droops d and d. The actve power transferred from the voltage source converter s gven as: 3 uref, PK, =, d Ke,s+ (6.57) Wth these equatons, the complete state-space descrpton of the system wth VSC connectng two weak networks has the followng form: T + T f K f K f TT nom nom f TT f TT f TT f f f U F D D U FC d U F T T T d D d CU u F T T DC u DC f PLL T PLL πj T PLL πj T PLL f PLL = f PLL f PLL T PLL πj T PLL πj T PLL P m P m T d PLL P T K de T de T de P T d K PLL T de T de T de 3 k u k e ref e 3 k u k e ref e U FC d T d d u T DC ref u u DC DC f PLL π JT L PLL P f PLL + L f f ref PLL f π JT f ref PLL PLL P 3 V m Wnd P m T P de K P K T de (6.58)

126 6 Control schemes of the voltage source converter In the C matrx of the state-space representaton, the states of the nterest could be chosen. The output matrx s presented n (6.59). T PLL = PLL () T / s / s x() t y t (6.59) Snce the system s completely descrbed n the state-space, the stablty of the system should be proved. Therefore the pole dagram should be made. It s represented n Fgure 6-8. The dagram contans the control parameter that should be optmzed. Fgure 6-8: The pole- zero dagram of the complete system From the dagram t can be seen that all poles are n the left half-plane and therefore the system looks lke stable. The crtcal poles of the system that have a lower dampng should be took n cosderaton for the control parameter optmzaton Optmzaton of the control parameters The optmzaton of the control parameters s made wth the use of the root locus. The root locus s a graphcal representaton of the zeros and poles of the closed loop system

127 6.4 Frequency based power flow control 3 as a functon of the parameters of the open loop. The open loop conssts of the all control blocks n the forward drecton. The G s the transfer functon of the open loop. The root locus conssts of the all complex ponts that fulfl the followng condton: + kg (s) = The root locus brngs the possblty to test the system wthout explct representaton of the transfer functon. If all the zeros and poles are n the left half-plane, the system s stable. If any pole or zero are n the rght half-plane, the system n unstable. As a varyng parameter, the gan K f s chosen. By varyng the parameter, the optmal root locus curve s found. It s shown that wth the already for the chosen gan value K f, the system s unstable. Therefore the normal P control can not be used. Fgure 6-9: Root Locus for K f = 4 Because the factor K f should have the low value n order to obtan stablty, n order to obtan approprate power transfer, the addtonal pole s ntroduced n the frequency

128 4 6 Control schemes of the voltage source converter control loop, wth the addtonal tme constant. By ntroducng the addtonal tme constant, the coeffcent K f can be chosen wth hgher freedom. In Fgure 6-9 the root locus of the system s presented. The frequency dfference Δf s consdered as an nput value and P k as output value. Parameters T f und K f are chosen n order to obtan good dampng of the system as well as the good dynamc. The next Fgures show the Bode- Dagram of the system. The results of the smulatons are presented n the followng fgures. The network one s chosen to be the 5 Hz network, and the network two s a 6 Hz network. From the fgures t can be concluded that the load sharng algorthm takng nto account the exstng load on the network s acheved. The DC load step s shared between two networks correspondng to the network frequences. Fgure 6-: Root locus for K f =,5 und T f = s

129 6.4 Frequency based power flow control 5 Fgure 6-: Bodedagram and Nyqustdagram for K f =,5 and T f = s P P k, k W x 4 P k, P k t /s Fgure 6-: The power flow through the converter fort he DC load step of x 4 f, f Hz t /s Fgure 6-3: The frequences of the networks for the DC load step of x 4

130

131 7 Expermental results 7. The setup descrpton In order to verfy analytcally obtaned results, the model of the back-to-back coupled VSC converters s bult. Snce the avalable power electroncs converters have the rated power of 4 kw, and the nomnal voltage level of 4 V, t was possble to use the publc utlty network for power supply. The complete setup s placed n the student s laboratory of the Lehrstuhl für Elektrsche Energeversorgung Unversty of Erlangen-Nürnberg. The connecton to the utlty network s protected wth the 33A relays. Snce the only one connecton pont to the network s used, the power electroncs converters are coupled parallel n order to emulate the back-to-back confguraton. The connecton of the AC sde of the converters, to the grd s realsed over the LC flter and the transformer. Each converter can be separately connected to and dsconnected from the grd by the controlled crcut breakers. The swtchng actons are realsed on the controller board. The prechargng of the DC capactor s realsed wth the dode brdge and accompanyng resstors. The prechargng actons are also controlled from the controller board. The control system as well as all swtchng actons are mplemented n the dspace - 3 rapd prototypng unt. The complete descrpton of the hardware s performed n the next sectons. 7.. Hardware descrpton of the lab. setup As mentoned before, the man part of the setup conssts of two IGBT based voltage source converters of the type MASTERDRIVES from the frma Semens. The appled IGBTs are from Toshba and are of the type. The nomnal power of the converter s 44kW. The converters have ncluded drver as well as the control cards.

132 8 7 Expermental results Fgure 7-:The expermental setup descrpton The drver card contans U sd montorng functon as well as the over voltage protecton. It has sx TTL nput sgnals for the trggerng of the IGBTs and 3 output sgnals for fault acknowledgment. The realsaton of the IGBT s dead tme functon s done separately, because the drver board does not have t. The controller board of the MASTERDRIVES s completely removed from the hardware and the control functons are realsed n the dspace 3 rapd prototypng board. The converter has three hall effect current sensors of the type LEM, and a DC and AC voltage sensng unts. The output sgnals of the AC sensng unt s already a spacevector, and saves a lttle the calculaton tme of the controller. The values of the flter elements, prechargng unt resstors, as well as the values of the DC capactor are gven n the followng lst:

133 7. The setup descrpton 9 Transformer: Flter : S= kva; U /U = 48V/4V L =,3 mh; C f =, uf; R f =,7 Ω; DC sde: C dc = 6 mf; R dc = Ω; R p = Ω; 7.. DSpace rapd prototypng system As a controller unt the DS 3 controller board from dspace s used. The archtecture of the board brngs the possbltes of the fast and accurate mplementaton of the control algorthms usng the MATLAB/Smulnk models and codes. The Real tme nterface software translate the the models developed n Smulnk envronment nto the C code recognsed by the board. Therefore, the development tme s reduced to a mnmum. The board has two processor unts. Frst unt s equpped wth the PowerPC 75 GX processor. Insde, the man control algorthms are executed. Ths processor s used to mplement the control modules for the transformer flux control (descrbed n chapter 5), current and DC voltage control (descrbed n chapter 6). Both voltage source converters are controlled from one board. The control structure of the double DC controller developed n Smulnk envronment s shown n Fgure 7- For the analog data acquston, the 4 analog I/Os are used, and for the status of the converters, two dgtal I/Os. The blue collared blocks represent the control blocks. Also, the protecton functon s realsed.

134 7 Expermental results RTI Data Vdc I_abc U_alpha_beta U_alpha_beta_net angle sn_cos I_abc U_alpha_beta k k Analog _Inputs IGBT_error_c IGBT_error_c Dgtal nputs Vdc _In Start _Stop_PWM IGBT_error Iabc_conv _ Start_Stop_PWM Iabc_conv _ Start_Stop_PWM_IGBT IGBT_error Protecton _nv Voltage Regulator OR U_alfa _beta Iabc Logcal Operator 3 Udc Mess sn_coss Vabc_nv angle enablee k ouble Data Type Converson NOT Logcal Operator Zero -Order Hold 9 - Z Integer Delay oolean Data Type Converson OR Logcal Operator 6 Voltage Regulator Constant U_alfa_beta Iabc Udc Mess sn_coss Vabc_nv angle enablee k Zero -Order ouble Hold Data Type Converson NOT - oolean Z Integer Delay Data Type Converson 3 Logcal Operator Duty _cycles _nv PWM_stop Duty _cycles _nv PWM_stop Inverter _drvers _PWM PWM_stop_ Net swtch Net swtch DC_Res Dgtal _outputs Fgure 7-:The control system desgn usng the Smulnk real tme nterface

135 7. The setup descrpton For the purpose of the PWM generaton, the second processor s used. The processor s TMS3f4 from the Texas Instruments. The processor has PWM dgtal outputs whch s enough to control two -level converters. The PWM has the dead-tme generaton for the sequre operaton of the IGBTs mplemented The Dead tme generator In order to generate the dfferent dead tmes, addtonal board s developed. The board conssts 6 tmers, n order to generate dead tmes for each IGBT ndvdually. Ths alow us to consder the nfluence of the mprecse frng of the IGBTs to the converter currents. The user nterface called Control desktop, brngs the possbltes to generate all control swtchng functons, to change the reference values onlne as well as to scope all measured values. The measured values are saved n MATLAB recognsed formats. The example of the user nterface screen s shown n Fgure 7.4. Fgure 7-3: The Control desk screenshot