A Simple, Efficient, and EMI-Optimized Solar Array Inverter

Transcription

1 A Smple, Effcent, and EMI-Optmzed Solar Array Inverter K. H. Edelmoser, Insttute of Electrcal Drves and Machnes Techncal nversty Venna Gusshausstr , A-14 Wen ASTRIA F. A. Hmmelstoss Technkum Wen nversty of Appled Scence Hoechstaeplatz 5, A-12 Wen ASTRIA Abstract: - In the feld of electrcal solar power converson effcency s the most mportant topc. In common sngle-phase nverter applcatons the current of the solar array shows a remarkable rpple. Ths entals two sgnfcant dsadvantages: Reduced over all effcency due to dynamc maxmum power pont msmatch and reduced lfetme of the panels due to addtonal component stress. Furthermore n envronments wth several solar strngs operatng n parallel to reach the goal of a very close MPP operaton, a dstrbuted current source arrangement has to be chosen. The proposed topology dscussed n ths paper uses a separated actve flter to fulfll the gven requrements: Mnmzed nput current rpple of the cells, strng-optmzed maxmum power pont trackng and optmal power qualty of the supplyng grd. The topology presented n ths paper shows a remarkable mprovement of the over-all effcency as well as a sgnfcantly enhanced EM. onsequently, t s well suted for solar power nverter applcatons. Key-Words: - urrent-rpple-reducton, PWM-Inverter, Solar Energy, Flter, Rpple ancellaton 1. Introducton State-of-the-art swtchng mode solar converters arrangements for parallel strng operaton (c.f. Fg. 1) are ndustral standard n the feld of power converson for renewable energy applcatons. The startng pont of our nvestgatons was a mult-strng solar array wth common current sourced D-lnk and a mans couplng nverter operatng at the European power grd (23V). 1.1 The asc onverter Topology The nput stages of the proposed converter use the wellknown buck current source to supply the D-lnk. Each stage was operated on ts own MPP to maxmze the over all system effcency (c.f. Fg. 2) [1,2,3,11]. Fg. 2. Solar strng nput stage. Fg. 1. Solar nverter arrangement. As shown n practce, the nput current rpple requres a huge flter capactor n each strng to reach the goal of a satsfactory effcency. In ths paper a new concept, usng an addtonal energy storage element s shown, whch ncreases the effcency and the converter output voltage qualty to meet hgh mans qualty and reduce EM problems. The buck-stages are normally controlled to delver current wth snusodal halve wave shapes whch are collected n the common D-lnk. Due to the varyng current, a respectvely large averagng energy buffer ( ) s needed to smoothen the solar arrays current. A standard gauge of approxmately 5uF / kw-peak at 2V solar voltage range s a good startng pont to keep the voltage rpple wthn the recommended 2% of the MPP-voltage. For mans-nterfacng a smple current sourced push-pull nverter topology was chosen (c.f. Fg. 3). In our applcaton a transformer solaton s used [4,5]. ISSN: Issue 9, Volume 9, September 21

2 RL1+ RL 2+ RL RL1+ RL 2+ RL t t + D LS 1+ LS 2+ LO LS 1+ LS 2+ LO 1 = 1 e + A e RL 1+ RL2 + R O. (6) Fg. 3. Inverter stage. As can be seen from Fg. 3, the structure s very smlar to the standard boost-converter. 1.2 Smulaton of the push-pull nverter To clarfy the current rpple problematc the structure gven n Fg. 3 was modeled n SPIE and smulated. For ths smplfed model a 1:32-transformer was used. The smulaton results of the topology (nput voltage: 12V, load resstance: 1kΩ, duty cycle: 5%) are shown n Fg. 5. (OT) [V] (TR) [V] x 1-4 I(S1) [A] I(S2) [A] x x x 1-4 Fg. 5. Smulaton: from top to bottom: output voltage, voltage across one prmary, current through the swtches S1 & S2. Fg. 4. Operatonal prncple of the converter. For each operaton state the system equatons can be gven: [ ] ( = L ) =+, (1) TR 1 d1 D = 1 ( RL1+ RL1+ RO) + ( LS1+ LS1+ LO),(2) D 1 = 1 e + e RL 1+ RL2 + R O [ ] 1 RL1+ RL 2+ RL RL1+ RL 2+ RL t t LS 1+ LS 2+ LO LS 1+ LS 2+ LO A ( = L ) =, (4) TR d1 D = 1 ( RL 1+ RL 1+ RO) + ( LS1+ LS1+ LO), (5) (3), V(OT) I(S1) V(S1) VG(S1,S2) x x x x 1-4 Fg. 6. Smulaton from top to bottom: output voltage, transformer current (here magnetzng current), voltage across one swtch, control sgnal of the swtches. ISSN: Issue 9, Volume 9, September 21

3 For the sake of clarty and to show the nfluence of the magnetzng current, a transformer rato of 1:1 s chosen n Fgs. 5 & 6. Fgure 7 shows the smulaton results at no load condton of the converter, whle Fg. 8 depcts a 12A load condton (1Ω load). The magnetzng current can be seen clearly n both cases. V(OT) I(S1) V(S1) VG(S1,S2) x x x x 1-4 Fg. 7. Smulaton from top to bottom: output voltage, transformer current (magnetzng plus transformed load current), voltage across one swtch, control sgnal of the swtches. (dscontnuous mode). 2. The nput current rpple problem Some comparng measurements of a 1.2kW (1 cells operatng n seres connecton) test array show the nfluence of the nput capactor of the solar converter. Table 1 clarfes the problematc and shows the effcency deratng. Lfetme reducton wll effect the plant MTF and are not be taken nto consderatons here. P AVG Eff. 1µF 885W 73.7% 2µF 185W 9.4% 5µF 118W 98.3% 1µF 1195W 99.5% 5µF 1198W 99.8% *) 1µF 12W 1,% *) Table 1 Effcency deratng due to MPP msmatch (* rpple below 2% as recommended by manufactory) VD (OT) 5 I(S1) V(S1) VG(S1,S2) x x x x 1-4 Fg. 8. Smulaton from top to bottom: output voltage, swtch current (magnetzng plus transformed load current), voltage across one swtch, control sgnal of the swtches. (nductve load). Fg. 9. Smulated system behavor of the nput stage: (from top to bot.) Input current, array voltage (= ), solar energy, storage capactor s ( ) energy. Fgure 9 shows smulaton results of the nput stage wthout any actve flterng. The solar cells are buffered ISSN: Issue 9, Volume 9, September 21

4 wth 5uF to fulfll the manufacturer s requrement of 2% voltage rpple. To overcome the problem of energy storage n each nput cell, an mproved topology wth shared storage elements was derved. An addtonal energy storage cell operatng at the same D-lnk was used to smoothen the nput current rpple (c.f. Fg. 1) be used wthout any dsadvantage to the crcut behavour. (ref.: W =.. ). To reach the gven topcs a smple flter structure based on a storage capactor and a bdrectonal D/D converter was chosen (c.f. Fg. 11). The control prncple used of ths flter s based on a smple current mode regulator fed from a common load regulaton unt wth the goal of mans rpple elmnaton n the solar strng. Fg. 1. Improved nverter topology wth actve flter Fg. 11. Actve flter crcutry The smple prncple of current summaton was used n combnaton of an energy storage at hgher voltage levels (n our case 4V) (ref.: W =* 2 /2). Also a much hgher voltage rpple across the flter capactor can 3. Modelng of the compensator The parameters of the model are the lnk capactor ZK, ts seres resstor R Z, the capactor of the actve flter, ts seres resstor R, the nductor L, ts seres resstor R L, the on-resstors of the upper R S and the lower R SL actve swtch. The state varables are the nductor current L, the capactor voltage of the buffer capactor u, and the capactor voltage of the flter capactor u F. The nput varables are the output currents of the D-to-D converters 1.. N, and the nput current of the nverters D-lnk ZK. In contnuous nductor current mode there are two states. In state one the upper actve swtch S s turned on and the second (lower) actve swtch S L s turned off. Fgure 12 shows ths swtchng state one. The state space equatons are now ( ) (... ) d 1 L L R + RZ + RL + RS u + uk + = L + RZ 1 + N ZK (7) du L = (8) du = (9) Z L N ZK leadng to the state space descrpton gven n equaton 1. R + RZ + RL + R 1 1 S RZ RZ RZ 1 L.. L L L L L L L. d 1 u u.... = + u Z u Z N 1.. ZK ZK ZK ZK ZK (1) ISSN: Issue 9, Volume 9, September 21

5 In state two the upper actve swtch S s turned off and the lower S L swtch s turned on. Fgure 13 shows ths swtchng state two. Fg. 12. Swtchng state one: drvng state Fg. 13. Swtchng state two: freewheelng phase of the power stage The descrbng equatons are d 1 ( ) L L RZ + RL + RSL + uk + = L + RZ ( N ZK) (11) du = (12) duz L N ZK = (13) leadng to the systems state space descrpton gven n equaton 14. ombnng the two systems by the state-space averagng method leads to a model, whch descrbes the converter (actve flter) n the mean. On condton that the system tme constants are large compared to the swtchng perod, we can combne these two sets of equatons. Weghed by the duty rato, the combnaton of the two sets yelds to equaton 15. y ths matrx equaton the dynamc behavour of the converter s descrbed correctly n the average, thus quckly gvng us a general vew of the dynamc behavour of the converter. The supermposed rpple (whch appears very pronounced n the col) s of no mportance for qualfyng the dynamc behavour. Ths model s also approprate as large-sgnal model, because no lmtatons wth respect to the sgnal values have been made. The weghed matrx dfferental equaton representng the dynamc behavor of the converter s a nonlnear one. To use the possbltes of the lnear control theory, a lnearzaton of the state matrx s necessary. Wth captal letters for the operatng pont values and small letters for the dsturbance around the operatng pont L = I L+ L (16) u = + u (17) d = D + d (18) one can calculate the lnearzed small sgnal model of the converter accordng to equaton 19. RZ + RL + RSL 1 RZ RZ RZ 1.. L L L L L L L. d u u.... = + + u Z 1 u Z N.. ZK ZK ZK ZK ZK (14) ( R + RS ) d+ RZ + RL + RSL (1 d) d 1 RZ RZ RZ 1 L.. L L L L L L L. d d u u.... == + u Z u Z N 1.. ZK ZK ZK ZK ZK (15) ISSN: Issue 9, Volume 9, September 21

6 ( R + RS ) D + RZ + RL + RSL (1 D ) D 1 L L L L L d D u = u + uz 1 uz ZK RZ RZ RZ ( R + RS RSL ) IL 1.. L L L L. I. L +... N ZK.. ZK ZK ZK d (19) 4. apactor estmaton sng capactors n parallel to the solar panel alone we have an nput current of a sngle converter accordng = I snωt. (2) The mean value of the nput current should be the optmum power pont current of the panel and can be calculated to T / 2 _ 2 2 I = I snωt = I. (21) T π The necessary capactor to avod hgher voltage varaton then u has to be calculated wth t1 2 I 2 = + t u snω, (22) π wth 1 2 t 1 = arcsn (23) 2π f π and s therefore 2 I = arcsn (24) u π f π π π In the 5 Hz mans one can wrte the dmensonng equaton I = 1,34 mf. (25) u Wth n panels n such capactors are necessary. sng the maxmum power pont current as constant nput current of the converters, only small capactors n parallel to the panels are necessary to brdge a gap of the maxmum length of the converter swtchng perod, the nverse of the converter swtchng frequency f s I 2 =. (26) u π f s Takng for example a swtchng frequency f s = 5kHz the necessary parallel capactor s I = 12,7 µ F. (27) u Fg. 14. Relatonshp of /( n I ) to the factors m (hgher voltage level) and a (ncreased voltage rpple ). ISSN: Issue 9, Volume 9, September 21

7 Storng the energy at a factor m hgher voltage level and a a-tmes hgher voltage rpple, one needs a storage capactor of n I =. (28) m a In Fg. 14 t can be seen that a ncreased voltage rpple and hgher D-lnk voltage wll lead to sgnfcantly reduced capactor requrements. To clarfy ths behavor an example arrangement of eght solar strngs, each operatng at MPP =44V, delverng P S =24W and supported wth an actve Flter stage wth =1µF, s smulated to show the nput voltage rpple rato R / R for varyng flter voltages and nput capactors. The relatonshp can be estmated to R =. (29) R n I 5. Smulaton of the compensator To clarfy the flter operaton a sample arrangement of solar strngs, each consstng of ten solar modules (Kyocera K-12-2) are modeled. The strngs are controlled separately for MPP operaton and fed nto a 12V D-lnk. For the mans nterface a smple transformer coupled nverter (c.f. Fg. 3) s used. In our case a system as depcted n Fg. 1 wth a current mode controlled actve flter stage shown n Fg. 11 was treated n detal. The flter was operated at =4V, a swtchng frequency of 25kHz was chosen for mnmum EM-problematc and swtchng losses. The fgures 16 and 17 depct the mathematcal smulaton results of the operatng flter for two nterventon levels. Fg. 15 Voltage rpple relatonshp R / R dependng on nput capactor and flter voltage level. As one can see n Fg. 15 an actve flter operatng at more than sx tmes the nput voltage (approxmately 25V n our case) wll lead to a satsfactory nput current rpple suppresson. Hgher voltage levels can help to reduce the system requrements compared to a conventonal soluton or mprove the system behavor leadng to a sgnfcantly reduced component stress n the cells. y usng a flter voltage level of 4V a rpple reducton of more than 7% (compared to 25V) can be acheved when the same components are used. Fg. 16. Flter behavor, 1% compensaton (from top to bot.): Input voltage, array current, buffer capactor s current, compensator & load current. Fgure 16 shows full compensaton. Here no lowfrequency rpple can be found n the nput capactor s (we assumed 2uF) current only swtchng rpple occurs. The over-all effcency (as well as the MPPeffcency) of the system reaches 99% n ths case. ontrary to ths case n Fg. 17 the results of a 5% compensated system are depcted. ISSN: Issue 9, Volume 9, September 21

8 Due to the nput current rpple, the resultng MPP msmatch leads to a reducton of about 6% of the over all effcency. To show the further benefts of usng an actve cancellaton flter the D-lnk current spectrum was taken nto consderatons. As one can see n Fg. 18 the optmal usage of the flter stage can help to reduce the EM problematc of the solar arrangement when also harmoncs cancellaton algorthms are used. 1 2 Hard Swtchng Leg I(DL) [A] Advanced Structure I(DL) [A] Fg. 17. Flter behavor, 5% compensaton (from top to bot.): Input voltage, array current, buffer capactor s current, compensator & load current. Two further aspects gave us the potental of addtonal mprovements: The nput stages can be operated n phase shft mode at the same carrer frequency leadng to a sgnfcantly mproved rpple current n the D-lnk. Ths can help to mnmze rpple cancellaton capactors and addtonal swtchng frequency flter elements. It has to be noted that n ths case a dedcated controller s requred to guarantee optmal phase delay dependng on avalable stages. Another nterestng aspect s the capablty of actve harmoncs cancellaton by usng a dedcated flter algorthm. In the prevous dscussed sectons we used the flter only to elmnate current rpple of the solar cells (our flter was only used as a specal storage cell to elmnate the mans current pulsaton). The flter stage s operated at 25kHz, so there was enough potental also to mplement a harmoncs flter for the D-to-A nverter f[hz] Fg. 18. D-lnk current spectrum (EM) comparson of a conventonal topology (upper fgure) and the advanced structure usng an actve flter (lower fgure). Fgure 19 depcts the nfluence of phase number and duty cycle on the output current rpple of a multphase arrangement. For generalzaton n the graph, the output current rpple I R,PP s normalzed aganst the nductor current rpple of one nverter stage at zero duty cycle I R VO, PP = K. (29) L f b In fgure 2 one can see the RMS nput current rpple I IR,RMS dependng on duty cycle for dfferent phase arrangements. In ths graph, the RMS nput current rpple of the step down cell (c.f. Fg. 2) s normalzed aganst the D-lnk current I DL. The duty-cycle depends ISSN: Issue 9, Volume 9, September 21

9 on the relatonshp of nput / output voltage, n our example varyng n the range from 1 to 9 percent. onsequently, there exsts an optmum phase number to acheve the mnmum RMS nput current rpple for a fxed nput and output applcaton. For a wde duty cycle range applcaton, hgher phase number helps to reduce the maxmum nput current rpple. ut the reducton n the nput current rpple by ncreasng phase number may not be sgnfcant at hgher phase numbers n certan duty cycle ranges. The optmum phase number needs to be evaluated over the complete operatng duty cycle range. It should once more be noted, that a rpple reducton drectly affects the component stress n the solar cells. Fg. 19. Normalzed output current rpple factor K vs converter duty cycle D, shown for 1 (blue), 2 (cyan), 3 (magenta), 4(green), and 8 (black) phase step down confguratons. Fg. 2. Normalzed RMS nput current rpple I R,RMS vs duty cycle D, shown for 1 (blue), 2 (cyan), 3 (magenta), 4(green), and 8 (black) phase nverter confguratons. 6. oncluson The proposed soluton mproves effcency as well as component relablty n solar-, fuel cell- and battery fed nverter applcatons by an actve reducton of the source current rpple. As a result the source s only loaded wth a perfect D-current, whch helps to ht the maxmum power pont wthout any dynamc dstortons. Furthermore, the nput capactor can be decreased, because a common energy storage element s used operatng at hgher voltages wth hgher effcency. As shown n Fg. 1 the approach can be used to optmze the as well as the system behavour and the over-all effcency. It should be noted, that for optmum plant effcency a load sharng control system should be establshed. The smple prncple of the parallel operaton of controlled current sources forms a robust and fault-tolerant system. The proposed topology can be used as an alternatve to mult-stage converters wth a constant D-lnk voltage and an actve swtchng D-to- A nverter. The power stage of the used flter conssts of a smple half brdge arrangement feedng the rpple current. The converter s operated at several 1kHz leadng to a tolerable low output current rpple. heap TO-247 or even TO-22 or cheap surface mount packages can be used leadng to a compact and effcent system desgn [6,7,8,9,1]. The effectve usage of mult-phase nput cells coupled wth an actve flter show us the capablty to reach the goal of hgh effcency, reduced current harmoncs and mproved EM. Furthermore t should be noted that the parallel structures are formng a redundant system whch can be used to ncrease the systems relablty by buldng a fault tolerant arrangement. All these advantages can smply be realzed n software and do not affect the hardware. ISSN: Issue 9, Volume 9, September 21

10 The smple control prncple of the power stages can easly be mplemented usng state-of-the-art mcrocontrollers wthout addtonal logc support for the pulse pattern generator; a smple PWM stage fulflls all the requrements. Also the maxmum power pont trackng for the solar generator can be easly mplemented by montorng the system sgnals ( 1.. N, and ZK.). The topology presented n ths paper s a smple and effectve soluton for small to medum power grd coupled applcatons. The concept s well suted for wnd-, solar- and renewable energy as well as for aerospace applcatons. References: [1] Wa, R; Ln, : Actve Low-Frequency Rpple ontrol for lean-energy Power ondtonng Mechansm, Proceedngs of the IEEE Transactons on Industral Electroncs 1-21, Vol.: PP, Issue: 99, pp.: 1-1 [2] Veerachary, M.; Senjyu, T.; ezato, K.: Maxmum power pont trackng control of ID converter suppled PV system, Proceedngs of the IEE Electrc Power Applcatons 21, Vol.: 148, Issue: 6, pp.: [3] Duran, E.; Galan, J.; Sdrach-de-ardona, M.; Segura, F.: An applcaton of nterleaved D-D converters to obtan I-V characterstc curves of photovoltac modules, Proceedngs of the 34th IEEE Annual onference of Industral Electroncs, IEON 28, pp.: [4] Hung, J.-.; Wu, T.-F.; Tsa, J.-Z.; Tsa,.-T.; hen, Y.-M.: An actve-clamp push-pull converter for battery sourcng applcatons, Proceedngs of the Twenteth Annual IEEE Appled Power Electroncs onference and Exposton, APE 25. Volume 2, March 6-1, 25, pp [5] Edelmoser, K. H;. Ertl, H.: "D-to-D onverter for Low Voltage Solar Applcatons", Proceedngs of the 11th WSEAS Internatonal onference on rcuts, Systems, ommuncatons and omputers S '7, rcut Theory and Applcatons, July , Ag. Ncolaos, Greece, ISN: , pp.: [6] K. H. Edelmoser, F.. Zach: "D-to-D onverter Wth Extended Voltage Transfer Rato, Optmzed for -Drectonal Operaton", WSEAS Transactons on Power Systems, Issue 6, Volume 1, June 26, ISSN: , pp.: [7] K. H. Edelmoser: "ommon Mode Problematc of Solar Inverter Systems", Proceedngs of the 1th WSEAS Internatonal onference on rcuts, Systems, ommuncatons and omputers S '7, rcut Theory and Applcatons, July , Ag. Ncolaos, Greece, D-ROM, ISN: , pp.: [8] K. H. Edelmoser: "Three Level D-to-A Power Inverter for Power Grd Operaton ", Proceedngs of the 7th WSEAS Internatonal onference on rcuts, Systems, ommuncatons and omputers S '5, July , Athen, Greece, D-ROM, ISN: , pdf. [9] : "Effcency Optmzed, EMI-Reduced Solar Inverter Power Stage ", Proceedngs of the 11th WSEAS Internatonal onference on rcuts, Systems, ommuncatons and omputers S '8, Heraklon, Greece, July 22-24, 28. ISN: ISSN: [1] K. H. Edelmoser, H. Ertl, F.. Zach: "A Mult-ell Swtch-Mode Power-Supply oncept Featurng Inherent Input Voltage alancng", Proceedngs of the 1th WSEAS Internatonal onference on rcuts, Systems, ommuncatons and omputers S '6, July , Athen, Greece, D-ROM, ISN: , pdf. [11] : D-to-D Solar onverter wth ontrolled Actve lampng System, Proceedngs of the 12th Internatonal Power Electroncs and Moton ontrol onference (EPE-PEM 26), August 3 - September 1, 26, Portoroz, Slovena, pp.: ISSN: Issue 9, Volume 9, September 21