Power Factor Correction with AC-DC Buck Converter

Transcription

1 Internatonal Journal of Electrcal Engneerng. IN Volume 8, Number 1 (2015), pp Internatonal Research Publcaton House Power Factor Correcton wth ACDC Buck Converter N.Venkateswarlu 1, B.Narasmha Kartheek 2, Dr. L.V.Narasmha Rao 3, V.Ramesh 4 Assstant Professor 1,2 & Professor 3, Research cholar 4 K L Unversty, Guntur, Andhra Pradesh Inda Emal: venk280@gmal.com 1, lvnrao1964@gmal.com 3, kartheek@klunversty.n 2 rameshvadd6013@klunversty.n 4 Abstract In ths Paper the mproved buck power factor correcton (PFC) converter topology s proposed. Ths topology s easer to acheve the smple structure compared wth the conventonal buck PFC converter. Dead zones n ac nput current of tradtonal buck PFC converter can be elmnated by addng an auxlary swtch and two dodes. The mproved buck PFC converter s to force that operates n crtcal conducton mode (CCM) and mproved constant ONtme control s proposed and utlzed. To meet the IEC60032 class C standard wthn the unversal nput voltage range Wth optmal control parameters, nearly unt power factor can be acheved and the nput current harmoncs can be mnmzed. Moreover, the effcency of the proposed converter s not deterorated compared to the conventonal buck converter. Index Terms PowerFactorCorrecton (PFC), Buck Converter, MOFET, MAT LAB/mulnk I. INTRODUCTION ome specal power products such as lghtng equpments power factor correcton (PFC) s a good method for provdng an almost snusodal nput current. The boost converter s the most popular topology for PFC applcaton due to ts nherent Current shapng ablty.however wth unversal nput usually a 400Vdc output voltage s requred for the boost PFC.the boost PFC cannot acheve hgh effcency at low lne. Input because t works wth large duty cycle n order to get hghvoltage converson gan. econd, the voltage across the man swtch of the buck converter s almost clamped to the nput voltage.thererefore, the buck PFC converter can acheve

2 30 N.Venkateswarlu et al relatvely hgh effcency wth n the unversal nput voltage range. When the nput voltage s hgher than the output voltage, the proposed converter operates n buck mode, whch s same as the conventonal buck converter. When the nput voltage s lower than the output voltage, the proposed converter operates n buckboost mode. Hence, there are no dead zones n the nput current.[1] The detaled operaton prncple s llustrated n ecton II and the crcut parameters desgn consderatons are presented n ecton III.Fnally, the expermental results based on a 0W prototype wll be gven n ecton I Fg1.Proposed mproved buck PFC converter In ths paper, an mproved buck converter s proposed as shown n Fg1.Compared wth the conventonal buck PFC converter, an auxlary swtch and two dodes are added n the mproved buck PFC converter. [2]The proposed converter has two dfferent operaton modes n lne perod. When the nput voltage s hgher than the output voltage, the proposed converter operates n buck mode, whch s same as the conventonal buck converter. II. PRINCIPLE OF OPERATION A. Postve BuckBoost Operaton Mode When the nput voltage Vac s n postve half cycle and then magntude of Vac smaller Than Vo,the proposed converter operates buckboost mode. Durng ths mode, wtch Q 1 keeps OFF and swtches Q2 keepng swtchng.[3]there are two stages When the proposed converter operates under ths mode tage 1: When swtch Q2 s ON, The proposed converter operates n stage 1. The equvalent crcut of ths stage s shown n fg 2(a).The nductor L s change by Vac through D 1 and D 6, and L ncreases durng ths stage

3 Power Factor Correcton wth ACDC Buck Converter 31 (a) (b) tage 2: When swtch Q2 s OFF, the proposed converter operates n stage2. The equvalent crcut of ths stage s shown Fg 2(b). The nductor L s dscharged by Vo through D0 and L decreases durng ths stage B. Postve Buck Operaton Mode When the nput voltage Vac s n postve half cycle and the Magntude s larger than V O, the proposed converter operates n buck mode. [4]Durng ths mode, swtch Q2 keeps OFF and swtch Q1 keeps swtchng. There are two stages when the proposed converter operates under ths mode. (c)

4 32 N.Venkateswarlu et al tage 3: When swtch Q1 s ON, the proposed converter Operates n stage3.the equvalent crcut of ths stage s shown n fg 2(c).The nductor L s change by VacVo through D1 and D4and Il ncreases durng ths stage. (d) tage4: When swtch Q1 s OFF, the proposed converter operates n stage 4. The equvalent crcut of ths stage s same As that of stage2,as shown n fg.2(b).the nductor L s dscharge by Vo and Do and L decrease durng ths stage dscharged by Vo through Do, and L decreases durng ths stage. (e) Fg 2.Equvalent crcuts of the proposed converter n eght stages. When the nput voltage Vac s n negatve half cycle, there also ext two operaton modes of negatve buckboost operaton mode and negatve buck operaton mode of the proposed converter. The negatve operaton processes can also be separated nto four operaton stages defne as stages 58 and the equvalent crcut nclude Fg2 (b),(d) and (e).the negatve half cycle operaton processes of the proposed converter are smlar to those of the postve half cycle.for smplcty, the negatve operaton processes are not depcted n detal here

5 Power Factor Correcton wth ACDC Buck Converter 33 III. CONTROL TRATEGIE OF PROPOED YTEM Dscrete PI Controller 1 z PI yy Unt Delay1 Conver Reference voltage Pulse Generator Data Type Converson Q [] Constant [s] From1 Product <= Relatonal Operator R!Q R FlpFlop Goto3 [D] Goto4 Conver Constant1 Pulse Generator1 Data Type Converson2 <= R Q!Q [A] Goto5 [sa] From3 Product1 Relatonal Operator1 R FlpFlop1 Fg3.control strateges of proposed system An mproved COT control s appled for the proposed buck PFC converter to force t that operates n CCM as shown n fg 3.The output voltage s detected wth a level shft crcut formed by a hghvoltage transstor Q 2 and the resstorsra 1 ~Ra 4. some Key wave forms are shown n fg4. Usually, V boundary s set to reflect the output voltage Vo wth the same rato as that V_n reflects Vn.Vph s hgh logc. Fg4.Control strateges crcut current wave form When V _n s hgher than Vboundry and s low logc when V _n s lower than Vboundry. The detected output sgnal VFB s sent to the negatve nput of the error amplfer Uf. The error between VFB and the set reference Vref s amplfed by the compensaton networks Cf and an amplfed error sgnal Vcomp s acheved. The dc voltage sgnal V _comp appled to control the conducton perod TON s acheved from Vcomp through a control networks formed by resstors R1 and R2 and swtch 1. wtch 1 s controlled by the control sgnal Vph. V 1 COMP =

6 g D 2 c 1 34 N.Venkateswarlu et al The zerocrossng pont of the nductor current L s detected by the auxlary wndng of the nductor L. Ths nductor current zerocrossng detecton sgnal VZCD can be appled n both buckboost modes. When the nductor current L falls t zero, the output voltage auxlary wndng VZCD starts to fall. Once VZCD falls to zero, the output of comparator Uc2 jumps from low level to hgh level. [5][8]Ths level transton sets the drvng sgnal from low level to hgh level. IV. IMULATION REULT A. Conventonal crcut A nput and 80 Vdc output s bult up to verfy the proposed buck PFC converter. The schematc of the prototype s shown n Fg. 4 wth the key parameters. [6]The mproved Constant ON Tme Control(COT) control shown n Fg. 5 s appled for the prototype and the control crcut s realzed wth dscrete components. The coeffcent k s set to 1/4 by the network of R1 and R2. For comparson, a 0 W prototype of the tradtonal buck PFC converter s also bult up. MOFET CURRENT AND GATE CURRENT [] From4 g D m <MOFET current> cope3 cope2 cope1 Dscrete, s = 5e005 s powergu Tmer v A B C1 L2 [D] From5 Dode1 L1 C v cope V I PQ power f actor POWER FACTOR Unversal Brdge [s] Goto1 OURCE VOLTAGE AND OURCE CURRENT 1 z Dscrete PI Controller PI yy Unt Delay1 Conver Reference voltage Pulse Generator Data Type Converson Q [] Constant [s] From1 Product <= Relatonal Operator R!Q R FlpFlop Goto3 [D] Goto4 Fg 5 mulaton dagram for Conventonal BUCK Converter for PFC Fg6.Input voltage and current

7 Power Factor Correcton wth ACDC Buck Converter 35 Fg7. Key waveforms n the mproved COT control dagram \ Fg8. Measured nput voltage and nput current waveforms of buck PFC converter. Fg9. Measured conventonal power factor wave form Measured nput voltage and nput current waveforms of the conventonal buck PFC converter wth full load at 90 Vac nput are shown n Fg. 8

8 g D c 1 36 N.Venkateswarlu et al B. Proposed Crcut MOFET CURRENT AND GATE CURRENT Dscrete, s = 5e005 s powergu [] From4 g D m <MOFET current> <MOFET current> cope3 cope2 cope1 [sa] [A] g m Goto Tmer v A B From C1 D L2 [D] From5 Dode1 L1 C 2V v cope I PQ power factor POWER FACTOR Unversal Brdge [s] Goto1 Dscrete PI Controller OURCE VOLTAGE AND OURCE CURRENT 1 z PI yy Unt Delay1 Conver Reference voltage Pulse Generator Data Type Converson Q [] Constant [s] From1 Product <= Relatonal Operator R!Q R FlpFlop Goto3 [D] Goto4 Conver Constant1 Pulse Generator1 Data Type Converson2 <= R Q!Q [A] Goto5 [sa] From3 Product1 Relatonal Operator1 R FlpFlop1 Fg.mulaton dagram for Proposed BUCK Converter for PFC Fg11.Input voltage and current Fg12. Key waveforms n the mproved COT control dagram Fg13.Measured nput voltage and nput current waveforms of buck PFC converter

9 Power Factor Correcton wth ACDC Buck Converter 37 Fg14. Measured Proposed Buck Converter power factor wave form Measured nput voltage and nput current waveforms of the proposed buck PFC converter wth full load at 90 Vac nput are shown n Fg. 9 the nput current waveforms ft well wth the calculaton results as shown n Fg..Measured PF at dfferent nput voltage wth full load of the buck PFC converter and the proposed converter s shown n Fg. 11. Obvously, the proposed converter can mprove the PF greatly especally at low lne voltage. V. CONCLUION The proposed buck PFC converter topology n ths paper s easy to acheve as the structure of the topology s smple. To operate n CRM, an mproved COT control s proposed. Nearly unt PF can be acheved and the nput current harmoncs can meet the IEC60032 class C standard wthn the unversal nput voltage range, whereas the effcency s not deterorated compared to the conventonal buck converter. However, the cost and sze ncrease lttle compared to the whole cost and sze.. In concluson, ths proposed converter s very sutable for ndustral applcatons. REFERENCE [1] E. L. Huber, B. T. Irvng, and M. M. Jovanovc, Effect of valleswtchng and swtchngfrequency lmtaton on lnecurrent dstortons of DCM/CCM boundary boost PFC converters, IEEE Trans. Power Electron., vol. 24, no. 2, pp , Feb [2] L. Huber, J. Yungtaek, and M. M. Jovanovc, Performance evaluaton of brdgeless PFC boost rectfers, IEEE Trans. Power Electron., vol. 23, no. 3, pp , May [3] Y. Fe, R. Xnbo, Y. Yang, and Y. Zhhong, Interleaved crtcal current mode boost PFC converter wth coupled nductor, IEEE Trans. Power Electron., vol. 26, no. 9, pp , ep [4] M. Mahdav and H. Farzanehfard, Brdgeless EPIC PFC rectfer wth reduced components and conducton losses, IEEE Trans. Ind. Electron., vol. 58, no. 9, pp , ep [5] E. H. Ismal, Brdgeless EPIC rectfer wth unty power factor and reduced

10 38 N.Venkateswarlu et al conducton losses, IEEE Trans. Ind. Electron., vol. 56, no. 4, pp , [6] M. A. Alaffar, E. H. Ismal, and A. J. abzal, Integrated buck boost quadratc buck PFC rectfer for unversal nput applcatons, IEEE Trans. Power Electron., vol. 24, no. 12, pp , Dec [7] J. M. Alonso, J. V na, D. Gaco, L. Campa, G. Mart ınez, and R. Osoro, Analyss and desgn of the quadratc buckboostconverter as a hghpowerfactor drver for powerled lamps, n Proc.IEEE IECON, Nov. 20, pp [8] L. YenWu and R. J. Kng, Hgh performance rpple feedback for the buck untypowerfactor rectfer, IEEE Trans. Power Electron., vol., no. 2, pp , Mar