Transient performance and design issues for a parallel-connected voltage sag and outage compensator

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1 Transent performance and desgn ssues for a parallel-connected voltage sag and outage compensator Transent performance and desgn ssues for a parallel-connected voltage sag and outage compensator Semens AG EV P4 Postfach 32 D-915 Erlangen Phone: +49 ()9131 / Fax: +49 ()9131 / Leon.Voss@erls4. semens.de Andreas Stemel Ranald Lürck Ruhr-Unverstät Bochum Lehrstuhl EAEE D-4478 Bochum Phone: +49 ()234 / Fax: +49 ()234 / stemel@eaee. luerck@et. ruhr-un-bochum.de ruhr-un-bochum.de Keywords Effcency, Emergng Topologes, Power Condtonng, Power Qualty, Power Semconductor Devces, Unnterruptble power supples (UPS) Abstract A compensator s presented for mtgaton of voltage sags and outages n ndustral power systems. The system s based on a commercal Power Condtoner and s approprate for load ratngs from 1 kva up to several MVA. Transent performance s nvestgated by smulaton and wth a 1 kva lab prototype. Desgn ssues and a dscusson of the requred fault detecton scheme are presented. Introducton Growng competton and a requrement for greater process effcency have ncreased the sgnfcance of Power Qualty ssues for both utltes and ndustry. Supply relablty has ganed partcular mportance n recent years. It s now well documented that even mnor short-term fluctuatons n the supply voltage (e.g. +/- 25 % for two cycles) can lead to costly dsturbances n producton e.g. [1]. The qualty of voltage supply s defned n varous natonal and nternatonal standards, notably [2]. In general, the standards do not specfy a specfc tolerable occurrence rate for voltage dsturbances, but rather classfy the types of events and recommend equpment compatblty levels. A commonly used defnton of equpment senstvty s the ITI (CBEMA) curve [3]. Varous types of compensators have been nstalled to mtgate voltage dsturbances. In partcular Dynamc Voltage Restorer (DVR) technology has been nstalled where sags are most prevalent [4][5]. On-lne UPS systems are the standard soluton when total outage compensaton s requred [6]. Ths paper presents a power electroncs-based voltage compensator sutable for mtgaton of both voltage sags and outages. The system conssts of an Insulated Gate Bpolar Transstor (IGBT) voltage source converter (VSC) connected n parallel wth the load, an IGBT-based electronc swtch and an energy storage system. Ths topology s generally referred to as an off-lne UPS (Unnterruptble Power Supply) system. Such systems are commercally avalable for load ratngs up to about 2 kva. Ths paper consders the possblty of applyng the off-lne UPS concept to loads up to several MVA. The compensator s based on a commercal Power Condtoner [5] wth mnor changes to the control software. These Power Condtoners are avalable up to ratngs of several MVA. An IGBT electronc swtch was developed specfcally for ths applcaton. The new system, targeted at ndustral loads rated from 1 kva up to several MVA, performs the functon of a UPS system whle addtonally provdng power condtonng functonalty under normal network condtons. EPE '99 - Lausanne P. 1

2 Transent performance and desgn ssues for a parallel-connected voltage sag and outage compensator Basc Crcut and Operatng Modes Fg. 1 shows the basc confguraton of the system. The compensator conssts of a parallel connected voltage source (IGBT VSC wth couplng flter) and an electronc swtch for fast dsconnecton from the network under fault condtons. Suffcent energy storage must be provded to supply the load for a defned perod of tme. Further requrements are an electronc system for fast fault detecton, and a mechancal bypass. Mechancal Bypass etwork u Electronc Swtch S L Load Couplng Flter Measurement and Fault Detecton Hardware Coordnaton Voltage Source (wth Energy Storage) Fg. 1: Basc crcut of the voltage sag/outage compensator Stand-by Mode Under normal operatng condtons (.e. over 99 % of the tme), the network voltage s a balanced snusodal supply wth mnmal dstorton and wthn an agreed tolerance of the nomnal fundamental frequency ampltude [2]. Under these condtons, the VSC current can be controlled to almost zero, thus mnmzng the VSC losses. Alternatvely, the VSC frng pulses could be blocked, thus elmnatng the IGBT swtchng and conducton losses altogether. Ths scheme also avods backfeedng a fault, provded that the VSC starts to operate at the same tme as the swtch s opened. UPS Mode Upon detecton of a voltage sag or outage, the electronc swtch must be opened n order to decouple the load from the faulted network. The VSC then supples full load current. The phase and magntude of the pre-fault supply voltage should be mantaned at the load termnal. As shown n Fg. 1, only the network voltage s measured. Therefore n UPS mode, no synchronzaton wth the network frequency s possble. Slght frequency varatons (.e. ±.1%) are possble under these condtons due to naccuraces n the VSC nternal clock. As a result, a sgnfcant phase dfference can exst between the load voltage suppled from the VSC and the restored network voltage. A phase shft could also be caused by a change n the network operatng pont after a fault s cleared. Resynchronzaton of the load wth the restored network voltage must be performed before swtchng back to the network. Ths must be done over a number of network cycles to avod dsturbng phase-controlled loads such as thyrstor converters. Power Condtoner Mode It s also possble to perform auxlary power condtonng tasks durng stand-by mode. Possble power condtonng tasks whch could be mplemented n addton to the UPS functon are [5][7]: Reactve power compensaton Flcker compensaton Actve flterng of dscrete harmoncs Compensaton of unbalanced loads Peak power levelng EPE '99 - Lausanne P. 2

3 Transent performance and desgn ssues for a parallel-connected voltage sag and outage compensator In general, the controlled VSC current for these cases wll be called R. A transton to UPS mode requres that these auxlary controls be dsabled wthn a few mllseconds of openng the electronc swtch. Allowng the power condtonng control system(s) to operate wth the network voltage dsconnected could result n unstable operaton. Bypass Mode A mechancal bypass must also be ncluded to allow for system mantenance or to prevent a fault n the VSC or electronc swtch from dsturbng load operaton. Furthermore, f a fault occurs on the load sde of the electronc swtch, t may be necessary to bypass n order for the protecton scheme to clear the fault. The mechancal bypass must therefore be dmensoned to swtch on fault currents. Summary Table 1. summarzes the varous operatng modes n terms of the currents n Fg. 1. Stand-by Mode S L Power Condtoner Mode = L R S = R UPS Mode Bypass Mode S = = = L S = L Prelmnary Smulaton Results Table 1. Operatng modes of the off-lne UPS system To verfy the concept and to analyse the transent requrements of the compensator, the system was modelled wth the smulaton program ETOMAC [8]. Fg. 2 shows a smulaton result, where a sngle-phase 4 % voltage sag appears n the network voltage u. A tme delay of 1.25 ms between the fault occurrence and dsconnecton s assumed. 1.5 etwork Voltage [pu]. t f t d Load Voltage [pu] etwork Current [A] VSC Current [A] Load Current [A] Tme [ms] Fg. 2. Smulaton results from ETOMAC - 4 % Sngle-phase voltage sag EPE '99 - Lausanne P. 3

4 Transent performance and desgn ssues for a parallel-connected voltage sag and outage compensator The electronc swtch s modelled as 2 deal IGBTs (two-resstance model) wth freewheelng dodes.the VSC s modelled as an deal pulsewdth modulated voltage source behnd an LCL flter. For the prelmnary smulaton study, t s assumed that the dc-lnk voltage of the VSC remans constant. The load s modelled as a balanced seres R-L-branch wth cos( ϕ ) =.6. A crtcal pont n the ratng of the VSC s the tme between a fault occurrence and the decson to dsconnect. As can be seen by the rapd ncrease n VSC current n Fg. 2, the VSC wll "backfeed" the fault untl dsconnecton occurs. Falure to dsconnect from the faulted network wthn several mllseconds would result n a protectve shutdown. A very fast detecton scheme s therefore requred. t f t d β pre-fault post-fault α Fg. 3. Smulaton of load voltage space vector (R-L load) wth voltage sag compensaton (.25 ms between + symbols ) A further sgnfcant ssue s demonstrated wth the ad of the load voltage space vector plot shown n Fg. 3. The sudden commutaton of the load current from the network to the VSC results n a step change n magntude of the VSC current space vector. Ths results n a damped oscllaton n the voltage across the LCL couplng flter, and therefore an oscllaton n the load voltage. Ths form of transent s referred to by ITI (CBEMA) as a low frequency decayng rngwave, and s contaned wthn the tolerable regon of the CBEMA curve [3]. onetheless, ths transent s more severe than for a standard on-lne UPS, and further nvestgatons are requred to analyse the senstvty of loads to such transents. Fg. 4 depcts the network voltage and current space vectors for the above smulaton. In the 1.25 ms between fault occurrence and detecton, the network voltage space vector leaves the nomnal crcular postve-sequence trajectory, and the current space vector actually changes ts drecton of rotaton and ncreases n magntude rapdly. These sudden changes n the network space vectors can be used to detect a fault condton. In partcular the transformaton of these space vector quanttes to a rotatng reference frame s useful as dscussed below. u β β u α α Fg. 4 : etwork voltage and current space vectors at voltage sag occurrence tme marked n.25 ms ntervals from tme of fault untl tme of dsconnecton Fnally, the smulatons ndcate that despte the presence of a flter capactor, swtchng overvoltages wll occur when the electronc swtch s opened. Metal-oxde varstors are therefore requred to absorb the nductve energy at the swtchng nstant to avod damagng overvoltages at the load bus or across the swtch tself. EPE '99 - Lausanne P. 4

5 Transent performance and desgn ssues for a parallel-connected voltage sag and outage compensator Descrpton of 1 kva Lab Prototype Overvew To further verfy the performance and desgn ssues of the proposed compensator, a lab prototype has been developed. The system s based on a standard ndustral power condtoner as n [5] wth mnor modfcatons to the control software as necessary. The VSC s rated for 16 A rms contnuous wth 5 % overload capablty for one mnute. The electronc swtch s mplemented wth an ant-seres connecton of two standard IGBT modules wth ntegrated free-wheelng dodes. The IGBTs are rated for a contnuous collector current of 5 A. Fg. 5 shows the sngle lne dagram of the compensator. u Metal Oxde Varstors network U om = 38 V S k' = 4 kva Autotransformer IGBT Electronc Swtch Addtonal 3.3 mf dc-lnk capactor S Varous Loads C d Dode Brdge 16 A voltage source converter (C d =.95 mf) and couplng flter Fg. 5 : Sngle-lne dagram of lab model used for verfcaton of smulaton results A dode brdge s used to smulate energy storage at the dc termnals of the VSC. In practce, the energy storage system could be a battery, flywheel, ultracap or SMES, dependng on the duraton of compensaton requred. An autotransformer s ncluded to reduce the network voltage to 34 V. Ths allows the VSC to supply rated voltage to the load even when the dc-lnk voltage s defned by the dode brdge output from the 38 V supply. Control system The compensator control system conssts of two prncpal elements. The VSC converter control s a mcroprocessor-based dgtal system wth a samplng frequency of 3 khz. The fault detecton system, n addton to the network voltage and current space vector transformatons are mplemented wth analog/dgtal electronc crcutry. Both the VSC converter control system, and the assocated fault detecton are based on space vector quanttes. Gven a 3-phase, 3-wre supply voltage, the phase voltages can be converted to a space vector n the statonary reference frame as n (1). The transformaton apples equally to 3-phase 3-wre currents. 2 2 u () t = ur() t + a us() t + a ut() t 3 (1) Assumng a constant supply frequency, and gven a dgtal controller wth a samplng perod T s, then the fundamental frequency postve-sequence component (ndex +1) of a space vector can be determned by a two-dmensonal dscrete fourer transformaton (DFT) as n (2). The correspondng nverse transformaton back to the tme doman s gven by (3). + 1 j 2 π n 1 u 1 ( n Ts) = u ( n Ts) e (2) n= j 2 π n u 1 ( n Ts) = u1 ( n Ts) e (3) EPE '99 - Lausanne P. 5

6 Transent performance and desgn ssues for a parallel-connected voltage sag and outage compensator The quantty u 1 from (3) s referred to as the no-load voltage. Under deal condtons, no current would flow n the VSC when the no-load voltage s generated at the converter termnals. In practce, due to the LCL flter capactance and samplng/flterng delays, a certan current wll flow under noload condtons. Ths current can be reduced practcally to zero by reactve power compensaton [7] usng a supplementary voltage component u PC () t. Upon transton to UPS mode, the electronc swtch s opened, dsconnectng VSC and load from the supply network. To mantan phase and magntude of the pre-fault supply voltage, the fundamental frequency Fourer components of the supply voltage are retaned by a latchng logc, and the power condtonng control loops are dsabled untl re-synchronzaton occurs. The basc structure of the controller s shown n Fg. 6. u () t () t R,S,T α,β R,S,T α,β Fault detecton u t u 1 DFT(1+) u () t 1 IDFT(1+) + Storage of Freq. Components () t Fault detecton Latch Algorthm u Power condtonng Algorthm(s) PC () t VSC Frng Control Fg. 6. Basc control system based on DFT wth fault detecton algorthm and reference latch. Valve frng sgnals The fault detecton scheme s mplemented wth analog electroncs to measure and transform the network voltage and current space vectors. A dgtal logc crcut s used to evaluate the transformed quanttes. The am s to detect a voltage sag wthn 1-2 ms, and an outage wthn 1 ms. A voltage sag s characterzed by a sudden change n magntude and/or phase of the network voltage. If the VSC s connected to the network at the tme of fault occurrence, then a rapd change n the network current can also be detected as the VSC feeds the fault. An outage can be detected n that the network current n one or more arms of the electronc swtch falls suddenly to zero. Voltage detecton s not effectve for outages, snce untl the electronc swtch s opened, the measured network voltage (at the upstream sde of the swtch) s defned by the VSC and wll not be affected sgnfcantly. Furthermore, normal changes n load condtons also cause sudden jumps n the network current and mnor changes n the network voltage. These transents must not cause the detecton to trp. A combnaton of network current and voltage appears to be the mnmum nformaton requred to mplement a robust and relable detecton system. Sudden changes n the network space vector quanttes (such as n Fg. 4) are dffcult to observe n the statonary reference frame, snce no fxed reference pont s avalable. To smplfy the detecton, a transformaton s made to a rotatng reference frame, assumed to be rotatng at the network fundamental frequency n a postve-sequence drecton. j t = u u e ω (4) j t = e ω (5) The result of these transformatons are ponts n the rotatng α -β plane correspondng to the postvesequence components of the voltages and current respectvely. Superposed on ths pont s a dsturbance component made up of harmoncs and also the negatve-sequence fundamental components. In partcular, sgnfcant fundamental negatve sequence components of the load current are common due to unsymmetrcal loads. EPE '99 - Lausanne P. 6

7 Transent performance and desgn ssues for a parallel-connected voltage sag and outage compensator The negatve-sequence transformaton space-vector s generated by an analog PLL crcut synchronsed to the network voltage. The phase reference of ths sgnal s desgned to reman stable for about 1 ms followng a fault. By hgh-pass flterng the complex values of the transformed quanttes, the reference ponts can be shfted to the orgn of the α -β plane. jω t u = u e h1( t) (6) jω t = e h1( t) (7) where h 1 s the mpulse response of a frst-order hgh-pass flter. Magntude and phase changes n the network voltage and current components can therefore be detected by a sudden ncrease n magntude of u and. The transformed quanttes are seen n Fgs. 9 and 11, and dscussed below. Transent Performance Voltage sags Fg. 7 shows the transent performance of the compensator n response to a sngle-phase voltage sag. The voltage sag was generated by short-crcutng two of the network termnals over 2 nductors havng 6 mh and 4 mh respectvely. The 6 mh nductor n seres wth the network feeder reduces the short-crcut level of the network supply (for phase R only) to about 85 kva. 4 2 u L Tme [ms] Tme [ms] a) etwork sde quanttes b) Load sde quanttes Fg. 7. etwork and load voltage (phase R-S) and current (phase R) plots on occurrence of a voltage sag The fault s detected successfully and the electronc swtch s opened approxmately 1 ms after the fault occurs. Fg. 8a) and b) show the network voltage and current space vectors respectvely. u β β u α α Fg. 8 : etwork voltage and current space vector plots n the statonary reference frame for a voltage sag.25 ms steps from fault occurence to detecton marked by + symbols EPE '99 - Lausanne P. 7

8 Transent performance and desgn ssues for a parallel-connected voltage sag and outage compensator Fg. 9a) and b) show the correspondng plots of u and. The transformaton to the rotatng coordnate system n the α -β plane smplfes the detecton of step-changes n the network voltage and current whch are symptomatc of a fault condton. The dotted lnes show the comparator lmts used to trgger the fault detecton logc. u β β u α -.5 α Fg. 9. etwork voltage and current space vector plots n the rotatng coordnate system at voltage sag (dc-offset removed).25 ms steps from fault occurence to detecton marked by + symbols Supply outages A supply outage s caused when a swtch drectly upstream from the load bus s opened, typcally due to protectve swtchng acton. The parallel sag/outage compensator protects aganst outages wthout explct fault detecton, snce the load current automatcally commutates to the VSC f the network connecton s opened, and the change n voltage at the load bus s mnmal. Fg. 1 demonstrates ths phenomena. An upstream swtch s opened at t = 77 ms, and the load current contnues to flow as suppled from the VSC. The commutaton from VSC to network has only a mnor effect on the load voltage. The electronc swtch s opened about 2 ms after the outage occurs. 4 2 u L Tme [ms] Tme [ms] a) etwork sde quanttes b) Load sde quanttes Fg. 1. Voltage (phase R) and current (phase R) plots under outage condtons. ote u measured at the network sde of the electronc swtch s defned by the VSC voltage untl the electronc swtch s opened A detecton scheme based only on voltage would have to be extremely senstve to respond adequately to ths condton. Fg. 11a) and b) show the transformed network voltage and current space vectors respectvely at the outage. The load voltage deterorates over about one network cycle because the VSC reactve power controller s not deactvated. A more secure way of detectng an outage condton would be to use an explct zero-current detecton EPE '99 - Lausanne P. 8

9 Transent performance and desgn ssues for a parallel-connected voltage sag and outage compensator u β β.4 t d t f.25 t f t d -.2 u α α Fg. 11 : etwork voltage and current space vector plots n the α -β rotatng reference frame at outage fault occurence and detecton tmes marked by t f and t d respectvely If the network phase current s zero for a gven delay tme, and the VSC current for that phase s nonzero, then assume that an upstream breaker or fuse has opened. ormal etwork Condtons In addton to fast detecton of voltage sags and outages, the fault detecton system must be nsenstve to transent and steady-state dsturbances caused by normal load and network operaton. Such dsturbances nclude harmonc dstorton of the network voltage, harmonc load current dstorton, swtchng transents from the network and sudden changes n loadng at the customer bus. In partcular ths last pont s of concern, snce a step change n loadng could be falsely nterpreted as a fault condton, partcularly when a decson must be made wthn several mllseconds. Fg. 12 and Fg. 13 present two load swtchng transents whch were succesfully performed wthout trppng the fault detecton system. Fg. 12 shows the results of swtchng on a 12.5 kvar tuned capactor bank. The network voltage experences a short-term voltage sag, followed by an ncrease n steady-state voltage. The network current experences a transent oscllaton at the resonant frequency of the capactor bank (ca. 18 Hz) followed by an ncrease n the steady state magntude. Fg. 13 shows the result of swtchng n a dode brdge wth capactve smoothng and resstve load L 5 L Tme [ms] Fg. 12 : Swtchng on reactve power compensator wth R-L load ntally on Tme [ms] Fg. 13 : Swtchng on dode brdge wth R-L load ntally on Load-sde faults A fault on the load sde of the compensator wll force a protectve shutdown. The VSC has a bult-n over-current detecton, and wll swtch off automatcally. The electronc swtch s protected aganst EPE '99 - Lausanne P. 9

10 Transent performance and desgn ssues for a parallel-connected voltage sag and outage compensator overcurrents by an ntellgent drver crcut whch detects a short-crcut condton by montorng the collector-emttor voltage of the IGBTs. One crtcal case to be consdered s a load sde fault whch s cleared by the protectve acton of the electronc swtch. If the fault s permanent, then re-closng the swtch wll cause a repeated fault. To avod ths stuaton, after a certan number of re-closngs, the mechancal bypass must be closed, allowng the under- or overlyng protecton system to clear the fault permanently. Dscusson and Conclusons A prototype parallel compensator for voltage sags and outages has been presented and verfed through smulaton and laboratory measurements. Ths compensator s based on exstng Power Condtoner technology, and could be nstalled for up to several MVA load ratng. The acheved voltage qualty of the load voltage corresponds to the requrements of the ITI (CBEMA) curve. The sgnfcant advantage of ths scheme as opposed to tradtonal on-lne UPS s a much hgher effcency durng normal network operaton. The VSC must only be fully loaded whle compensatng a voltage dsturbance. A further advantage of ths compensator s the ablty to perform power condtonng tasks under normal network condtons. Ths mode of operaton would reduce the overall effcency due to hgher VSC currents. eglectng losses n the energy storage system, and gnorng any power condtonng tasks, the prncpal source of losses n the system s the on-state forward voltage drop of the IGBTs n the electronc swtch. Conventonal IGBTs would result n effcency on the order of 97 %. A newer type of IGBT optmzed for forward voltage drop s presented n [9], and wll be ncorporated wthn the prototype compensator n the near future wth an expected effcency of over 98 %. The captal costs of ths compensator would be on the same order as an on-lne UPS, and therefore hgher than those for a DVR. Whle the number of outages s generally less than the number of sags for a typcal supply pont [2], certan loads only experence problems for very severe sags and outages. In ths case, the capablty of restorng the voltage durng an outage s also of nterest. The most challengng techncal aspect of ths system s the requrement of fast fault detecton. The electronc swtch must be opened wthn 1-2 ms of a fault to mnmze the transents n the load voltage, and to avod a protectve shut-down of the VSC. A fnal pont of nterest s the energy storage requred by the compensator. In addton to supplyng the energy demand of the load for the duraton of the fault, the energy assocated wth the transent as the VSC back-feeds the fault, and the tme taken to detect the return of nomnal voltage and to resynchronze must be taken nto account. References 1. J. Douglas, Custom Power: Optmzng Dstrbuton Servces, EPRI Journal, May, DI E 516 Merkmale der Spannung n öffentlchen Elektrztätsversorgungsnetzen, October, Informaton Technology Industry Councl (ITI), ITI (CBEMA) curve applcaton note, Internet Ste, H. Woodley, L. Morgan, and A. Sundaram, Experence wth an nverter-based dynamc voltage restorer, IEEE Summer Meetng, Berln, July, M. Wenhold, SIPCO: Power electroncs-based compensator, SEE PQA '99, Marselle, March, A. Radwan, Konzepte redundanter USV-Technk, etz, Vol. 5, pp , M. Sonnenschen, Untersuchung frequenzselektver Regelungsverfahren für parallel zum etz angeschlossene Aktvflter. Dr.-Ing. Thess, Ruhr-Unverstät Bochum, B. Kulcke, Smulatonsprogramm ETOMAC: Dfferenzletwertverfahren be kontnuerlchen und dskontnuerlchen Systemen, Semens Forsch.- u. Ent., Vol. 1, o. 5, J. G. Bauer, D. Reznck, A. Schlögl, H.-J. Schulze, F. Auerbach, and U. Dermutz, IGBTs für DC-Schnellschalteranwendungen, 1998 EPE '99 - Lausanne P. 1