Digital-to-Analog and Analog-to-Digital Converters

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1 DigitaltoAnalog and AnalogtoDigital Converters DigitaltoAnalog Converters (DAC) and AnalogtoDigital Converters (ADC) bridge the gap between analog and digital worlds and they are particularly useful in the fields of signal processing and communications. These circuits are used in many modern devices, including audio and video applications like CDs and DDs. Converters work properly as long as the NyquistShannon principle is obeyed. Given the highest frequency of the input signal, the sampling frequency for perfect reconstruction of the signal must be at least twice the value of the highest frequency of the input signal. As an example, audio signals are sampled at.khz because the upper bound of audible frequency by humans is about khz. The sampling frequency obeys the NyquistShannon principle. The input is sampled or quantized and this introduces a quantization error which represents the distortion or deviation of the resulting converted signal from the original signal. DACs can be implemented in many ways:. Binaryweighted. DeltaSigma ( Σ). PulseWidth Modulator (PWM). RR ladder. Thermometercoded. Segmented (hybrid of binaryweighted and thermometercoded) ADCs come in different types:. Deltaencoded ( ) / Counterramp. DeltaSigma ( Σ). Direct conversion/flash. Integrating/Dualslope/Multislope. Intermediate FM stage. Pipelined/Subranging quantizer. Rampcompare 8. Successiveapproximation 9. Timeinterleaved. Timestretching. Wilkinson Converters are described by their resolution which is the number of levels they can represent. For instance, a bit DAC or ADC has = levels.

2 DigitaltoAnalog Converter A DigitaltoAnalog Converter (DAC) is a circuit that accepts a sequence of digital numbers and produces analog equivalents of the same set. The circuit presented here is a bit RR ladder DAC and it has inputs labeled DSTM, DSTM, DSTM and DSTM8. Each one of the inputs represents a digital value of or a digital value of ( and in this case). dc dc U R R R k R R k R R k R8 R9 OS OS ua 8 R R DSTM OFFTIME = ms ONTIME = ms DELAY = ns STARTAL = OPPAL = DSTM OFFTIME = ms ONTIME = ms DELAY = ns STARTAL = OPPAL = DSTM OFFTIME = ms ONTIME = ms DELAY = ns STARTAL = OPPAL = DSTM8 OFFTIME = 8ms ONTIME = 8ms DELAY = ns STARTAL = OPPAL = k bit RR ladder DAC circuit schematic.. SEL>>. (R:)... s ms ms ms 8ms ms ms ms ms (R:) Time Time domain sweep (digitaltoanalog conversion) The digitaltoanalog conversion is made possible by an RR network, a resistor network composed of only two resistor values. The ratio between the resistors is fixed and it is / (in this case kω/ω). That gain of the opamp is.

3 The table below shows the values produced at the output of the circuit for all the possible input values. Digital Analog [] By looking at the table above, it is clear that the step between each consecutive analog value is m. The output will consist of DC values contained between m and 9.9. The above circuit can be expanded to any nbit DAC. For every extra bit, only two additional resistors are needed. The voltage between consecutive analog values will be reduced accordingly which in turn increases resolution. However, this circuit will suffer from the addition of RC constants for every additional input.

4 AnalogtoDigital Converter An AnalogtoDigital Converter (ADC) is a circuit that accepts a sequence of digital numbers and produces analog equivalents of the same set. The circuit presented here is a bit ADC and has outputs labeled A, B and C. The input is an analog sinusoidal value between and. C B A dc dc U ua U U OS OS OS OS ua ua OS OS R R R R OFF = AMPL = FREQ = khz bit ADC circuit schematic.. SEL>>. (U:). s.ms.ms.ms.8ms.ms.ms.ms.ms.8ms.ms (U:) (U:) (U:) Time Time domain sweep (analogtodigital conversion) The analogtodigital conversion is made possible by a simple resistor network where only one resistor value is used (in this case Ω).

5 A is red, B is blue and C is yellow. The digital output for a specific analog input can be obtained by decoding the digital s and s at the outputs. different combinations are possible: all opamps are off (), U is on (), U and U are on () and all opamps are on (). These conditions can be translated to,, and with additional hardware (not shown above). The table below shows the values produced at the output of the circuit for all the possible input values after translation. Analog [] Digital By looking at the table above, it is clear that the step between each consecutive analog value is m. The output will consist of digital values,, and. The above circuit can be expanded to any nbit ADC. For every extra bit, an additional resistor and an additional opamp are needed. The voltage between consecutive analog values will be reduced accordingly which in turn increases resolution. However, for an nbit ADC, n opamps have to be used so the ADC grows exponentially in size.

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