Matched Terminated Stub for VIA Higher Technology Bandwidth Transmission. in Line Cards and Back Planes. Printed Circuit Board Operations

Transcription

1 Matched Terminated Stub VIA Technology Matched Terminated Stub for VIA Higher Technology Bandwidth Transmission for Higher Bandwidth Transmission in Line Cards and Back Planes. in Line Cards and Back Planes. Printed Circuit Board Operations George Dudnikov Senior Vice President & CTO Dr. Vladimir Duvanenko Manager Signal Integrity 2008 Sanmina-SCI Corporation. Sanmina-SCI is a trademark of Sanmina-SCI Corporation. All trademarks and registered trademarks are the property of their respective owners.

2 Abstract In line cards and backplanes the inherent impedance mismatch of a via stub is a significant impediment to obtaining higher transmission bandwidth. This obstacle has been circumvented by using back drilling production methods resulting in higher product cost for backplanes. In line cards, the tighter dimensions on vias and pads make back drilling difficult if not impossible. Buried and blind vias can reduce stubs but are even more costly At data transmission rates > 10 Gbps, backdrilling alone may not be adequate enough to reduce jitter and BER An optimized via technology is presented as an additional SI improvement to backdrilling A matched terminated stub (MTS) via technology is presented as an alterative approach to the high cost of stub back drilling that can be applied to lines cards and backplanes

3 PCB Signal Integrity Drivers Bandwidth 2.5 Gbps X 5 Gbps 10 Gbps X 20 Gbps X 40 Gbps Production Demonstrated Development Signal strength decreases (is attenuated) with increasing frequency/distance due to skin depth (trace), And loss tangent (dielectric) losses Relative Level Signal >> Noise (Excellent) Signal > Noise (Marginal) Larger trace widths and lower dielectric losses push this curve up Increased trace-to-trace separation distance, better impedance control push this curve down Signal < Noise (Non-functional) Noise increases with increasing frequency/distance due to crosstalk and impedance mismatch reflections (via stubs) Increasing Frequency/Distance

4 Performance Trends/Expectations Difficult 2X Data Rate Increases 10 Gig (per 4 lanes) 20 Gig (per 4 lanes) 40 Gig (per 4 lanes) 80 Gig (per 4 lanes) 160 Gig (per 4 lanes) BER Gb/s (per diff pair) 6.25 Gb/s (per diff pair) 12.5 Gb/s (per diff pair) 25 Gb/s (per diff pair) 50 Gb/s (per diff pair) More Difficult 10 3 BER Reductions Market Drivers Squeeze Out One More Rate Increase Brand New Design Most Difficult Technology Domains 1: Active compensation (waveshaping, driver pre/de-emphasis, receiver equalization) 2: Connector and attachment technology (press-fit, pressure-fit, SMT, BGA) 3: Backplane/PCB material (dielectric) and interconnect geometry (via/trace size/shape)

5 Sources of Passive Interconnect Losses and Distortions Undesired Effect Connector Via Field PCB/Backplane Dielectric Trace Losses Conduction Losses 1 Dielectric Losses X X Distortions Impedance Mismatches 2 Crosstalk Systemic/Random Variations 3 X X X X X X X Primary Source of Grief Geometry Geometry Material 4 Geometry Data Rate (Gb/s) Connectors migrating away from Press-Fit Note how geometry (size/shape) in the connector/via field regions dominates the majority of undesired sources of interconnect distortion at higher data rates. Via-Fields migrating away from PTH 1 Includes skin depth, surface roughness and non-uniform current crowding effects 2 Includes distributed/lumped element mismatches and memory effects 3 Includes via thru/stub ratio effect 4 Technology does not exist to tweak at the molecular level. Can only change molecules (materials).

6 Bad Agents: Long Via Stubs Normal Signal Flow Distorted Signal (5 mil wide, 20 long traces in FR4) Unterminated Stub G F H G Degrading Stub Reflections A E B D C Nulls are difficult to control Note only connector/via field regions [geometry sizes/shapes] were changed to reduce distortions.

7 Via Stub Versus Thru Performance (Bare Backplane) Note: Distortions due to long stub lengths dominate over distortions due to long line lengths (skin depth/dielectric losses)

8 Via Stub Loss Versus Dielectric Loss Locations of Via Stub Structures Higher Distortion Df.021 Df.008 Lower Loss Note: Improving dielectric material can actually increase distortion!

9 Improving Signal Integrity Performance using Backdrilling Backdrilling eliminates detrimental plated-through-hole (PTH) via stub effects that distort signals passing through them Without Backdrilling With Backdrilling 6.25 Gb/s Data Rate Unusable Eye Diagram Usable Eye Diagram

10 Approximate Stub Loss Effects Stub Length (mils) Signal Loss (Percent) % % % % 20 5% 40 10% 60 15% % % % Approximate Signal Loss (%) % Trace Impedance Mismatch 20 mil Stub = 5% Loss % Stub Length (mils) 250 ** Applicable for D k > 3.5, D F > 0.005, mil connector drill diameters, data rates < 8 Gb/s. (This is a rule of thumb, not a design guide.)

11 High Speed Interconnect World Shift Diff Pair h Diff Pair Diff Pair w Old Metric: GB/s/diff pair New Metric: GB/s/in 2 Applicable to PCBs, Back/Midplanes and Connectors Approach A (Traditional/Long Term) Develop technology to increase GB/s/diff pair Better Dielectrics Lower loss tangents More uniform (solve glass weave issues) Smoother traces (surface roughness) More complex active comp Volume 25 GB/s/diff pair circa 2013 SSCI is developing new processes to increase via/trace routing density (Examples: MTS-Via, SVP, 85 Ω Diff Pairs) Approach B (Near Term Focus) Develop technology to increase routing density Focus on GB/s/in 2 not GB/s/diff pair 25 GB/s/diff pair not as important Smaller trace widths (8-10 mils 3-4 mils) Thinner dielectric thicknesses (8-10 mils 3-4 mils) Higher aspect-ratio vias (25:1 and up) Smaller connector pin pitches (1.8/1.5 mm) Press fit and BGA Smaller press-fit vias (9-10 mil finished hole size) Examples: Tyco Multi-Gig, Tinman FCI Airmax, Zipline Molex Impact Smaller diameter holes are harder to backdrill due to drill breakage and registration

12 At higher frequencies ( >10 Gbps ), backdrilled vias may still have distortion effects which will increase BER Opti-vias are a family of engineered via structures whose S-parameters have been optimized for high speed performance Proprietary algorithms adjust pad and antipad geometries, sizes, and locations to tune the residual portion of the barrel by optimizing the inherent L and C components of the via structure. Before Optimization After Optimization Standard Via Non-uniform S-parameters Flat S-parameters Opti-Via Unusable Eye Diagram Usable Eye Diagram 12.5 Gb/s Data Rate

13 Backdrill Limitations Too Many Backdrill Depths increases cost Two sided Backdrill increases cost ( up to 12 depths from each side) New High Speed Connectors will require smaller diameter holes BGA Vias require backdrilling 6-10 mil diameter holes on potentially tens of thousands of I/O Special drilling machines required for small diameter backdrilling tolerance Drill breakage and yield issues Capacity issues Can get costly 8 mil BGA Via

14 An Alternative Approach: MTS-Via Matched Terminated Stub Technology

15 Concept: Terminate stub reflections to ground using a resistor equal to the Zo of the via 210a 210b 215c 215a 215b 215d 110a 110b 110c 110d 110e 110f a 330b 330c 330d 330e 330f Single Ended Diff Pair

16 Concept Validation in Lab Testing 51 ohm resistors connects via stubs to ground Control case: same board, no resistors Measured using Anritsu PPG, Tektronix CSA 8000B 32 bit increasing psuedo-random pattern Semi-rigid coax cables connected directly with via MTSvia Assembly

17 Measurement Results Control 0.3 V MTSvia using 51 Ohms V O L T A G E 0 ps Time (ps) V 0 ps Time (ps) GB/s from Anritsu MD17636 PPG 22 Layer Motherboard Control: Unterminated Control Jitter: 160 ps (1.00 UI) - Eye Completely Closed MTSvia Jitter: 52 ps (0.325 UI) 3 to 1 improvement The MTSvia resistor absorbs the reflected signal resulting in a reduction in signal strength The MTSvia reduces the signal distortion due to elimination of ISI and crosstalk Eye opens up

18 Simulation Tools used to optimize MTSvia resistor values, S parameters, and design rules Control 1.5 V MTSvia using 50 Ohms V O L T A G E -0.5 V 0 ps Time (ps) GB/s from CJPAT PWL voltage source Using 1us of simulated data Control Eye: ps width, 713 mv height MTSvia Eye: ps width, 404 mv height 0 ps Time (ps) 640 Ansoft 3D Model

19 BER is more sensitive to width of eye closure than height of eye closure. Stub creates pedestal/staircase distortion during a transition that decreased width of eye. Control MTS-Via sacrifices some eye height in order to get a much larger increase (10x) in eye width. Jitter/BER is nonlinear. A10X decrease in jitter can often decrease BER by many orders of magnitude. MTS-Via (25 Ohms) 0.2 V 0.40 UI 0.04 UI V O L T A G E 0 ps Time (ps) V 0 ps Time (ps) GB/s from CJPAT PWL voltage source Using 500ns of simulated data Control Jitter: 64 ps (0.40 UI) MTS-Via Eye: 6 ps (0.04 UI) Jitter Reduction: 0.40/0.04 = 10X MTS-Via removes pedestal/staircase distortion, thereby increasing width of eye.

20 ABR Annular Buried Resistor for MTSvia applications Via to Signal Via to Via Via to Plane Buried Resistor Advantages Frequency independent terminator Eliminates need for discrete surface resistors Saves space No routing required Low Cost Polymer Thick Film High Speed Laser Trimming Available

21 MTSvia using Annular Buried Resistor MTS Via = Matched Terminated Stub Via Terminated Via Stub Eliminates Stub Reflections, Reduces Jitter Normal Signal Flow Distorted Signal Unterminated Stub Large Jitter Without Stub Termination Degrading Stub Reflections Undistorted Signal Terminated Stub It is easier to compensate for a reduction in amplitude than correct for distortion Small Jitter With Stub Termination Stub Terminating Resistor (in anti-pad region) Stub Reflections Eliminated MTSvia resistor value is adjusted to balance Signal Strength vs Signal Distortion

22 MTS-via application for internal signal routing eliminates need for 2 sided backdrill or subcomposites Stub Useless portion EM wave Useful portion Stub MTS-VIA Residual Stub Signal Reference/Ground R

23 Summary Via stubs degrade the signal integrity ( SI) performance of PCB interconnects because they attenuate and distort signals that propagate through them. This degradation is frequency/data rate dependent, with larger amounts of degradation occurring at higher operating frequencies/data rates Backdrilling of via stubs is a cost effective way of minimizing stub effects but is limited in capability for higher density designs and higher frequencies ( > 10 Gbps) Via structures whose stub sections have been terminated into a resistance do not have back-reflections and therefore do not introduce as much signal distortion. MTSvia is an alternative technology utilizing an impedance matched stub with an adjustable signal / distortion ratio to cost effectively optimize signal integrity for higher density designs and higher data rates. Buried Capacitance, MTS-via, Opti-via, ABR are trademarks of HSCI and Sanmina-SCI and are technologies covered by multiple US and foreign patents. Licensing is available.