NGD15N41CL, NGB15N41CL, NGP15N41CL. Ignition IGBT 15 Amps, 410 Volts N Channel DPAK, D 2 PAK and TO 220

Size: px

Start display at page:

Download "NGD15N41CL, NGB15N41CL, NGP15N41CL. Ignition IGBT 15 Amps, 410 Volts N Channel DPAK, D 2 PAK and TO 220"

Kelly Fletcher
5 years ago
Views:

NGD5NCL, NGB5NCL, NGP5NCL Preferred Device Ignition IGBT 5 Amps, Volts N Channel DPAK, D PAK and TO This Logic Level Insulated Gate Bipolar Transistor (IGBT) features monolithic circuitry integrating

1 NGD5NCL, NGB5NCL, NGP5NCL Preferred Device Ignition IGBT 5 Amps, Volts N Channel DPAK, D PAK and TO This Logic Level Insulated Gate Bipolar Transistor (IGBT) features monolithic circuitry integrating ESD and Over Voltage clamped protection for use in inductive coil drivers applications. Primary uses include Ignition, Direct Fuel Injection, or wherever high voltage and high current switching is required. Features Ideal for Coil on Plug Applications DPAK Package Offers Smaller Footprint and Increased Board Space Gate Emitter ESD Protection Temperature Compensated Gate Voltage Clamp Limits Stress Applied to Load Integrated ESD Diode Protection New Design Increases Unclamped Inductive Switching (UIS) Energy Per Area Low Threshold Voltage to Interface Power Loads to Logic or Microprocessor Devices Low Saturation Voltage High Pulsed Current Capability Optional Gate Resistor (R G ) and Gate Emitter Resistor (R GE ) Pb Free Packages are Available MAXIMUM RATINGS (T J = 5 C unless otherwise noted) Rating Symbol Value Unit Emitter Voltage V CES V DC Gate Voltage V CER V DC G 5 AMPS VOLTS V CE(on). I C = A, V GE.5 V R G R GE C E DPAK CASE 69C STYLE D PAK CASE 8B STYLE Gate Emitter Voltage V GE 5 V DC Current T C = 5 C Pulsed ESD (Human Body Model) R = 5 Ω, C = pf I C 5 5 ESD 8. A DC A AC kv TO AB CASE A STYLE 9 ESD (Machine Model) R = Ω, C = pf ESD 8 V Total Power T C = 5 C Derate above 5 C P D 7.7 Operating and Storage Temperature Range T J, T stg 55 to +75 Watts W/ C C ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 8 of this data sheet. Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. DEVICE MARKING INFORMATION See general marking information in the device marking section on page 8 of this data sheet. Preferred devices are recommended choices for future use and best overall value. Semiconductor Components Industries, LLC, 6 May, 6 Rev. 7 Publication Order Number: NGD5NCL/D

2 NGD5NCL, NGB5NCL, NGP5NCL UNCLAMPED COLLECTOR TO EMITTER AVALANCHE CHARACTERISTICS ( 55 T J 75 C) Characteristic Symbol Value Unit Single Pulse to Emitter Avalanche Energy V CC = 5 V, V GE = 5. V, Pk I L = 6.6 A, L =.8 mh, Starting T J = 5 C V CC = 5 V, V GE = 5. V, Pk I L = 5 A, L =.8 mh, Starting T J = 5 C THERMAL CHARACTERISTICS E AS 5 Characteristic Symbol Value Unit Thermal Resistance, Junction to Case R θjc. C/W Thermal Resistance, Junction to Ambient DPAK (Note ) R θja D PAK (Note ) R θja 5 TO R θja 6.5 Maximum Lead Temperature for Soldering Purposes, /8 from case for 5 seconds T L 75 C mj ELECTRICAL CHARACTERISTICS OFF CHARACTERISTICS Characteristic Symbol Test Conditions Temperature Min Typ Max Unit Emitter Clamp Voltage BV CES I C =. ma T J = C to 5 C I C = ma T J = C to 5 C 8 V DC 8 Zero Gate Voltage Current I CES V CE = 5 V, V GE = V Reverse Emitter Leakage Current I ECS V CE = V T J = 5 C. μa DC T J = 5 C * T J = C. T J = 5 C.7. ma T J = 5 C 5* T J = C.. Reverse Emitter Clamp Voltage B VCES(R) I C = 75 ma Gate Emitter Clamp Voltage BV GES I G = 5. ma T J = C to 5 C Gate Emitter Leakage Current I GES V GE = V T J = C to 5 C Gate Resistor R G T J = C to 5 C Gate Emitter Resistor R GE T J = C to 5 C ON CHARACTERISTICS (Note ) Gate Threshold Voltage V GE(th) I C =. ma, V GE = V CE Threshold Temperature Coefficient (Negative). When surface mounted to an FR board using the minimum recommended pad size.. Pulse Test: Pulse Width μs, Duty Cycle %. *Maximum Value of Characteristic across Temperature Range. T J = 5 C 7 7 V DC T J = 5 C 6 T J = C V DC 8 6 μa DC 7 Ω 6 6 kω T J = 5 C...9 V DC T J = 5 C.75.. T J = C..6.*. mv/ C

3 NGD5NCL, NGB5NCL, NGP5NCL to Emitter On Voltage V CE(on) ELECTRICAL CHARACTERISTICS (continued) Characteristic Symbol Test Conditions Temperature Min Typ Max Unit ON CHARACTERISTICS (continued) (Note ) T J = 5 C..6.8 V DC I C = 6. A, V GE =. V T J = 5 C T J = C..65.9* I C = 8. A, V GE =. V I C = A, V GE =. V I C = A, V GE =.5 V Forward Transconductance gfs V CE = 5. V, I C = 6. A T J = C to 5 C DYNAMIC CHARACTERISTICS T J = 5 C..8.* T J = 5 C..7.9 T J = C..8.* T J = 5 C... T J = 5 C.5..* T J = C... T J = 5 C..9. T J = 5 C..9. T J = C..95.* Mhos Input Capacitance C ISS 65 pf V CC = 5 V, V GE = V T J = C to Output Capacitance C OSS 55 f =. MHz 5 C Transfer Capacitance C RSS SWITCHING CHARACTERISTICS Turn Off Delay Time (Inductive) t d(off) V CC = V, I C = 6.5 A R G =. kω, L = μh Fall Time (Inductive) t f V CC = V, I C = 6.5 A R G =. kω, L = μh Turn Off Delay Time (Resistive) t d(off) V CC = V, I C = 6.5 A R G =. kω, R L = 6 Ω, Fall Time (Resistive) t f V CC = V, I C = 6.5 A R G =. kω, R L = 6 Ω, Turn On Delay Time t d(on) V CC = V, I C = 6.5 A R G =. kω, R L =.5 Ω Rise Time t r V CC = V, I C = 6.5 A R G =. kω, R L =.5 Ω. Pulse Test: Pulse Width μs, Duty Cycle %. *Maximum Value of Characteristic across Temperature Range. T J = 5 C. μsec T J = 5 C.5 T J = 5 C 6. T J = 5 C T J = 5 C. μsec T J = 5 C.5 T J = 5 C 8. 5 T J = 5 C 5 T J = 5 C.7. μsec T J = 5 C.7. T J = 5 C. 7. T J = 5 C 5. 7.

4 NGD5NCL, NGB5NCL, NGP5NCL TYPICAL ELECTRICAL CHARACTERISTICS (unless otherwise noted) I C, COLLECTOR CURRENT (AMPS) 6 5 V GE = V 5 V.5 V V T J = 5 C.5 V V.5 V V CE, COLLECTOR TO EMITTER VOLTAGE (VOLTS) 8 I C, COLLECTOR CURRENT (AMPS) 6 5 V GE = V.5 V 5 V V T J = C.5 V V.5 V V CE, COLLECTOR TO EMITTER VOLTAGE (VOLTS) Figure. Output Characteristics Figure. Output Characteristics I C, COLLECTOR CURRENT (AMPS) 6 5 V GE = V 5 V T J = 5 C.5 V V.5 V V.5 V V CE, COLLECTOR TO EMITTER VOLTAGE (VOLTS) I C, COLLECTOR CURRENT (AMPS) V CE = V T J = 5 C T J = 5 C T J = C V GE, GATE TO EMITTER VOLTAGE (VOLTS) Figure. Output Characteristics Figure. Transfer Characteristics V CE, COLLECTOR TO EMITTER VOLTAGE (VOLTS) V GE = 5 V T J, JUNCTION TEMPERATURE ( C) I C = 5 A I C = A I C = 5 A I C = A I C = 5 A 5 COLLECTOR TO EMITTER VOLTAGE (VOLTS) I C = 5 A I C = A I C = 5 A T J = 5 C GATE TO EMITTER VOLTAGE (VOLTS) Figure 5. to Emitter Saturation Voltage versus Junction Temperature Figure 6. to Emitter Voltage versus Gate to Emitter Voltage

5 NGD5NCL, NGB5NCL, NGP5NCL COLLECTOR TO EMITTER VOLTAGE (VOLTS) I.5 C = 5 A T J = 5 C I C = A.5 I C = 5 A C, CAPACITANCE (pf) C iss C oss C rss GATE TO EMITTER VOLTAGE (VOLTS) V CE, COLLECTOR TO EMITTER VOLTAGE (VOLTS) Figure 7. to Emitter Voltage versus Gate to Emitter Voltage Figure 8. Capacitance Variation THRESHOLD VOLTAGE (VOLTS) Mean + σ Mean σ Mean I L, LATCH CURRENT (AMPS) L = mh L = 6 mh L = mh V CC = 5 V V GE = 5 V R G = Ω TEMPERATURE ( C) TEMPERATURE ( C) Figure 9. Gate Threshold Voltage versus Temperature Figure. Minimum Open Secondary Latch Current versus Temperature I L, LATCH CURRENT (AMPS) L = mh L = 6 mh L = mh V CC = 5 V V GE = 5 V R G = Ω 5 75 SWITCHING TIME (μs) 8 6 V CC = V V GE = 5 V R G = Ω I C = A L = μh t f t d(off) TEMPERATURE ( C) TEMPERATURE ( C) Figure. Typical Open Secondary Latch Current versus Temperature Figure. Inductive Switching Fall Time versus Temperature 5

6 NGD5NCL, NGB5NCL, NGP5NCL R(t), TRANSIENT THERMAL RESISTANCE ( C/Watt). Duty Cycle = Single Pulse P (pk) t t DUTY CYCLE, D = t /t D CURVES APPLY FOR POWER PULSE TRAIN SHOWN READ TIME AT T T J(pk) T A = P (pk) R θja (t) R θjc R(t) for t. s t,time (S) Figure. Transient Thermal Resistance (Non normalized Junction to Ambient mounted on fixture in Figure ).5.5 Figure. Test Fixture for Transient Thermal Curve (8 square inches of /8 thick aluminum) 6

7 NGD5NCL, NGB5NCL, NGP5NCL COLLECTOR CURRENT (AMPS). DC ms ms ms μs COLLECTOR CURRENT (AMPS). DC ms μs ms ms. COLLECTOR EMITTER VOLTAGE (VOLTS) Figure 5. Single Pulse Safe Operating Area (Mounted on an Infinite Heatsink at T A = 5 C). COLLECTOR EMITTER VOLTAGE (VOLTS) Figure 6. Single Pulse Safe Operating Area (Mounted on an Infinite Heatsink at T A = 5 C) COLLECTOR CURRENT (AMPS). I (pk) t t t = ms, D =.5 t = ms, D =. t = ms, D =. DUTY CYCLE, D = t /t. COLLECTOR EMITTER VOLTAGE (VOLTS) Figure 7. Pulse Train Safe Operating Area (Mounted on an Infinite Heatsink at T C = 5 C) COLLECTOR CURRENT (AMPS). I (pk) t = ms, D =.5 t t t = ms, D =. t = ms, D =. DUTY CYCLE, D = t /t. COLLECTOR EMITTER VOLTAGE (VOLTS) Figure 8. Pulse Train Safe Operating Area (Mounted on an Infinite Heatsink at T C = 5 C) 7

8 NGD5NCL, NGB5NCL, NGP5NCL ORDERING INFORMATION Device Package Type Shipping NGD5NCLT DPAK 5/Tape & Reel NGD5NCLTG DPAK (Pb Free) 5/Tape & Reel NGB5NCLT D PAK 8/Tape & Reel NGB5NCLTG D PAK (Pb Free) 8/Tape & Reel NGP5NCL TO 5 Units/Rail NGP5NCLG TO (Pb Free) 5 Units/Rail For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8/D. MARKING DIAGRAMS Gate DPAK CASE 69C STYLE 7 D PAK CASE 8B STYLE TO AB CASE A STYLE 9 YWW GD 5NG NGB 5NCLG AYWW NGP 5NCLG AYWW Emitter Gate Emitter Gate Emitter A Y WW G = Assembly Location = Year = Work Week = Pb Free Device 8

9 NGD5NCL, NGB5NCL, NGP5NCL PACKAGE DIMENSIONS DPAK CASE 69C ISSUE O V S F B R G L A K D PL J H C. (.5) M T T SEATING PLANE E U Z INCHES MILLIMETERS DIM MIN MAX MIN MAX A B C D E F G.8 BSC.58 BSC H J K L.9 BSC.9 BSC R S U..5 V Z.55.9 STYLE : PIN. GATE. DRAIN. SOURCE. DRAIN SOLDERING FOOTPRINT* SCALE : mm inches *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 9

10 NGD5NCL, NGB5NCL, NGP5NCL PACKAGE DIMENSIONS D PAK CASE 8B ISSUE H T SEATING PLANE B G S D PL. (.5) M T B M K C H E V W A W J NOTES:. DIMENSIONING AND TOLERANCING PER ANSI Y.5M, 98.. CONTROLLING DIMENSION: INCH.. 8B THRU 8B OBSOLETE, NEW STANDARD 8B. INCHES MILLIMETERS DIM MIN MAX MIN MAX A B C D E F G. BSC.5 BSC H J K L M N.97 REF 5. REF P.79 REF. REF R.9 REF.99 REF S V VARIABLE CONFIGURATION ZONE R N U P STYLE : PIN. GATE. COLLECTOR. EMITTER. COLLECTOR L L L M M M F F F VIEW W W VIEW W W VIEW W W SOLDERING FOOTPRINT* SCALE : mm inches *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.

11 NGD5NCL, NGB5NCL, NGP5NCL PACKAGE DIMENSIONS TO CASE A 9 ISSUE AB H Q Z L V G B N D A K F T U S R J C T SEATING PLANE NOTES:. DIMENSIONING AND TOLERANCING PER ANSI Y.5M, 98.. CONTROLLING DIMENSION: INCH.. DIMENSION Z DEFINES A ZONE WHERE ALL BODY AND LEAD IRREGULARITIES ARE ALLOWED. INCHES MILLIMETERS DIM MIN MAX MIN MAX A B C D F G H J K L N Q...5. R S T U V.5.5 Z.8. STYLE 9: PIN. GATE. COLLECTOR. EMITTER. COLLECTOR ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 56, Denver, Colorado 87 USA Phone: or 8 86 Toll Free USA/Canada Fax: or Toll Free USA/Canada orderlit@onsemi.com N. American Technical Support: Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 79 9 Japan Customer Focus Center Phone: ON Semiconductor Website: Order Literature: For additional information, please contact your local Sales Representative NGD5NCL/D

NGD18N40CLBT4G. Ignition IGBT 18 Amps, 400 Volts N Channel DPAK. 18 AMPS 400 VOLTS V CE(on) 2.0 I C = 10 A, V GE 4.5 V

NGD18N40CLBT4G. Ignition IGBT 18 Amps, 400 Volts N Channel DPAK. 18 AMPS 400 VOLTS V CE(on) 2.0 I C = 10 A, V GE 4.5 V NGD8NCLB Ignition IGBT 8 Amps, Volts N Channel DPAK This Logic Level Insulated Gate Bipolar Transistor (IGBT) features monolithic circuitry integrating ESD and Over Voltage clamped protection for use in