SURF n TURF. Gary S. Varner University of Hawai, i, Manoa ANITA Collaboration UC Irvine April 7 th, 2005

Transcription

1 SURF n TURF Gary S. Varner University of Hawai, i, Manoa ANITA Collaboration UC Irvine April 7 th, 25

2 Talks Overview: 2 parts Sampling Unit for RF (SURF) evolution Digitization: STRAW, LABRADOR generations SURFpro evaluation, SURFv Mezzanine card/ddts Important System Issues: Power DC draw update RF levels Timing analysis Testing plans/issues (TURFpro integration)

3 Basic trigger/digitizer data stream Split signal: path to trigger, for digitizer Use multiple frequency bands for trigger Digitizer runs ONLY when triggered to save power 2

4 Specifications Sampling Trigger # of RF channels 8 32 top; 32 bottom; 8 bicone; 8 veto Sampling rate 3 GSa/s > Nyquist Sample resolution > 9 bits 3 bits noise + dynamic range Sample window ns time window # of Sample buffers 4 (2) multi-hit (extended window) Power/channel < W excluding tertiary amplification, triggering # of Trigger bands 4 2-4; 4-65; 65-88; 88-2 # of Trigger channels 8 per antenna (4bands x RCP,LCP) Trigger threshold <= 2.3σ operation well into the thermal noise Accidental trigger rate < 5Hz at target Trigger threshold L2 Trigger latency 45ns to issue Hold signal Global Trigger latency as necessary multi-buffering of analog permits 3

5 RF Digitizer checklist Sampling Rate >= 3GSa/s 2-bit ADC performance Analog Bandwidth >=.2 GHz Dynamic Range >= 9 bits 4

6 LABRADOR sampling & linearity Excellent ADC linearity Sampling rates up to 4 GSa/s with voltage overdrive 5

7 LABRADOR bandwidth 3 2-5dB sine wave Amplitude [db] RF Frequency [MHz] Bandwidth measured by two separate methods: RF sine wave (5MHz max) and transient impulses 6

8 LAB dynamic range Labrador Output Data RLD4=22K, GainRef=.4V 3 29 y = 276.6x 4-38x x 2-33x R 2 =.9998 Output Data RLD3=5K Poly. (RLD3=5K) Voltage (V) V range = 97 counts (~ count/mv) Low:.4mV/count Mid:.5mV/count High: 4.5mV/count Difference Voltage (V) 7

9 LABRADOR2 Jing Cao Trans-impedance source follower LABRADOR2 ~mv noise, > V full scale (and linear + non-inverted) bits should be feasible No changes to RF feed/timing or power Initial testing early 5 didn t understand results 8

10 LABRADOR/2 floorplan Straight Shot RF inputs 28x Wilk ADCs Analog Superbuffers 8 chan. * 256 samples 8x HS Analog out, x MUX out Random access: 9

11 LAB2 Test bench LAB2 (indistinguishable from this resolution)

12 LAB2 DC Linearity 35 Output Data counts/mv Key: Transimpedance Source Follower Allows operation without input offset Voltage (V) 4 3 Linear Residuals 2.6V dynamic range (DC transfer) Difference Voltage

13 LAB2 Problem Vdd Write Read Rsense Vout Write Read Vin PMOS Vin PMOS 78fF LAB2 78fF Vofs LABRADOR For reasonable settling time, need strong sense I; However, closed channels strongly active Decided for SURF v., LABRADOR only option 2

14 LAB3 (?) Faster Readout: Why not put an ADC in every storage cell? Readout could be < us (4us convert and 5us data transfer) No analog sample transfer (biggest headache) Give up analog waveform out 9 RF channels ( dedicated timing) Greatly simplified control Implement 4 bucket tail catcher Modified termination scheme Truly 5 Ω No resistive drop across array 3

15 Architecture Comparison LABRADOR(2) architecture SCA bank: 4 rows x 256 columns Gain AMUX Analog 4 RF inputs 4 k 2k 4k + buffers 28x Wilkinson ADC timing control 8 2 Gain 4 RF inputs 4 k 2k 4k Analog + 8 buffers SCA bank: 4 rows x 256 columns LABRADOR(3) architecture Wilkinson ADC SCA bank: 4 rows x 26 columns i n p u t 4 RF inputs timing control 5 RF inputs SCA bank: 5 rows x 26 columns 2 4

16 Chip comparison LABRADOR, LAB2 LAB3 65 analog/control lines 3-deep nested state machine 4 analog/control lines (better VDD/GND) Very simple state machine 5

17 Trigger checklist Good Band spacing Sufficient amplitude through TDD Net length balancing 6

18 RFCeval th order prototype Quick Reference: RFCeval == Radio Freq Comp evaluation board STRAW == Self-Triggered Recorder for Analog Waveforms LABRADOR == Large Analog Bandwidth Recorder And Digitizer with Ordered Readout 7

19 SURFpro Pro = Prototype 8

20 Diode Detector Test (DDT) Eval DDT Board DDT2 Board Filter Banding Filter Banding Tunnel Diode Tunnel Diode Trigger Studies 9

21 Filter Banding DDT2 rcp all 4 bands with vertical input 2 3 some balancing needed band tuning power db ver >rcp ver >rcp2 ver >rcp3 ver >rcp Freq. Hz x 8 2

22 Modified Bands SURFv Proposed Band Pass Amplitude [db] Frequency [MHz] LFCN-225 Filter X LFCN-49 HFCN-65 LFCN-63 HFCN-88 Outer BP 2

23 Diode detector Response Quad ridge horn antenna ~7ns integration LNA Voltage σ σ Tunnel Diode Detector Power: P/<P> <P> Gaussian distribution P/<P> Exponential distribution 2.3σ ~= 3.9 P/<P> Tunnel Diode Output Single Channel Trigger Rate Count Rate [MHz] Power/<Power> singles Needs amplification! 22

24 23 SURF v RF split RF split RF split RF split LNAs LNAs LNAs LNAs backplane x4 LABRADOR split RF Discrim. Transition Module Slots cpci 32 LVDS SURFv TURF 6 QR horn # #2 #3 #4 QR horn QR horn QR horn H V V V V H H H CPLDs hybrid Master Banding Trigger 9 deg hybrid FPGA local bus PCI32 J4 J ADC Tunnel Diodes PLX 93 Sampling RF Power Monitor DACs Threshold 9 deg SURF High Occupancy RF Trigger (SHORT) board

25 SURF v SURF v 24

26 SURF v2? Improvements (?) Routing simplification: 5 CPLDs + FPGA FPGA More space for LAB(3?) routing net length balancing Dedicated reference timing channel? Remove dedicated comparators? (use FPGA LVDS receivers as comparators less EMI and power) Triggering OK (?) [isolate changes to SHORT board?] 25

27 Online Documentation 26

28 Part I Summary Much progress since last met in autumn Some RF components STILL on order Plans: Defer to after the break additional input SURF board cost ~ k$ per board All RF components (4.8k$ in Tunnel Diodes alone) 27

29 Part 2: Important System Issues: Power DC draw update RF levels Timing analysis Testing plans/issues (TURFpro integration) 28

30 SURFv DC Power Qty. Part Number M anufacturer Supplier Static Power(ea.) Dynamic P+ (ea.) Total [W] 8 AD5324BRM Analog Dev Digi-Key 2.E-3. 3 BUF47AIDGSR Texas Instr Digi-Key 5.5E-3 8.E-3..mA*5V 2V-k *4 5 CD45BE Texas Instr Digi-Key.5E-2. 3mA*5V 4 CD74HC746AM Texas Instr Digi-Key mA*3.3 4 LABRADOR ID Lab/TSM C TSMC/MOSIS A*2.5V 2% Dig includes CPLD 8 MAX92 M axim M axim.58 2.E-3.5 5mA*-5V 3mA*5V x2 dynamic LTC45CG Linear Tech Digi-Key 5.5E-2. spec max 55mW 8 MAX43 M axim M axim mA*3.3 PLX_PCI93 PLX mA*3.3 XC3S2 Xilinx Avnet mA*.2+6.5mA*2.5 * dynamic 4 XC9544XL Xilinx Digi-Key. included in LABRADOR number XC9544XL_TQ44 Xilinx mA*3.3 5MHz effective -- dynamic incl. XCFS-VOC Xilinx mA*3.3 8 VAM-6 M ini-circuits M ini-circuits mA*5V 5% loading? 64 VAM -6 M ini-circuits M ini-circuits mA*5V 5% loading? on SHORT board -5Vmay go away TOTAL = 4.7 W Power breakdown LABRADOR.2 max Digital control 3. Analog misc..3 RF amplification 9.7 RF power monitor.3 Trigger SURFpro Power Breakdown RF amplification 65% Analog misc. 2% Digital control 2% RF power monitor 2% Trigger 3% LABRADOR 8% 29

31 SURFv RF Power Antenna Antenna noise power in = dbm Horn Elec db [] Antenna feed loss SWR included on antenna page (set to. here) [2] Cable loss guess for short quad shield [3] Coupler insertion loss Wellatone C66-2 [4] Bandpass filter Wainwright WHKS 85-8SS [5] Limiter Adv Ctrl Circuits ACLM4932C46 Tsys increase LNA insertion loss included on antenna+lna page (set to. here) [6] LNA gain Miteq AFS4-2--5P4 thermal noise added on ant+lna page LNA return loss output VSWR only affect back power! (set to. here) [7] Attenuator Minicircuits (?) 2nd amp insertion loss VSWR [8] 2nd amp gain, typical 4 -. Mini-circuits ZKL-R5 2nd amp return loss VSWR [9] Long cable loss meters of RG-6??? 2nd BP filter needed to enforce passband just before DAQ, cuts out-of-band power Feedthrough conn patch cable loss SURFpro SMA input conn First split insert loss st split (SBTC-2-2) LABRADOR chain Trigger chain voltage into labrador chain 29.9 mv voltage into trigger chain 29.9 mv 2nd split insert loss VAM-6 insert loss nd split (SBTC-2-2) VAM-6 gain rd split insert loss VAM-6 return loss rd split (SBTC-2-2) nd split insert loss insert loss nd split (SBTC-2-2) UPC2745TB gain rd split insert loss return loss -.9 3rd split (SBTC-2-2) LABR insert loss (incl pad) Filters: bands /2/3/4 LFCN-32 filterx/lfcn-4 HFCN-65/LFCN-8 HFCN-88 Total power [dbm] -28. Insertion loss Noise RMS power [W].54E-6 Fractional band Noise voltage [mv] degree hybrids SLQ-K7 SLQ-K9 SLQ-K SQH-82 LAB full scale (+/-) mv 5 Insertion loss LAB lsb [mv].5 PWRM split insert loss Number noise counts 5.9 PWRM split(sbtc-2-2) VSWR Number of noise bits 2.55 Diode detector [ins.] Dynamic range Noise RMS [mw] 5.37E E E-3.2E-2 noise rms into diode, mv Diode detector [gain] log(vout,mv) = 2.24 log(vin,mv) from fitted response data Diode LPF Vout,mV VAM-6 net gain/v,mv pad -3. VAM-6 net gain 6. Avg amplitude [mv] Trigger thres. (P/<P>) 3.9 Trigger amplitude [mv] trigger rms power (dbm)

32 Timing Path TURF bridges cpci modules along backplane--sees local trigger pattern across antenna clusters Issues data hold, then digitize if trigger pattern is satisfied 3

33 Diode Detector Test (DDT) Eval DDT Board Trigger Studies 2 times of interest:. Absolute time w.r.t. PPS 2. Channel-to-channel timing 32

34 Trigger Timing Measurement.2ns resolution (Spartan-3) 2ns/bin Local Oscillator Stability: 5x - + Freq. Mult. Jitter ~.34ns Not timing resolution! 33

35 Timing Fan-out Jitter LABRADOR time encoding Interpolate HITBUS (hold/halt): 33ps/SQRT(2) ~ 95ps LVDS/CPLD fan-out jitter many ps TURF fan-out intrinsic timing To be evaluated Now have SURF <-> TURF link running, can test Dedicated timing signal (?) LAB3 provides this option 34

36 Trigger Studies Logical segmentation (example Trigger Type = shown) Top cluster L2 = 2 of 5 Phi = ( of 6) Bottom cluster L2 = 2 of 5 Nadir cluster L2 = 2 of 3 35

37 Studies/Documentation Owed SURF User s Manual (programmer s manual) TURFIO User s Manual TURF Trigger Timing measurement results FPGA discriminator study (DDT) Student project: Trigger sensitivity to non- Gaussian noise and self-generated noise 36

38 Specifications - anon Sampling Trigger # of RF channels 8 24 channels (3% done) Sampling rate 3 GSa/s achieved Sample resolution > 9 bits TBD (LAB marginal) Sample window 256 achieved # of Sample buffers 4 (2) achieved Power/channel < W.8W est. (measurement soon) # of Trigger bands 4 achieved, to be studied # of Trigger channels 8 fits (barely) -- SHORT has 's of pcs Trigger threshold <= 2.3σ TBD (/f, local impulsive) Accidental trigger rate < 5Hz TBD L2 Trigger latency 45ns TBD (can test with TV set-up) Global Trigger latency as necessary achieved 37

39 Part II Summary Ready for TV test: Has been useful integration exercise Most parts TV rated qualify the rest Plans: Evaluation of SURFv performance Start serious TURF studies (how many boards needed?) TV test hardware enough for EM flight Design issues: More LABs needed (Rev. or 3); when? SURFv2? Freeze design when? 38

40 Back-up slides 39

41 Template 4

42 Aside: LABRADOR sampling speed High/Low CTRL: Extend to 4 GSa/s Improve odd/event Low freq operation Sampling Freq. [GHz] STRAW2 Sampling Freq. Avg. -cycle +cycle SPICE Freq. Adj. Voltage (ROVDD) [V] 4

43 Askaryan Signature Time (ns) Significant signal power at large frequencies Strong linear polarization (near %) 42