SalSA Readout: An update on architectures. Gary S. Varner Univ. of Hawaii May 2005

Transcription

1 SalSA Readout: An update on architectures Gary S. Varner Univ. of Hawaii May 2005

2 Update since Feb. SLAC Considering 4 schemes: In hole (D RITOS based): GEISER type 100bT type, trigger packets sent Surface digitizing: Commercial digitizers STRAW/LAB/D RITOS type digitizing Triggering/DAQ: Desire to have stand alone stations 1 station/string Solar power, wireless/rf trigger & DAQ Minimize footprint 1

3 Reminder: proposed node config. 12 antennas per node: dipoles + slot-cylinders Node controller for either digitizer or receivers (LNAs) & fiber transmitters Node size 8-12m in length Spacing 182.5m along string 12 nodes per string for ~2.75 km string Moderate ballast needed at bottom 2

4 Basic architecture String 12 nodes armor tape Insulated conductors Stainless tube Fibers Node = 12 antennas and center housing 3

5 Model idea Sharp 185W panel NEMA 3R 38" x 21" x17" $ W is pretty standard 4

6 In hole digitization Digitizer n Readout, In-situ Transient Observation in Salt [D RITOS] Massively parallel ADCs 50µs conversion 7x256 samples/event 50µs readout (40MHz) 100µs total latency Based upon LAB3 architecture 4-deep analog buffering for each antenna channel 6 Reference timing Channel 5

7 Readout board D RITOS HV-lvDC regulation on separate board LNA, 2 nd -stage amps Trigger, bi-directional fiber-link LNA, 2 nd -stage amps RF conns 6

8 Scheme A GEISER (Giga-bit Ethernet Instrumentation for SalSA Electronics Readout) GEISER Philosophy Set low threshold Fill Gb/s ethernet link Event build at surface Pure digital transmission Trigger/Event building No custom, fast trigger Exploit telecomm Event building on PC farm Less attractive if have power, Bandwidth limitations 7

9 Trigger Simple multiplicity (5 of 12): Trigger Rates versus Trigger Threshold X X Rate [Hz] Node X Trigger Threshold [sigma noise] X X Time (sample) Requiring causal trigger, buy a factor of 10 at least in rate Current simulations use 2.8σ, which is probably too conservative 8

10 GEISER Data flow GEISER case: Trigger packets sent via FM/local radio 4-deep analog buffering: 100µs latency/hit > % 1.5kHz RF in Continuous 1.5kHz (<2.4σ) Node/String Time stamps Event request Data Transfer ~8kB (64kb/event) 1.6kHz (100bT) 16kHz (GbE) Digital Cell system for data collection Internal FPGA Buffer RAM Higher power/cost ship a lot of data to surface nobody will check 9

11 Data Collection Network Consider Auger Model Key features: Dedicated trigger channels Timing distribution (WWV-like) Large, inexpensive local RAM buffers to accommodate large latencies Common to all schemes 10

12 Scheme B Data flow SST1 case: Trigger packets sent via FM/local radio 4-deep analog buffering: 100µs latency/hit > % 1.5kHz RF in Continuous 1.5kHz (<2.4σ) Node/String Time stamps Event request Data Transfer Low-power transmit link 10bT (1.5k packets/s) Trigger packets mainly Digital Cell system for data collection External Buffer RAM Higher power/cost ship a lot of data to surface nobody will check 11

13 RF over fiber Readout board Analog fiber HV-lvDC regulation on separate board LNA, 2 nd -stage amps LNA, 2 nd -stage amps RF conns 12

14 Surface acquisition D RITOS-type trigger/latency # s similar to in-hole Scheme D: (O-E) Scheme C: (O-E) Need 288GBytes/string storage per second of latency 13

15 Scheme C/D Data flow D RITOS case: Trigger packets sent via FM/local radio Node/String Time stamps Event request Data Transfer Digital Cell system for data collection High power/cost ship a lot of raw waveforms to surface will be purged 14

16 Summary Table Digitization scheme comparison: Scheme Cost/string Power/string Comment Thresh A 90k 230 W simplified triggering <= 2.4σ B 80k 115 W lowest power, cost <= 2.4σ C 300k 1226 W surface <= 1σ? D 235k 653 W full window, simple trig <= 2.4σ Cost only for antennas, electronics, power Relative numbers important Based upon this, choosing to pursue Scheme B And work on reducing power (actually A/B can be same choice of protocol) 15

17 Summary of variants RF amplification Commercial LNA vs. LAM scheme Fiber optic link Analog (surface) vs. Digital (in-hole) Analog link: Wavelength multiplexing vs. Freq. mixing Digital link: GbE or 100bT or 10bT or custom (downlink custom) Surface digitizer D RITOS-type vs. commercial ADC 16

18 Summary Propose building prototypes (funding?) Pursue SST1 design Explore buffer depth, Comm protocols Pursue D RITOS 4x deep buffer per channel Timescale? Trigger/Event building Emulate base-station triggering Acronym lexicon: D RITOS = Digitizer n Readout for In-situ Transient Observations in Salt GEISER = Giga-bit Ethernet Instrumentation for SalSA Electronics Readout LABRADOR = Large Analog Bandwidth Recorder and Digitizer with Ordered Readout LAM = Low-noise AMplifier project SST = SalSA Sampling and Trigger STRAW = Self-Triggered Recorder for Analog Waveforms 17

19 Back-up slides 18