Testing Digital Systems I

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1 Testing igital Systems I Testing igital Systems I Lecture 8: Boolean Testing Using Fault Models ( Algorithm) Instructor: M. Tahoori Copyright 2, M. Tahoori TS I: Lecture 8 Specific-Fault Oriented Test Generation Three Approaches Internal Line Values Assigned ( Algorithm) (Roth-966) -cubes Bridging faults Logic gate function change faults Input Values Assigned (POEM) (Goel 98) X-Path-Check Path propagation constraints to limit ATPG search space Backtracing Input and Internal Values Assigned (FAN) (Fujiwara) Efficiently constrained backtarce Copyright 2, M. Tahoori TS I: Lecture 8 2 Lecture 8

2 Testing igital Systems I Fault Cone Fault Cone and -frontier Set of hardware affected by fault -frontier Set of gates closest to POs with fault effect(s) at input(s) -frontier Fault Cone Copyright 2, M. Tahoori TS I: Lecture 8 3 Algorithm Copyright 2, M. Tahoori TS I: Lecture 8 4 Lecture 8 2

3 Testing igital Systems I -Algorithm -- Roth IBM (966) Fundamental concepts invented: First complete ATPG algorithm -Cube -Calculus Implications forward and backward Implication stack Backtrack Test Search Space Copyright 2, M. Tahoori TS I: Lecture 8 5 Algorithm Assigning internal line values : Test for Stuck-at- on Lower Input to Gate B Activate Fault Put on Faulty Lead Copyright 2, M. Tahoori TS I: Lecture 8 6 Lecture 8 3

4 Testing igital Systems I Algorithm Test for Stuck-at- on Lower Input to Gate B Implication Record Effects of Previous Assignments Copyright 2, M. Tahoori TS I: Lecture 8 7 Algorithm Propagation Select Path to Propagate to Output Single versus Multiple Path Propagation Copyright 2, M. Tahoori TS I: Lecture 8 8 Lecture 8 4

5 Testing igital Systems I Algorithm Propagation Assign Required Gate Input Values s on other inputs of OR, NOR Gates with or Input s on other inputs of AN, NAN Gates with or Input Copyright 2, M. Tahoori TS I: Lecture 8 9 Line Justification Find Input Assignment to Place Value v on Line g Path Tracing Approach Propagate Signals using Element Functions Must Choose Element Input Values and Paths Primitive cube of an element (gate) with output Z List of prime implicants of Z and Z' AN A B Z NAN A B Z Implication (no choices) ecision (choices) Copyright 2, M. Tahoori TS I: Lecture 8 Lecture 8 5

6 Testing igital Systems I Algorithm Line Justification Assign Required Gate Input Values on lower input of C to give on output Copyright 2, M. Tahoori TS I: Lecture 8 Implication Algorithm Record Effects of Previous Assignments Test is U,V,Y,Z =,,,d IFFICULTY Internal Line Values May be Inconsistent Copyright 2, M. Tahoori TS I: Lecture 8 2 Lecture 8 6

7 Testing igital Systems I Algorithm Test for Stuck-at- on Gate A Output Activate Fault Put on Faulty Lead Copyright 2, M. Tahoori TS I: Lecture 8 3 Algorithm Test for Stuck-at- on Gate A Output Implication Record Effects of Previous Assignments Copyright 2, M. Tahoori TS I: Lecture 8 4 Lecture 8 7

8 Testing igital Systems I Algorithm Test for Stuck-at- on Gate A Output Propagation Select Path to Propagate to Output Copyright 2, M. Tahoori TS I: Lecture 8 5 Algorithm Propagation Assign Required Gate Input Values s on other inputs of OR, NOR Gates with or Input s on other inputs of AN, NAN Gates with or Input Copyright 2, M. Tahoori TS I: Lecture 8 6 Lecture 8 8

9 Testing igital Systems I Algorithm Test for Stuck-at- on Gate A Output Implication Record Effects of Previous Assignments Copyright 2, M. Tahoori TS I: Lecture 8 7 Algorithm Test for Stuck-at- on Gate A Output Propagation Select Alternate Path to Propagate to Output Copyright 2, M. Tahoori TS I: Lecture 8 8 Lecture 8 9

10 Testing igital Systems I Algorithm Test for Stuck-at- on Gate A Output Implication Record Effects of Previous Assignments Test is U,V,Y,Z =,,, Copyright 2, M. Tahoori TS I: Lecture 8 9 Calculus Copyright 2, M. Tahoori TS I: Lecture 8 2 Lecture 8

11 Testing igital Systems I Singular Cover Singular Cover Minimal set of input signal assignments to show essential prime implicants of Karnaugh map Gate AN 2 3 Inputs A B X X Output d Gate NOR 2 3 Inputs d e X X Output F Copyright 2, M. Tahoori TS I: Lecture 8 2 Algorithm -Cube A collapsed truth table entry AN gate Rows & 3 Reverse inputs And two cubes Interchange and A B d Copyright 2, M. Tahoori TS I: Lecture 8 22 Lecture 8

12 Testing igital Systems I Algorithm Intersection efines how different -cubes can coexist for different gates in logic circuit If one cube assigns a specific signal value, the other cubes must assign either that same value or X = X = X = = X = X = X X = X, represent incompatible assignments, represent incompatibility if both present X X X Copyright 2, M. Tahoori TS I: Lecture 8 23 Algorithm Primitive -cube of Failure (PF) Models fault including SA: represented by SA: represented by : AN gate PF for output SA is PFs for output SA are X, X Propagation -cube Models conditions under which fault effect propagates through gate Copyright 2, M. Tahoori TS I: Lecture 8 24 Lecture 8 2

13 Testing igital Systems I Implication Procedure. Model fault with appropriate PF 2. Select propagation -cubes to propagate fault effect to a PO (-drive procedure) 3. Select singular cover cubes to justify internal circuit signals (Consistency procedure) Algorithm s main problem Selects cubes and singular covers arbitrarily Copyright 2, M. Tahoori TS I: Lecture 8 25 Algorithm Copyright 2, M. Tahoori TS I: Lecture 8 26 Lecture 8 3

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