CHAPTER 3 BASIC & COMBINATIONAL LOGIC CIRCUIT

Transcription

1 CHAPTER 3 BASIC & COMBINATIONAL LOGIC CIRCUIT

2 CHAPTER CONTENTS 3.1 Introduction to Basic Gates 3.2 Analysing A Combinational Logic Circuit 3.3 Design A Combinational Logic Circuit From Boolean Expression 3.4 Design A Combinational Logic Circuit From Truth Table 3.5 Boolean Theorem 3.6 Karnaugh-map Approach 3.7 Universality of NAND and NOR Gate

3 LEARNING OUTCOMES At the end of this chapter, you should be able to Describe the operation of NOT, AND, OR, NAND, NOR, XOR and XNOR gates and express them with Boolean expression Design a combinational logic circuit for a given Boolean output expression and truth table Simplify a combinational logic circuit to its minimum form Use NAND or NOR gates to implement any combinational logic function.

4 BOOLEAN CONSTANT & VARIABLE Boolean variable is a quantity that may be equal to either 0 or 1 at different times. Boolean variables represent only the state of a voltage variable in terms of 0 and 1, called the logic level. Different terms used to represent logic 0 and logic 1

5 TRUTH TABLE Truth tables list all possible input combinations and the corresponding output level. The number of input combination depends on the number of inputs. The number of input combinations will be equal to 2 N for an N-input truth table. For instance, for a 5-input truth table, the input combinations will be 2 5 = 32.

6 TRUTH TABLE EXAMPLES

7 3.1 BASIC GATES There are 7 basic gates available: INVERTER gate AND gate OR gate NAND gate NOR gate XOR gate XNOR gate

8 INVERTER Also known as NOT gate It changes one logic level to the opposite level The symbol is Truth table

9 INVERTER Timing diagram A graph that accurately displays the relationship of two or more waveforms on time basis. Boolean expression of an Inverter with input A and output B is

10 AND AND gate can have two or more inputs but only 1 output. Operation: logical multiplication. Output is HIGH only when all the inputs are HIGH. The symbol is

11 AND EXERCISE Determine the AND gate output for the following figure.

12 OR OR gate can have two or more inputs but only 1 output. Operation: logical addition. Output is LOW only when all the inputs are LOW. The symbol is

13 OR EXERCISE Determine the OR gate output for the following figure.

14 NAND NAND gate can have two or more inputs but only 1 output. Operation: in combination AND, OR and INVERTER Output is LOW only when all the inputs are HIGH. The symbol is

15 NAND EXERCISE

16 NOR NOR gate can have two or more inputs but only 1 output. Operation: in combination AND, OR and INVERTER Output is HIGH only when all the inputs are LOW. The symbol is

17 NOR EXERCISE

18 XOR XOR gate can have two or more inputs but only 1 output. Output is HIGH only when the inputs are at opposite logic levels. The symbol is

19 XOR

20 XNOR XNOR gate can have two or more inputs but only 1 output. Output is LOW only when the inputs are at opposite logic levels. The symbol is

21 XNOR

22 3.2 ANALYSING A COMBINATIONAL LOGIC CIRCUIT In digital system, different gates are connected together to perform different function combinational logic circuit Obtain the Boolean expression and analyse it to form the truth table for that particular combinational logic circuit.

23 EXAMPLE STEP 1 d A B a A B f = d +C = (A B) +C e = B C Z = e f = (B C) (A B) +C

24 STEP 2 Truth table The Boolean expression Z B C A B C

25 EXERCISE For the combinational circuits given below, find its Boolean expression and truth table. (a) (b)

26 3.3 DESIGN A COMBINATIONAL LOGIC CIRCUIT FROM BOOLEAN EXPRESSION To draw a logic circuit, Step 1: Group the variables together in a bracket Step 2: Start to draw from either input or output

27 EXAMPLE STEP 1 From the Boolean expression y AC BC ABC STEP 2 Bracket the expression y ( AC) ( BC) ( ABC)

28 STEP 3

29 EXERCISE Draw the combinational circuit represented by the Boolean expression below x ( A B)( B C) Z ABC BC C

30 3.4 DESIGN A COMBINATIONAL LOGIC CIRCUIT FROM TRUTH TABLE The relationship between Boolean expression, truth table and logic circuit is as shown below: SOP/ POS Boolean expression Truth table Logic circuit

31 3.4 DESIGN A COMBINATIONAL LOGIC CIRCUIT FROM TRUTH TABLE If a logic function is defined by a Boolean expression, its circuit diagram can be implemented directly from the expression In general, there are three type of Boolean expression i. Sum-of-products (SOP) expression ii. Product-of-sums (POS) expression iii. Miscellaneous (a mixture of basic logic functions) Similarly, if a logic circuit is given, we can derive its Boolean expression by observing and combining the outputs of each logic gates

32 EXAMPLE 3.4-1

33 STEP 1 STEP 2

34 STEP 3

35 STEP 4

36 STEP 5

37 EXAMPLE Design a logic circuit that produces a truth table below using SOP.

38 Z = m1 + m4 + m7 or Z(A,B,C) = m (1,4,7) canonical form Z A B C A B C A B C YOUR CIRCUIT IS

39 EXERCISE For the truth table given, draw the circuit by using POS approach

40 3.5 BOOLEAN THEOREM Boolean algebra is the maths of digital systems. There are 3 terms used in Boolean: Variable is a symbol used to represent a logical quantity. Complement is the inverse of a variable (indicated by a bar or an apostrophe) Literal is a variable or a complement This theorem is important in reducing the Boolean expression to its simplest form.

41 COMMUTATIVE LAW Rule 1 A + B = B + A Rule 2 A B = B A

42 ASSOCIATIVE LAW Rule 3 : A + (B + C) = (A + B) + C = A + B + C Rule 4 : A (B C) = (A B) C = A B C

43 DISTRIBUTIVE LAW Rule 5a : A (B + C) = A B + A C Rule 5b :(A + B) (C + D) = A C + A D + B C + B D

44 SINGLE VARIABLE THEOREM Rule 6 : A = A Rule 7 : A 0 = 0 Rule 8 : A 1 = A Rule 9 : A A = A Rule 10: A A = 0 Rule 11: A + 0 = A Rule 12: A + 1 = 1 Rule 13: A + A = A Rule 14: A + A = 1 Rule 15: A + A B = A Rule 16: A + A B = A + B

45 DEMORGAN S THEOREM Theorem 1 The complement of a sum of variables is equal to the product of the complements of the variables Rule 17: A + B = A B

46 Theorem 2 The complement of a product of variables is equal to the sum of the complements of the variables Rule 18: A B = A + B

47 The easiest way to understand this theorem is to break (or connect) bar above the sign that change.

48 EXAMPLE 3.5-1

49 EXAMPLE 3.5-2

50 EXAMPLE Given y ABD ABD y AB(D D);(D D) 1 y AB(1) y AB

51 EXAMPLE B z A A A A B z B A B A z B B B A A B B A B B A A A z B A B A z 1 ); ( 0 and that, Notice ) )( ( Given

52 EXAMPLE 3.5-5

53 3.6 KARNAUGH MAP (K-MAP) APPROACH A K-map is a rearrangement of truth table minterm with a single-bit difference can be detected easily 3 variables K-Map is shown here

54 Two possible arrangement of 4- variables K-map Notice that the K-map is labeled so that horizontally and vertically adjacent cells differ only by one bit.

55 Notice the differences???

56 ADJACENT CELL Each cell is adjacent to the cell at its right, left, above and below. Wrap around adjacency.

57 STEPS INVOLVED There are 4 steps involved in this approach: Step 1: Map the output in K-map Step 2: Group the 1 s together Step 3: Determine the minimum product term for each group Step 4: Sum all the terms to form the minimum SOP (MSOP) expression

58 Step 1: Mapping the Output

59 Step 2: Group the 1 s together First, get to know the adjacent cell: Each cell is adjacent to the cell at its right, left, above and below.

60 Step 2: Group the 1 s together (cont.) In grouping the 1 s together, GOAL : to maximise the size of the groups and to minimise the number of groups RULES to follow : 1. A group must contain either 1, 2, 4, 8 or 16 cells (must be in power of 2) 2. Each cell in a group must be adjacent to one or more cells in that same group, but all cells in the group do not have to be adjacent to each other 3. Always include the largest possible number of 1s in a group in accordance with Rule Each 1 on the map must be included in at least one group. The 1 s already in a group can be included in another group as long as the overlapping groups include non-common 1 s.

61 Step 2: Group the 1 s together (cont.) RULE 1: A group must contain either 1, 2, 4, 8 or 16 cells (must be in power of 2)

62 RULE 2: Each cell in a group must be adjacent to one or more cells in that same group, but all cells in the group do not have to be adjacent to each other

63 RULE 3: Always include the largest possible number of 1s in a group in accordance with Rule 1.

64 RULE 4: Each 1 on the map must be included in at least one group. The 1 s already in a group can be included in another group as long as the overlapping groups include noncommon 1 s.

65 Step 3: Determine the minimum term for each group Variables that occur both uncomplemented and complemented within the group (a.k.a. contradictory variables) are eliminated. For a 3-variable k-map: 1. A 1-cell group produces a 3-variable product term 2. A 2-cell group produces a 2-variable product term 3. A 4-cell group produces a 1-variable product term 4. An 8-cell group produces a value of 1 For a 4-variable k-map: 1. A 1-cell group produces a 4-variable product term 2. A 2-cell group produces a 3-variable product term 3. A 4-cell group produces a 2-variable product term 4. An 8-cell group produces a 1-variable product term 5. A 16-cell group produces a value of 1

66 Step 4: Sum all the terms to form the MSOP expression Once we have determined the SOPs, we add them up to obtain the minimum expression of SOP

67 Example 1

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69 A B A C A C AC

70 A B A C The Final Answer is Z = A B + AC + A C AC

71 Example 3: (3-variables K-map) 1 2 3

72 Example 4: (4 variables K-Map) 1 2 3

73 Example 5 Obtain the simplest form of SOP for the Boolean expression below Z A B C D A B C D A B CD A BC D A BC D A BCD AB C D AB CD ABCD

74 Don t Care Condition

75 Don t Care Condition

76 Don t Care Condition Example

77 Don t Care Condition Example

78 K-Map Summary

79 3.7 Universality of NAND and NOR Gate NAND and NOR gates are called universal circuits because they can be used to produce NOT, AND, OR and NOR functions. We could design combinational logic circuits using only these gates.

80 NAND GATE

81 NOR GATE

82 Designing circuits using only NAND gates We could design combinational logic circuits using only NAND gates. There are 2 approaches: 1. Direct translation method Replace the gates other than NAND with the equivalent NAND gate (Number of gates are not minimised) 2. Boolean manipulation method Use Boolean theorem to transform the expression into a NAND gate only expression (Number of gates are minimised)

83 Example NAND gate Redraw the logic circuit shown below using only NAND gates.

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86 Designing circuits using only NOR gates We could design combinational logic circuits using only NOR gates. There are 2 approaches: 1. Direct translation method Replace the gates other than NOR with the equivalent NOR gate (Number of gates are not minimised) 2. Boolean manipulation method Use Boolean theorem to transform the expression into a NOR gate only expression (Number of gates are minimised)

87 Example- NOR gate Redraw the logic circuit shown below using only NOR gates.

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90 GOOD LUCK FOR YOUR FIRST TEST TEST 1 WILL COVER:- CHAPTER 1,2 & 3