Positive and Negative Logic

Transcription

1 Course: B.Sc. Applied Physical Science (Computer Science) Year & Sem.: IInd Year, Sem - IIIrd Subject: Computer Science Paper No.: IX Paper Title: Computer System Architecture Lecture No.: 4 Lecture Title: Logic Gates - I Script Hello friends during the last two lectures we discussed the binary numbers, hexadecimal and octal numbers, the signed numbers and the related arithmetic. In today s lecture we shall be talking about the logic gates. The emphasis in this discussion is on the operation, application, and troubleshooting of logic gates. The relationship of input and output waveforms of a gate using timing diagrams is thoroughly covered. Logic symbols used to represent the logic gates are in accordance with IEEE Standard. Positive and Negative Logic The binary variables, as we know, can have either of the two states, i.e. the logic 0 state or the logic 1 state. These logic states in digital systems such as computers, for instance, are represented by two different voltage levels or two different current levels. If the more positive of the two voltage or current levels represents a logic 1 and the less positive of the two levels represents a logic 0, then the logic system is referred to as a positive logic system. If the more positive of the two voltage or current levels represents a logic 0 and the less positive of the two levels represents a logic 1, then the logic system is referred to as a negative logic system. The following examples further illustrate this concept. If the two voltage levels are 0 V and +5 V, then in the positive logic system the 0V represents a logic 0 and the +5 V represents a logic 1. In the negative logic system, 0V represents a logic 1 and +5V represents logic 0. If the two voltage levels are 0V and 5 V, then in the positive logic system the 0V represents a logic 1 and the 5 V represents a logic 0. In the negative logic system, 0V represents logic 0 and 5 V represents logic 1. It is interesting to note, as we will discover in the latter part of the lecture, that a positive OR is a negative AND. That is, OR gate hardware in the positive logic system behaves like an AND gate in the negative logic system. The reverse is also true. Similarly, a positive NOR is a negative AND, and vice versa. Truth Table A truth table lists all possible combinations of input binary variables and the corresponding outputs of a logic system. The logic system output can be found from the logic expression, often referred to as the Boolean expression that relates the output with the inputs of that very logic system. When the number of input binary variables is only one, then there are only two possible inputs, i.e. 0 and 1. If the number of inputs is two, there can be four possible input combinations, i.e. 00, 01, 10 and 11. The part (b) of the Figure shows the truth table of the two-input logic system represented by part (a) of Figure.

2 The logic system in part (a) is such that Y = 0 only when both A = 0 and B = 0. For all other possible input combinations, output Y = 1. Similarly, for three input binary variables, the number of possible input combinations becomes eight, i.e. 000, 001, 010, 011, 100, 101, 110 and 111. This statement can be generalized to say that, if a logic circuit has n binary inputs, its truth table will have 2 possible input combinations, or in other words 2 rows. Timing Diagrams A timing diagram shows how two or more waveforms relate in time. For example, the time relationship of the output pulse to the input pulse can be shown with a simple timing diagram by aligning the two pulses so that the occurrences of the pulse edges appear in the proper time relationship. As shown here the rising edge of the input pulse and the falling edge of the output pulse occur at the same time ideally. Similarly, the falling edge of the input pulse and the rising edge of the output pulse occur at the same time (ideally). This timing relationship shown here is especially useful for illustrating the time relationship of digital waveforms with multiple pulses. IEEE/ANSI Standard Symbols Each logic gate has a symbol with a distinct shape. However, for more complex logic devices such as flip-flops, counters, registers, adders, etc., these symbols do not carry any useful information. A new set of standard symbols was introduced in 1984 under IEEE/ANSI Standard. The logic symbols given under this standard are being increasingly used now and

3 have even started appearing in the literature published by manufacturers of digital integrated circuits. This standard uses a rectangular symbol for all devices instead of a different symbol shape for each device. As shown in the Figure, all logic gates will be represented by a rectangular block. A right triangle is used instead of a bubble to indicate inversion of a logic level. Also, the right triangle is used to indicate whether a given input or output is active LOW. The absence of a triangle indicates an active HIGH input or output. As far as logic gates are concerned, a special notation inside the rectangular block describes the logic relationship between output and inputs. A 1 symbol indicates that the output is HIGH when one or more than one input is HIGH. An & symbol indicates that the output is HIGH only when all the inputs are HIGH. The two-input EX-OR is represented by the symbol =1 which implies that the output is HIGH only when one of its inputs is HIGH. A special dependency notation system is used to indicate how the outputs depend upon the input. This notation contains almost the entire functional information of the logic device in question. This will be clearer as we illustrate this new standard with the help of ANSI symbols for some of the actual devices belonging to the category of flip-flops, counters, etc., in the following discussions. Logic Gates Logic gates are electronic circuits that can be used to implement the most elementary logic expressions, also known as Boolean expressions. The logic gate is the most basic building block of combinational logic. There are three basic logic gates, namely the OR gate, the AND gate and the NOT gate. Other logic gates that are derived from these basic gates are the NAND gate, the NOR gate, the EXCLUSIVE-OR gate and the EXCLUSIVE-NOR gate. The

4 treatment of the subject matter is mainly with the help of respective truth tables and Boolean expressions. Inverter The inverter or NOT circuit performs the operation called inversion or complementation. The inverter changes one logic level to the opposite level. In terms of bits, it changes a 1 to a 0 and a 0 to a 1. Standard logic symbols for the inverter are shown in figure. The negation indicator is a "bubble" that indicates inversion or complementation when it appears on the input or output of any logic element, as shown in Figure for the inverter. Generally, inputs are on the left of a logic symbol and the output is on the right. When appearing on the input, the bubble means that a 0 is the active or asserted input state, and the input is called an active-low input. When appearing on the output, the bubble means that a 0 is the active or asserted output state, and the output is called an active-low output. The absence of a bubble on the input or output means that a 1 is the active or asserted state, and in this case, the input or output is called active-high. Truth Table, Operation and Timing Diagram As shown here when a HIGH level is applied to an inverter input, a LOW level will appear on its output. When a LOW level is applied to its input, a HIGH will appear on its output. This operation is summarized in this truth table, which shows the output for each possible input in terms of levels and corresponding bits.

5 In Boolean algebra, which is the mathematics of logic circuits and will be covered thoroughly in later discussions, a variable is designated by a letter. The complement of a variable is designated by a bar over the letter. A variable can take on a value of either 1 or 0. If a given variable is 1, its complement is 0 and vice versa. The operation of an inverter or NOT circuit can be expressed as follows: If the input variable is called A and the output variable is called, then As shown here this expression states that the output is the complement of the input, so if A = 0, then X =1, and if A = 1, then X = 0. The complemented variable A can be read as "A bar" or "not A." The AND Gate The AND gate is one of the basic gates that can be combined to form any logic function. An AND gate can have two or more inputs and performs what is known as logical multiplication. An AND gate is a logic circuit having two or more inputs and one output. The output of an AND gate is HIGH only when all of its inputs are in the HIGH state. In all other cases, the output is LOW. When interpreted for a positive logic system, this means that the output of the AND gate is a logic 1 only when all of its inputs are in logic 1 state. In all other cases, the output is logic 0. The logic symbol and truth table of a two-input AND gate is shown in Figure.

6 The AND operation on two independent logic variables A and B is written as Y = A.B and reads as Y equals A AND B. Here, A and B are input logic variables and Y is the output. An AND gate performs an operation as given here: For a two-input AND gate, Y = A.B; For a three-input AND gate, Y = A.B.C; For a four-input AND gate, Y = A.B.C.D Operation with Waveform Inputs In most applications, the inputs to a gate are not stationary levels but are voltage waveforms that change frequently between HIGH and LOW logic levels. Now let's look at the operation of AND gates with pulse waveform inputs, keeping in mind that an AND gate obeys the truth table operation regardless of whether its inputs are constant levels or levels that change back and forth. Let's examine the waveform operation of an AND gate by looking at the inputs with respect to each other in order to determine the output level at any given time. As shown in this figure, inputs A and B are both HIGH during the time interval, making output X HIGH during this interval. During time interval input A is LOW and input B is HIGH, so the output is LOW. During time interval, both inputs are HIGH again, and therefore the output is HIGH. During time interval input A is HIGH and input B is LOW, resulting in a LOW (0) output. Finally, during time interval, input A is LOW, input B is LOW, and the output is therefore LOW. Applications A common application of the AND gate is to enable that is, to allow the passage of a signal or pulse waveform from one point to another at certain times and to inhibit or prevent the passage at other times. A simple example of this particular use of an AND gate is shown in Figure.

7 Here the AND gate controls the passage of a signal or waveform A to a digital counter. The purpose of this circuit is to measure the frequency of waveform A. The enable pulse has a width of precisely 1 s. When the enable pulse is HIGH, waveform A passes through the gate to the counter; and when the enable pulse is LOW, the signal is prevented from passing through the gate or we can say it is inhibited. During the 1 second interval of the enable pulse, pulses in waveform A pass through the AND gate to the counter. The number of pulses passing through during the 1 s interval is equal to the frequency of waveform A. For example, Figure shows five pulses in one second, which is a frequency of 5 Hz. If 1000 pulses pass through the gate in the 1 s interval of the enable pulse, there are 1000 pulses/s, or a frequency of 1000 Hz. The counter counts the number of pulses per second and produces a binary output that goes to a decoding and display circuit to produce a read-out of the frequency. The enable pulse repeats at certain intervals and a new updated count is made so that if the frequency changes, the new value will be displayed. Between enable pulses, the counter is reset so that it starts at zero each time an enable pulse occurs. The current frequency count is stored in a register so that the display is unaffected by the resetting of the counter. Seat Belt Alarm System In Figure shown here, an AND gate is used in a simple automobile seat belt alarm system to detect when the ignition switch is on and the seat belt is unbuckled. If the ignition switch is on, a HIGH is produced on input A of the AND gate. If the seat belt is not properly buckled, a HIGH is produced on input B of the AND gate. Also, when the ignition switch is turned on, a timer is started that produces a HIGH on input C for 30 s. If all three conditions exist-that is, if the ignition is on and the seat belt is unbuckled and the timer is running--- the output of the AND gate is HIGH, and an audible alarm is energized to remind the driver. So friends here we come to the end of our discussion in this lecture therefore we sum up: In this lecture we learnt about the positive and negative logic, the timing diagrams, the truth table, various traditional and IEEE standard symbols of gates and mainly we discussed the

8 NOT and the AND gate in detail along with their applications. In the next lecture we shall be talking about the other gates and the intricacies involved. So friends see you in the next lecture. Thank you very much.