IDDQ and Diagnosis. Outline. I DDQ and Diagnosis. Introduction. Definition of Diagnosis. Why Diagnosis? Test and Diagnosis Flow

Transcription

1 Center for RC eliable omputing I and Diagnosis Stanford University ugust 16, 1999 Outline Introduction oolean Diagnosis ridging Fault Diagnosis Problems I Diagnosis Future Research Topics Summary 1 2 Introduction Definition of Diagnosis Test and Diagnosis Flow Why Diagnosis? Requirements of Diagnosis What is a Good Diagnosis? Definition of Diagnosis Locate the failure location(s) observing the faulty behavior without physically opening the package 3 4 Test and Diagnosis Flow pass pass Process Wafer sort Package Test 1 urn in Package Test 2 pass fail fail fail Diagnosis Failure nalysis Feedback Design/Process Why Diagnosis? Design debugging find design error find process error Production identify process defect failure analysis is very expensive improve yield customer 5 6 Page 1 ugust 16, 1999

2 Requirements of Diagnosis Fault Model SS, bridging, transistor leakage, etc. Faulty ehavior voltage - output logic value current - I lgorithm cause-effect diagnosis fault dictionary effect-cause diagnosis back tracing What is a Good Diagnosis? ccurate exact, partial diagnosis misleading diagnosis failed diagnosis High resolution few culprits Efficient storage memory computation time 7 8 oolean Diagnosis Observe logic value at primary outputs Fault model Stuck-at fault +efficient algorithm available S model effective but not accurate only 1/3 match SSF in Murphy ridging fault [Lavo 97] difficult to model faulty behavior Problems Open fault ridging fault oolean Diagnosis 9 10 Model ccuracy Problem transistor stuck-open not accurate example 1 - capacitor coupling example 2 - leakage Sequential ehavior Problem Murphy experiment sequence dependent dies Transistor stuck-open model X X X X 11 X X 12 Page 2 ugust 16, 1999

3 Example 1 - capacitor coupling Example 1 (cont.) in c op out out2 d=0.1 m air gap fringing=3 c op =0.5fF functional I 100? C op =k o (/d)*fringing Example 2 - leakage Example 2 ( in X out out2 TSMC =0.35 m functional =1ms I=40? r. Fault Diagnosis Problems Model ccuracy Problem x 1 x Page 3 ugust 16, 1999

4 Model ccuracy Problem Solution - composite signature [Millman 90,94] all four cases are considered example Model ccuracy Problem yzantine Generals Problem multiple fan-outs, different logic thresholds Problems Four times larger computation/storage space yzantine Generals problem still remains 19 x 0 x 1 20 Search Space Problem O(n 2 ) possible bridging faults n = # of nodes cause-effect diagnosis O(vbn 2 )storage problem b = # of primary output bits v= # of test patterns effect cause diagnosis computation problem Search Space Problem Solutions layout information IM [Phil 97] IF [Fugerson 88] S fault pre-selection [Lavo 97] 90% at least one bridging node selected Feedback r. Fault Problem Feedback r. Fault Problem Cause oscillation example: F= F F Osc. 23 Cause sequential behavior example: F = nor F detect undetect 10 01? F t F t Circle means stable 24 Page 4 ugust 16, 1999

5 I Diagnosis Why I Diagnosis? Possible I Solutions Why I Diagnosis? Effective for bridging fault current path from Vdd to Gnd lso effective for some open fault [Weber 95] intermediate voltage cause current Defect effect easily observed propagation to PO not needed Computation efficient back-tracing not needed fault simulation not needed Multiple defects will not mask each other Deep sub-micron technology background leakage current increases transistor count increases V t lower -> I off increases No obvious single threshold Murphy experiment What leakage? [Keshavarzi 97] I 1 - pn reverse bias not killer I 2 - waek inversion get worse when V t lower, killer now I 3 - drain induced barrier lowering (DIL) I 4 - gate induced drain leakage (GIDL) I 5 - punch through I 6 - narrow width effect I 7 - gate oxide tunneling get worse when oxide thinner, future killer I 8 - hot carrier injection 29 I 4 I 3 I 1 +I 2 30 Page 5 ugust 16, 1999

6 Mg-Md get closer [Williams 96] (Md-Mg)/Mg [Williams 96] 31 Year Road map Willams % 1358% % 22.1% % 0.68% % 0.08% % 0.00% 32 Possible I Solutions Substrate back-biasing (2500x x) layout issues [Sachdev 97] limited by GIDL Low temperature (350 x improvement) Lower Vdd (1 order improvement?) Multiple Vt high Vt for non-critical transistors Circuit Partition uilt-in Current Sensor SOI Possible I Solutions Substrate bias dependency [Keshavarzi 97] Possible I Solutions Temperature dependency [Keshavarzi 97] Future Research Topics I (t) diagnose transistor open drain/source I (v) diagnose resistive shorts I Current Signature Variable threshold Combine voltage and I diagnosis low voltage Pattern generation for diagnosis Page 6 ugust 16, 1999

7 I (v) - Example 1 Pass all other test, high I only [Nigh 98] Linear I-V curve I (v) - Example I (v) - Example 2 Fail delay test, week implantation [Nigh 98] Non-linear I-V curve I (v) - Example Summary oolean diagnosis Open fault diagnosis problem ridging fault diagnosis problem I diagnosis Possible I solutions Future Research Topics [Fugerson 88] J. Ferguson and J. Shen References Page 7 ugust 16, 1999