RF Power Field Effect Transistor N--Channel Enhancement--Mode Lateral MOSFET

Transcription

1 Technical Data RF Power Field Effect Transistor N--Channel Enhancement--ode Lateral OSFET Designed for W--CDA base station applications with frequencies from 2110 to 2170 Hz. Suitable for TDA, CDA and multicarrier amplifier applications. To be used in Class AB for PCN--PCS/cellular radio and WLL applications. Typical2--CarrierW--CDAPerformance:V DD =28Volts, I DQ =1600mA,Pout=38WattsAvg.,ChannelBandwidth=3.84Hz, PAR=8.5dB@0.01%ProbabilityonCCDF. PowerGain 14dB Drain Efficiency 25.5% I3@10HzOffset dBcin3.84HzChannelBandwidth ACPR@5HzOffset --41dBcin3.84HzChannelBandwidth CapableofHandling10:1VSWR,@28Vdc,2140Hz,180WattsCW Output Power Features Characterized with Series Equivalent Large--Signal Impedance Parameters InternallyatchedforEaseofUse QualifiedUptoaaximumof32V DD Operation Integrated ESD Protection Lower Thermal Resistance Package Low Gold Plating Thickness on Leads, 40µ Nominal. RoHS Compliant InTapeandReel.R6Suffix=150Unitsper56mm,13inchReel. Document Number: Rev. 3, 10/ Hz,38WAVG.,28V 2xW-CDA LATERAL N-CHANNEL RF POWER OSFET CASE375D-05,STYLE1 NI-1230 Table 1. aximum Ratings Rating Symbol Value Unit Drain--SourceVoltage V DSS --0.5,+65 Vdc Gate--SourceVoltage V GS --0.5,+15 Vdc TotalDeviceDissipation@T C =25 C Derate above 25 C P D W W/ C StorageTemperatureRange T stg --65to+150 C CaseOperatingTemperature T C 150 C OperatingJunctionTemperature T J 200 C Table 2. Thermal Characteristics Characteristic Symbol Value (1,2) Unit Thermal Resistance, Junction to Case Case Temperature 80 C, 180 W CW CaseTemperature71 C,38WCW R θjc C/W 1. TTF calculator available at Select Software& Tools/Development Tools/Calculators to access TTF calculators by product. 2. Refer to AN1955, Thermal easurement ethodology of RF Power Amplifiers. Go to Select Documentation/Application Notes -- AN1955., Inc., All rights reserved. 1

2 Table 3. ESD Protection Characteristics Test Conditions Human Body odel achine odel Charge Device odel Class 2(inimum) 3(inimum) C7(inimum) Table4.ElectricalCharacteristics (T C =25 Cunlessotherwisenoted) OffCharacteristics (1) Zero Gate Voltage Drain Leakage Current (V DS =65Vdc,V GS =0Vdc) Characteristic Symbol in Typ ax Unit I DSS 10 µadc Zero Gate Voltage Drain Leakage Current (V DS =28Vdc,V GS =0) Gate--Source Leakage Current (V GS =5Vdc,V DS =0Vdc) On Characteristics GateThresholdVoltage (1) (V DS =10Vdc,I D =200µAdc) GateQuiescentVoltage (3) (V DS =28Vdc,I D =1600mAdc) Drain--SourceOn--Voltage (1) (V GS =10Vdc,I D =2Adc) ForwardTransconductance (1) (V DS =10Vdc,I D =2Adc) DynamicCharacteristics (1,2) Reverse Transfer Capacitance (V DS =28Vdc±30mV(rms)ac@1Hz,V GS =0Vdc) I DSS 1 µadc I GSS 1 µadc V GS(th) Vdc V GS(Q) 3.6 Vdc V DS(on) Vdc g fs 5 S C rss 1.7 pf FunctionalTests (3) (InFreescaleTestFixture,50ohmsystem)V DD =28Vdc,I DQ =1600mA,P out =38WAvg.,f=2157.5Hz, 2--Carrier W--CDA, 3.84 Hz Channel Bandwidth Carriers. ACPR measured in 3.84 Hz Channel Bandwidth@ ±5 Hz Offset. I3 measuredin3.84hzbandwidth@±10hzoffset.par=8.5db@0.01%probabilityonccdf. PowerGain G ps db DrainEfficiency η D % Intermodulation Distortion I dbc Adjacent Channel Power Ratio ACPR dbc Input Return Loss IRL db 1. Each side of device measured separately. 2. Part internally matched both on input and output. 3. easurement made with device in push--pull configuration. 2

3 V BIAS R1 R6 + C23 R2 C13 C11 C C8 C9 C16 C18 C19 Z15 Z13 Z24 Z17 Z19 + V SUPPLY C20 Z11 Z3 Z5 Z7 Z25 Z9 C4 RF INPUT Z1 Z2 C1 DUT Z21 Z22 RF OUTPUT Z4 Z6 Z8 Z26 Z10 V BIAS R4 C2 R3 Z12 Z14 Z23 Z18 Z16 C3 Z20 R5 + C24 C14 C12 C6 C C10 C15 C17 C21 + V SUPPLY C22 Z1, Z x icrostrip Z2, Z x icrostrip Z3, Z x icrostrip Z4, Z x icrostrip Z5, Z x icrostrip Z7, Z x icrostrip Z9, Z x icrostrip Z11, Z x icrostrip Z13, Z x icrostrip Z15, Z x icrostrip Z17, Z x icrostrip Z23, Z x icrostrip Z25, Z x icrostrip PCB TaconicRF--35,0.030,ε r =3.5 Figure 1. Test Circuit Schematic Table 5. Test Circuit Component Designations and Values Part Description Part Number anufacturer C1, C2, C3, C4 30 pf Chip Capacitors ATC100B300JT500XT ATC C5, C6, C7, C8 5.6 pf Chip Capacitors ATC100B5R6JT500XT ATC C9, C10 10 µf Tantalum Capacitors T495X106K035AT Kemet C11, C pf Chip Capacitors ATC100B102JT500XT ATC C13, C14, C15, C µf Chip Capacitors CDR33BX104AKYS Kemet C17, C18, C19, C20, C21, C22 22 µf Tantalum Capacitors T491X226K035AT Kemet C23, C µf Tantalum Capacitors T491C105050AT Kemet R1, R2, R3, R4 10 Ω, 1/4 W Chip Resistors CRCW120610R0FKEA Vishay R5, R6 1.0 kω, 1/4 W Chip Resistor CRCW FKEA Vishay 3

4 C23 C13 C11 C16 C18 C19 V GG R6 R1 R2 C5 V DD C8 C9 C20 C1 C2 CUTOUTAREA C4 C3 C22 C7 C10 V GG R5 R4 C24 R3 C6 V DD C14 C12 C15C17 C21 RF5P21180 Rev5 Freescale has begun the transition of marking Printed Circuit Boards (PCBs) with the signature/logo. PCBs may have either otorola or Freescale markings during the transition period. These changes will have noimpactonform,fitorfunctionofthecurrentproduct. Figure 2. Test Circuit Component Layout 4

5 TYPICAL CHARACTERISTICS G ps, POWERGAIN(dB) G ps η D V DD =28Vdc,P out =38W(Avg.),I DQ =1600mA CarrierW-CDA,10HzCarrierSpacing 20 IRL 3.84 Hz Channel Bandwidth PAR=8.5dB@0.01%Probability(CCDF) I ACPR f, FREQUENCY(Hz) Figure 3. 2-Carrier W-CDA Broadband Performance η D,DRAIN EFFICIENCY(%) I3(dBc), ACPR(dBc) INPUT RETURN LOSS(dB) IRL, G ps, POWERGAIN(dB) I DQ =2400mA 2000 ma 1600 ma 1200 ma 800mA V DD =28Vdc -45 f1=2135hz,f2=2145hz 1600 ma Two-Tone easurement, 10 Hz Tone Spacing P out,outputpower(watts)pep Figure 4. Two-Tone Power Gain versus Output Power ID, THIRD ORDER INTERODULATION DISTORTION(dBc) V DD =28Vdc f1=2135hz,f2=2145hz Two-Tone easurement, 10 Hz Tone Spacing I DQ =800mA 2400 ma 2000 ma 1200 ma P out,outputpower(watts)pep Figure 5. Third Order Intermodulation Distortion versus Output Power INTERODULATION DISTORTION(dBc) ID, rd Order 5th Order 7th Order V DD =28Vdc,P out =170W(PEP),I DQ =1600mA Two-Tone easurements (f1+f2)/2 = Center Frequency of 2140 Hz TWO-TONE SPACING(Hz) 30 P out,outputpower(dbm) P3dB=53.72dBm(236W) P1dB=52.99dBm(199W) P in,inputpower(dbm) Ideal Actual V DD =28Vdc,I DQ =1600mA PulsedCW,8µsec(on),1msec(off) f=2140hz Figure 6. Intermodulation Distortion Products versus Tone Spacing Figure 7. Pulse CW Output Power versus Input Power 5

6 η D,DRAINEFFICIENCY(%),G ps,powergain(db) 40 V DD =28Vdc,I DQ =1600mA 35 f1=2135hz,f2=2145hz xW-CDA,10Hz@3.84HzBandwidth PAR=8.5dB@0.01%Probability(CCDF) η D G I3 15 ps ACPR P out,outputpower(watts)w-cda Figure8.2-CarrierW-CDAACPR,I3,Power Gain and Drain Efficiency versus Output Power TYPICAL CHARACTERISTICS I3(dBc), ACPR(dBc) TTFFACTOR(HOURSxAPS 2) T J,JUNCTIONTEPERATURE( C) ThisabovegraphdisplayscalculatedTTFinhoursxampere 2 drain current. Life tests at elevated temperatures have correlated to better than ±10% of the theoretical prediction for metal failure. Divide TTFfactorbyI D 2 forttfinaparticularapplication. Figure 9. TTF Factor versus Junction Temperature 220 W-CDA TEST SIGNAL PROBABILITY(%) W-CDA.ACPReasuredin3.84HzChannel Bandwidth@±5HzOffset.I3easuredin 3.84HzBandwidth@±10HzOffset.PAR= 8.5dB@0.01%ProbabilityonCCDF PEAK-TO-AVERAGE(dB) Figure10.CCDFW-CDA3GPP,Testodel1, 64 DPCH, 67% Clipping, Single Carrier Test Signal 10 (db) I3 in 3.84HzBW 3.84 Hz Channel BW -ACPR in 3.84HzBW +ACPR in 3.84HzBW f, FREQUENCY(Hz) +I3 in 3.84HzBW Figure Carrier W-CDA Spectrum 6

7 Z o =25Ω Z load f=2110hz f=2170hz f=2110hz f=2170hz Z source V DD =28Vdc,I DQ =1600mA,P out =38WAvg. f Hz Z source Ω j j j14.51 Z load Ω j j j11.05 Z source = Testcircuitimpedanceasmeasuredfrom gate to gate, balanced configuration. Z load = Testcircuitimpedanceasmeasured from drain to drain, balanced configuration. Input atching Network + Device Under Test - Output atching Network - + Z source Z load Figure 12. Series Equivalent Source and Load Impedance 7

8 PACKAGE DIENSIONS A A G 4 L 1 2 2X B Q bbb T A B NOTES: 1. INTERPRET DIENSIONS AND TOLERANCES PER ASE Y CONTROLLING DIENSION: INCH. 3. DIENSION H IS EASURED 0.030(0.762) AWAY FRO PACKAGE BODY. 4. RECOENDED BOLT CENTER DIENSION OF 1.52(38.61) BASED ON 3 SCREW. 4X K E aaa ccc D T A 3 4 B N (LID) PIN5 (INSULATOR) bbb 4X T A T A B B T SEATING PLANE B (FLANGE) C H ccc bbb T A R (LID) S (INSULATOR) T A B B F INCHES ILLIETERS DI IN AX IN AX A B C D E F G BSC BSC H K L BSC BSC N Q R S aaa REF 0.33 REF bbb REF 0.25 REF ccc REF 0.51 REF STYLE 1: PIN1. DRAIN 2. DRAIN 3. GATE 4. GATE 5. SOURCE CASE 375D-05 ISSUE E NI

9 PRODUCT DOCUENTATION Refer to the following documents to aid your design process. Application Notes AN1955: Thermal easurement ethodology of RF Power Amplifiers Engineering Bulletins EB212: Using Data Sheet Impedances for RF LDOS Devices The following table summarizes revisions to this document. REVISION HISTORY Revision Date Description 3 Oct odified data sheet to reflect RF Test Reduction described in Product and Process Change Notification number, PCN12779, p. 1, 2 Updated Part Numbers in Table 5, Component Designations and Values, to RoHS compliant part numbers, p. 3 Added Product Documentation and Revision History, p. 9 9

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