ARCHIVE INFORMATION. Cellular Band RF Linear LDMOS Amplifier MHL9318. Freescale Semiconductor. Technical Data MHL9318. Rev.
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1 Technical Data Rev. 3, 1/2005 Replaced by N. There are no form, fit or function changes with this part replacement. N suffix added to part number to indicate transition to lead-free terminations. Cellular Band RF Linear LDMOS Amplifier Designed for ultra- linear amplifier applications in 50 ohm systems operating in the cellular frequency band. A silicon FET Class A design provides outstanding linearity and gain. In addition, the excellent group delay and phase linearity characteristics are ideal for the most demanding analog or digital modulation systems, such as TDMA and CDMA. Third Order Intercept: 49 dbm Typ Power Gain: 17.5 db Typ (@ ) Excellent Phase Linearity and Group Delay Characteristics Ideal for Feedforward Base Station Applications For Use in TDMA and CDMA Multi- Carrier Applications 3.0 W, 17.5 db MHz RF LINEAR LDMOS AMPLIFIER CASE 301AS-01, STYLE 1 Table 1. Absolute Maximum Ratings ( unless otherwise noted) Rating Symbol Value Unit DC Supply Voltage V DD 30 Vdc RF Input Power P in +20 dbm Storage Temperature Range T stg - 40 to +100 C Operating Case Temperature Range T C - 20 to +100 C Table 2. Electrical Characteristics (dc, ; 50 Ω System) Characteristic Symbol Min Typ Max Unit Supply Current I DD ma Power Gain () db Gain Flatness (f = MHz) G F db Power 1 db Comp. () P out 1 db 35.5 dbm Input VSWR (f = MHz) VSWR in 1.2:1 1.5:1 Output VSWR (f = MHz) VSWR out 1.2:1 1.5:1 Third Order Intercept (f1 = 879 MHz, f2 = 884 MHz) ITO dbm Noise Figure (f = 960 MHz) NF db, Inc., All rights reserved. 1
2 POWER GAIN/RETURN LOSS (db) I ORL IRL P1dB, ITO (dbm) ITO P1dB f, FREQUENCY (MHz) f, FREQUENCY (MHz) 1200, POWER GAIN (db) ) PHASE( Figure 1. Power Gain, Input Return Loss, Output Return Loss versus Frequency I DD TEMPERATURE ( C) Figure 3. Power Gain, I DD versus Temperature PHASE GROUP DELAY DD (ma) GROUP DELAY (ns) ITO (dbm), GAIN FLATNESS (db) G F Figure 2. P1dB, ITO versus Frequency TEMPERATURE ( C) ITO P1dB Figure 4. ITO, P1dB versus Temperature f = MHz PHASE LINEARITY P1dB (dbm) PHASE LINEARITY ( ) TEMPERATURE ( C) Figure 5. Phase (1), Group Delay (1) versus Temperature 1. In Production Test Fixture G F TEMPERATURE ( C) Figure 6. Gain Flatness, Phase Linearity versus Temperature 2
3 I TYPICAL CHARACTERISTICS , POWER GAIN (db) I DD DD (ma) ITO (dbm) 46 ITO P1dB P1dB (dbm) PHASE ( ) VOLTAGE (VOLTS) VOLTAGE (VOLTS) Figure 7. Power Gain, I DD versus Voltage 24 PHASE 26 VOLTAGE (VOLTS) GROUP DELAY Figure 9. Phase (1), Group Delay (1) versus Voltage 1. In Production Test Fixture GROUP DELAY (ns) PHASE LINEARITY ( ) Figure 8. ITO, P1dB versus Voltage PHASE LINEARITY G F f = MHz VOLTAGE (VOLTS) Figure 10. Phase Linearity, Gain Flatness versus Voltage G, GAIN FLATNESS (db) F
4 NOTES 4
5 NOTES 5
6 NOTES 6
7 PACKAGE DIMENSIONS -A (0.020) M T A M G -B- NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, CONTROLLING DIMENSION: INCH. 3. DIMENSION F TO CENTER OF LEADS. K R 0.51 (0.020) M T -S- -T- J D 3 PL B P M 3 PL (0.020) M T H N W F Q 2 PL 0.20 (0.008) M T E S C CASE 301AS-01 ISSUE A M A M SEATING PLANE INCHES MILLIMETERS DIM MIN MAX MIN MAX A B C D E F BSC 2.18 BSC G BSC BSC H BSC BSC J K N BSC 9.91 BSC P Q R S W BSC 2.29 BSC STYLE 1: PIN 1. RF INPUT 2. VDD 3. RF OUTPUT CASE: GROUND 7
8 How to Reach Us: Home Page: USA/Europe or Locations Not Listed: Technical Information Center, CH N. Alma School Road Chandler, Arizona or Europe, Middle East, and Africa: Freescale Halbleiter Deutschland GmbH Technical Information Center Schatzbogen Muenchen, Germany (English) (English) (German) (French) support@freescale.com Japan: Japan Ltd. Headquarters ARCO Tower 15F 1-8-1, Shimo-Meguro, Meguro-ku, Tokyo Japan or support.japan@freescale.com Asia/Pacific: Hong Kong Ltd. Technical Information Center 2 Dai King Street Tai Po Industrial Estate Tai Po, N.T., Hong Kong support.asia@freescale.com For Literature Requests Only: Literature Distribution Center P.O. Box 5405 Denver, Colorado or Fax: LDCForFreescaleSemiconductor@hibbertgroup.com Information in this document is provided solely to enable system and software implementers to use products. There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document. reserves the right to make changes without further notice to any products herein. makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. Typical parameters that may be provided in data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals, must be validated for each customer application by customer s technical experts. does not convey any license under its patent rights nor the rights of others. products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the product could create a situation where personal injury or death may occur. Should Buyer purchase or use products for any such unintended or unauthorized application, Buyer shall indemnify and hold and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Freescale Semiconductor was negligent regarding the design or manufacture of the part. Freescale and the Freescale logo are trademarks of, Inc. All other product or service names are the property of their respective owners., Inc All rights reserved. Document Number: Rev. 3, 1/2005 8
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