MRFIC2006. The MRFIC Line SEMICONDUCTOR TECHNICAL DATA

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Elinor Gilbert
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1 SEMICONDUCTOR TECHNICAL DATA Order this document by /D The MRFIC Line The is an Integrated PA designed for linear operation in the MHz to. GHz frequency range. The design utilizes Motorola s advanced MOSAIC 3 silicon bipolar RF process to yield superior performance in a cost effective monolithic device. Applications for the include CT- and CT-2 cordless telephones, remote controls, video and audio short range links, low cost cellular radios, and ISM band transmitters. Ω Input and Output Impedance Typical Gain = 23 MHz Bias Current Externally Adjustable Bias Pin can be used to Ramp or Disable Class A or AB Linear Operation Unconditionally Stable SO- Leaded Plastic Package Order R2 for Tape & Reel.R2 Suffix Device Marking = M6 NOT RECOMMENDED FOR NEW DESIGN DEVICE TO BE PHASED OUT. No replacement available. MHz 2 STAGE PA SILICON MONOLITHIC INTEGRATED CIRCUIT CASE 7-6 (SO-) ABSOLUTE MAXIMUM RATINGS (TA = 2 C, Zo = Ω unless otherwise noted) Rating Symbol Value Unit Supply Voltages VCC, VCC2. Vdc Bias Voltage Vbias 6. Vdc Total Supply Current ICC, ICC2 ma RF Output Power (VCC2 <. V) Pout +2 dbm RF Output Power (. V < VCC2. V) Pout 3 VCC2 dbm RF Input Power Pin + dbm Operating Ambient Temperature TA 3 to + C Storage and Junction Temperature Tstg 6 to + C Thermal Resistance, Junction to Case RθJC 63 C/W GND GND 3 GND 2 RF OUT (VCC2) 6 7 RF IN GND VCC Vbias Pin Connections and Functional Block Diagram REV 2/99 Motorola, Inc. 999

2 RECOMMENDED OPERATING RANGES Parameter Symbol Value Unit Supply Voltage Ranges VCC, VCC2. to. Vdc Bias Voltage Range Vbias to. Vdc RF Frequency Range f to MHz ELECTRICAL CHARACTERISTICS (VCC, VCC2, Vbias = 3. V, TA = 2 C, f = MHz, Zo = Ω unless otherwise noted) Characteristics () Min Typ Max Unit Supply Current Total 6 ma ICC ma ICC2 29 ma I Bias 3. ma Small Signal Gain db Input Return Loss, RF IN Port db Output Return Loss, RF OUT Port db Reverse Isolation 3 db Output Power at. db Gain Compression dbm 3rd Order Intercept Point (Out) + 2 dbm th Order Intercept Point (Out) + 2 dbm NOTE:. All electrical characteristics measured in test circuit schematic shown in Figure below. RF IN Ω C 6 DUT 3 L VCC + R C3 7 2 L2 C2 RF OUT Ω Vbias + C VCC2 + C C, C2 pf Chip Capacitor C3, C. nf Chip Capacitor C nf Chip Capacitor L nh Chip Inductor L2 nh Chip Inductor R Resistor Optional RF Connectors SMA Type Board Material Epoxy/Glass εr =., Dielectric Thickness =. (.36 mm) Figure. Typical Biasing Configuration 2

3 Table. Scattering Parameters for MHz Two Stage PA (VCC, VCC2, VBIAS =, I = 9 ma, TA = 2 C, System) f S S2 S2 S22 (MHz) S φ S2 φ S2 φ S22 φ

4 TYPICAL CHARACTERISTICS 2 VCC, VCC2, Vbias = 2 TA = 2 C G, GAIN (db) C + C TA = 3 C G, GAIN (db) VCC, VCC2, Vbias = V Figure 2. Gain versus Frequency Figure 3. Gain versus Frequency 2 P out, OUTPUT POWER (dbm) TA = 3 C C 2 C f = MHz VCC, VCC2, Vbias = P out, OUTPUT POWER (dbm) VCC, VCC2, Vbias = V f = MHz TA = 2 C Pin, INPUT POWER (dbm) Pin, INPUT POWER (dbm) Figure. Output Power versus Input Power Figure. Output Power versus Input Power IRL, INPUT RETURN LOSS (db) TA = 2 C VCC, VCC2, Vbias = V ORL, OUTPUT RETURN LOSS (db) TA = 2 C VCC, VCC2, Vbias = V Figure 6. Input Return Loss versus Frequency Figure 7. Output Return Loss versus Frequency

5 TYPICAL CHARACTERISTICS 3 3 REV ISO, REVERSE ISOLATION (db) 3 VCC, VCC2, Vbias = V TA = 2 C η, POWER ADDED EFFICIENCY (%) 3 2 VCC, VCC2, Vbias = V TA = 2 C f = MHz Pout, OUTPUT POWER (dbm) Figure. Reverse Isolation versus Frequency Figure 9. Power Added Efficiency versus Output Power Po db, OUTPUT POWER AT db GAIN COMPRESSION (dbm) TA = C 3 C VCC, VCC2, Vbias = 2 C Po db, OUTPUT POWER AT db GAIN COMPRESSION (dbm) 6 2 VCC, VCC2, Vbias = V TA = 2 C 7 Figure. Output Power at db Gain Compression versus Frequency Figure. Output Power at db Gain Compression versus Frequency 3 P out, OUTPUT POWER (dbm) TA = + C 3 C 2 C VCC, VCC2 = Pin = dbm f = MHz P out, OUTPUT POWER (dbm) VCC, VCC2 = V TA = 2 C Pin = dbm f = MHz Figure 2. Output Power versus Bias Voltage Figure 3. Output Power versus Bias Voltage

6 TYPICAL CHARACTERISTICS ICC + ICC2, SUPPLY CURRENT (ma) 6 TA = + C 3 C 2 C VCC, VCC2 = I CC + I CC2, SUPPLY CURRENT (ma) 6 VCC, VCC2 = V TA = 2 C Figure. Supply Current versus Bias Voltage Figure. Supply Current versus Bias Voltage 7 6 IBIAS, BIAS CURRENT (ma) 3 2 TA = + C 3 C 2 C VCC, VCC2 = TO V 2 3 Figure 6. Bias Current versus Bias Voltage 6

7 APPLICATIONS INFORMATION DESIGN PHILOSOPHY The was designed for low cost and flexibility. Low cost was achieved by minimizing external components and using an SOIC package. Flexibility was achieved by allowing the bias current to be externally adjustable resulting in a broad range of output power capability. The bias pin can be ramped to reduce AM splatter in TDD/TDMA systems and can be used to trim the RF output power. THEORY OF OPERATION The input port is internally matched to ohms. Return loss is typically 6 db in the MHz range. The output port is nearly ohms but is an open collector and therefore requires an external bias inductor. Using an RF choke will result in a 2 db output return loss. However, a nh inductor will improve it to db. A nh inductor is small enough in value to be printed on the board. DC blocks are required on the input and output. Values of pf are recommended. Supply decoupling must be done as close to the IC as possible. A pf capacitor is recommended. A series RF choke is recommended to keep the RF signal off the supply line. A nf decoupling capacitor is recommended on the Vbias line but does not need to be very close to the IC. The Vbias pin can be used several ways. Tying it directly to VCC will maximize the bias current which will maximize linearity. Adding a series resistor will reduce the bias current which will improve efficiency. Figure 9 shows the efficiency versus output power with Vbias tied to VCC. The series resistor will cause these curves to shift to the left. The RF output power can be trimmed by using a variable resistor. The Vbias pin can also be used to power down the IC or, in the case of TDD/TDMA systems, to ramp the IC. By applying a linear ramp voltage, such as the one provided by the MRFIC, it has been demonstrated to meet the CT2 Common Air Interface splatter specifications. The is internally temperature compensated. For input powers of. to dbm the output power temperature variation is typically less than.2 db from 3 to + C. EVALUATION BOARDS Evaluation boards are available for RF Monolithic Integrated Circuits by adding a TF suffix to the device type. For a complete list of currently available boards and ones in development for newly introduced product, please contact your local Motorola Distributor or Sales Office. 7

8 PACKAGE DIMENSIONS A E B C A e D B H A.2 M C B S A S.2 M B M SEATING PLANE. h X C L NOTES:. DIMENSIONING AND TOLERANCING PER ASME Y.M, DIMENSIONS ARE IN MILLIMETER. 3. DIMENSION D AND E DO NOT INCLUDE MOLD PROTRUSION.. MAXIMUM MOLD PROTRUSION. PER SIDE.. DIMENSION B DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE.27 TOTAL IN EXCESS OF THE B DIMENSION AT MAXIMUM MATERIAL CONDITION. MILLIMETERS DIM MIN MAX A.3.7 A..2 B.3.9 C.9.2 D.. E 3.. e.27 BSC H. 6. h.2. L..2 7 CASE 7 6 ISSUE T Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. Typical parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer. Mfax is a trademark of Motorola, Inc. How to reach us: USA / EUROPE / Locations Not Listed: Motorola Literature Distribution; JAPAN: Motorola Japan Ltd.; SPD, Strategic Planning Office,, P.O. Box, Denver, Colorado or Nishi Gotanda, Shinagawa ku, Tokyo, Japan. 3 7 Customer Focus Center: Mfax : RMFAX@ .sps.mot.com TOUCHTONE ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; B Tai Ping Industrial Park, Motorola Fax Back System US & Canada ONLY 77 Ting Kok Road, Tai Po, N.T., Hong Kong HOME PAGE: MOTOROLA RF DEVICE /D DATA

VHF 2.0 GHz LOW NOISE AMPLIFIER WITH PROGRAMMABLE BIAS

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